5#ifndef TGGSectorLogic_hh
6#define TGGSectorLogic_hh
70 void setTMDB(std::shared_ptr<const LVL1TGC::TGCTMDB> tmdb);
71 void setNSW(std::shared_ptr<const LVL1TGC::TGCNSW> nsw);
72 void setBIS78(std::shared_ptr<const LVL1TGC::TGCBIS78> bis78);
106 bool hitTileMu(
const uint8_t& mask,
const uint8_t& hit6,
const uint8_t& hit56)
const;
127 std::shared_ptr<const LVL1TGC::TGCTileMuCoincidenceLUT>
m_tileMuLUT;
128 std::shared_ptr<const LVL1TGC::TGCTMDB>
m_pTMDB;
129 std::shared_ptr<const LVL1TGC::TGCNSW>
m_nsw;
130 std::shared_ptr<const TGCNSWCoincidenceMap>
m_mapNSW;
131 std::shared_ptr<const LVL1TGC::TGCBIS78>
m_bis78;
132 std::shared_ptr<const LVL1TGC::TGCBIS78CoincidenceMap>
m_mapBIS78;
@ NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR
TGCHighPtChipOut * m_wireHighPtChipOut[MaxNumberOfWireHighPtBoard]
TGCTrackSelector m_trackSelector
std::shared_ptr< const TGCNSWCoincidenceMap > m_mapNSW
TGCRPhiCoincidenceMatrix m_matrix
TGCSSCController m_SSCController
void dec2bin(int dec, char *binstr, int length)
void setTMDB(std::shared_ptr< const LVL1TGC::TGCTMDB > tmdb)
LVL1TGC::TGCSide m_sideId
virtual ~TGCSectorLogic()
bool doTILECoincidence(TGCRPhiCoincidenceOut *coincidenceOut)
TGCHighPtBoard * m_stripHighPtBoard
int getInnerStationWord() const
int m_NumberOfWireHighPtBoard
std::shared_ptr< const LVL1TGC::TGCBIS78CoincidenceMap > m_mapBIS78
std::shared_ptr< const LVL1TGC::TGCNSW > m_nsw
void doInnerCoincidence(const SG::ReadCondHandleKey< TGCTriggerData > &readCondKey, int SSCId, TGCRPhiCoincidenceOut *coincidenceOut)
TGCSectorLogic & operator=(const TGCSectorLogic &right)
void setNSW(std::shared_ptr< const LVL1TGC::TGCNSW > nsw)
int getTileMuonWord() const
void setStripHighPtBoard(TGCHighPtBoard *highPtBoard)
int getNumberOfWireHighPtBoard() const
const LVL1TGC::TGCEIFICoincidenceMap * m_mapEIFI
const TGCArguments * tgcArgs() const
bool doTGCEICoincidence(TGCRPhiCoincidenceOut *coincidenceOut)
const TGCInnerTrackletSlot * m_innerTrackletSlots[TGCInnerTrackletSlotHolder::NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR]
void setBIS78(std::shared_ptr< const LVL1TGC::TGCBIS78 > bis78)
std::shared_ptr< TGCTrackSelectorOut > m_trackSelectorOut
std::shared_ptr< const LVL1TGC::TGCBIS78 > m_bis78
TGCSectorLogic(TGCArguments *, const TGCDatabaseManager *db, TGCRegionType regionIn, int id)
std::shared_ptr< const LVL1TGC::TGCGoodMF > m_mapGoodMF
void setInnerTrackletSlots(const TGCInnerTrackletSlot *innerTrackletSlots[])
void clockIn(const SG::ReadCondHandleKey< TGCTriggerData > &readCondKey, int bidIn, bool process=true)
TGCSSCController * getSSCController()
std::shared_ptr< const LVL1TGC::TGCTileMuCoincidenceLUT > m_tileMuLUT
TGCRegionType getRegion() const
bool doTGCFICoincidence(TGCRPhiCoincidenceOut *coincidenceOut)
int getNumberOfSubSectorCluster() const
TGCHighPtChipOut * m_stripHighPtChipOut
bool doTGCBIS78Coincidence(TGCRPhiCoincidenceOut *coincidenceOut)
void getTrackSelectorOutput(std::shared_ptr< TGCTrackSelectorOut > &trackSelectorOut) const
std::shared_ptr< const LVL1TGC::TGCTMDB > m_pTMDB
@ MaxNumberOfWireHighPtBoard
void doTGCNSWCoincidence(TGCRPhiCoincidenceOut *coincidenceOut)
bool hitTileMu(const uint8_t &mask, const uint8_t &hit6, const uint8_t &hit56) const
int getNumberOfSubSector() const
void setWireHighPtBoard(int port, TGCHighPtBoard *highPtBoard)
TGCHighPtBoard * m_wireHighPtBoard[MaxNumberOfWireHighPtBoard]
This class stores the LUT for Tile-Muon coincidence of the Run-3 L1Muon Endcap trigger.
const std::string process
static constexpr unsigned int kNumberOfEndcapRoI
The number of ROIs in a endcap trigger sector.
TGCSide
The sides of TGC (A- or C-side)
static constexpr unsigned int kNMaxSSC
The maximim number of SubSector-Clusters (SSC) (i.e.
static constexpr unsigned int kNRoiInSSC
The default number of ROIs in SSC.