ATLAS Offline Software
Trigger
TrigT1
TrigT1TGC
TrigT1TGC
TGCEIFICoincidenceMap.h
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/*
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Copyright (C) 2002-2022 CERN for the benefit of the ATLAS collaboration
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*/
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#ifndef TrigT1TGC_TGCEIFICoincidenceMap_hh
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#define TrigT1TGC_TGCEIFICoincidenceMap_hh
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#include "
TrigT1TGC/TGCInnerTrackletSlot.h
"
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#include "
TrigT1TGC/TGCNumbering.h
"
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#include "
TrigT1TGC/TGCArguments.h
"
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#include "
StoreGate/ReadCondHandle.h
"
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#include "
MuonCondSvc/TGCTriggerData.h
"
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#include "
AthenaBaseComps/AthMessaging.h
"
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#include <string>
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#include <bitset>
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namespace
LVL1TGC
{
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class
TGCEIFICoincidenceMap
:
public
AthMessaging
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{
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public
:
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TGCEIFICoincidenceMap
(
LVL1TGCTrigger::TGCArguments
*,
const
SG::ReadCondHandleKey<TGCTriggerData>
& readCondKey);
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TGCEIFICoincidenceMap
(
LVL1TGCTrigger::TGCArguments
*,
const
SG::ReadCondHandleKey<TGCTriggerData>
& readCondKey,
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const
std::string&
version
,
int
sideId=0);
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TGCEIFICoincidenceMap
(
const
TGCEIFICoincidenceMap
& right);
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TGCEIFICoincidenceMap
&
operator =
(
const
TGCEIFICoincidenceMap
& right);
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const
LVL1TGCTrigger::TGCInnerTrackletSlot
*
getInnerTrackletMask
(
const
unsigned
int
input
,
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const
unsigned
int
ssc,
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const
unsigned
int
sec)
const
;
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int
getFlagPT
(
const
unsigned
int
pt
,
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const
unsigned
int
ssc,
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const
unsigned
int
sec)
const
;
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int
getFlagROI
(
const
unsigned
int
roi,
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const
unsigned
int
ssc,
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const
unsigned
int
sec)
const
;
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int
getTriggerBit
(
const
int
slot,
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const
int
ssc,
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const
int
sec,
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const
int
reg
,
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const
int
read
,
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const
int
bit)
const
;
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const
std::string&
getVersion
()
const
{
return
m_verName
; }
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int
getSideId
()
const
{
return
m_side
; }
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bool
isFullCW
()
const
{
return
m_fullCW
; }
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void
setFullCW
(
bool
val
) {
m_fullCW
=
val
; }
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bool
readMap
();
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void
dumpMap
()
const
;
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const
LVL1TGCTrigger::TGCArguments
*
tgcArgs
()
const
{
return
m_tgcArgs
; }
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LVL1TGCTrigger::TGCArguments
*
tgcArgs
() {
return
m_tgcArgs
; }
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protected
:
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static
constexpr
unsigned
int
N_INNER_SECTORS
= 4;
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private
:
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// The flagPT is a flag whether each pT is applied the coincidence or not.
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// In each bit (of kNThresholdsR2 bits), 1 applies the coincidence, and 0 is not.
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// The LSB is the lowest pT threshold, and MSB is the highest pT threshold.
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std::bitset<kNThresholdsR2>
m_flagPT
[kNMaxSSC][kNEndcapTrigSector];
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int
m_flagROI
[kNRoiInSSC][kNMaxSSC][kNEndcapTrigSector];
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// 1 use; 0: not use; -1: not used for Trigger
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LVL1TGCTrigger::TGCInnerTrackletSlot
m_map
[
N_INNER_SECTORS
][kNMaxSSC][kNEndcapTrigSector];
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std::string
m_verName
;
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int
m_side
;
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bool
m_fullCW
;
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LVL1TGCTrigger::TGCArguments
*
m_tgcArgs
;
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const
SG::ReadCondHandleKey<TGCTriggerData>
&
m_readCondKey
;
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};
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inline
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const
LVL1TGCTrigger::TGCInnerTrackletSlot
*
TGCEIFICoincidenceMap::getInnerTrackletMask
(
const
unsigned
int
input
,
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const
unsigned
int
ssc,
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const
unsigned
int
sec)
const
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{
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if
(
input
>=
N_INNER_SECTORS
)
return
0;
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if
(ssc >= kNMaxSSC)
return
0;
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if
(sec >= kNEndcapTrigSector)
return
0;
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return
&(
m_map
[
input
][ssc][sec]);
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}
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}
//end of namespace bracket
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#endif
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read
IovVectorMap_t read(const Folder &theFolder, const SelectionCriterion &choice, const unsigned int limit=10)
Definition:
openCoraCool.cxx:569
TGCInnerTrackletSlot.h
LVL1TGC::TGCEIFICoincidenceMap::m_verName
std::string m_verName
Definition:
TGCEIFICoincidenceMap.h:75
test_pyathena.pt
pt
Definition:
test_pyathena.py:11
LVL1TGC::TGCEIFICoincidenceMap::getFlagPT
int getFlagPT(const unsigned int pt, const unsigned int ssc, const unsigned int sec) const
Definition:
TGCEIFICoincidenceMap.cxx:250
LVL1TGC::TGCEIFICoincidenceMap::getVersion
const std::string & getVersion() const
Definition:
TGCEIFICoincidenceMap.h:50
LVL1TGC::TGCEIFICoincidenceMap
Definition:
TGCEIFICoincidenceMap.h:23
python.DomainsRegistry.reg
reg
globals -----------------------------------------------------------------—
Definition:
DomainsRegistry.py:343
ReadCondHandle.h
LVL1TGC::TGCEIFICoincidenceMap::getSideId
int getSideId() const
Definition:
TGCEIFICoincidenceMap.h:51
LVL1TGC::TGCEIFICoincidenceMap::setFullCW
void setFullCW(bool val)
Definition:
TGCEIFICoincidenceMap.h:53
LVL1TGC::TGCEIFICoincidenceMap::getInnerTrackletMask
const LVL1TGCTrigger::TGCInnerTrackletSlot * getInnerTrackletMask(const unsigned int input, const unsigned int ssc, const unsigned int sec) const
Definition:
TGCEIFICoincidenceMap.h:86
LVL1TGC::TGCEIFICoincidenceMap::m_flagPT
std::bitset< kNThresholdsR2 > m_flagPT[kNMaxSSC][kNEndcapTrigSector]
Definition:
TGCEIFICoincidenceMap.h:68
LVL1TGC::TGCEIFICoincidenceMap::readMap
bool readMap()
Definition:
TGCEIFICoincidenceMap.cxx:153
LVL1TGC::TGCEIFICoincidenceMap::dumpMap
void dumpMap() const
Definition:
TGCEIFICoincidenceMap.cxx:227
LVL1TGC::TGCEIFICoincidenceMap::m_flagROI
int m_flagROI[kNRoiInSSC][kNMaxSSC][kNEndcapTrigSector]
Definition:
TGCEIFICoincidenceMap.h:70
LVL1TGC::TGCEIFICoincidenceMap::m_map
LVL1TGCTrigger::TGCInnerTrackletSlot m_map[N_INNER_SECTORS][kNMaxSSC][kNEndcapTrigSector]
Definition:
TGCEIFICoincidenceMap.h:73
PlotPulseshapeFromCool.input
input
Definition:
PlotPulseshapeFromCool.py:106
LVL1TGC
Definition:
BigWheelCoincidenceLUT.cxx:24
LVL1TGC::TGCEIFICoincidenceMap::operator=
TGCEIFICoincidenceMap & operator=(const TGCEIFICoincidenceMap &right)
Definition:
TGCEIFICoincidenceMap.cxx:127
LVL1TGC::TGCEIFICoincidenceMap::m_tgcArgs
LVL1TGCTrigger::TGCArguments * m_tgcArgs
Definition:
TGCEIFICoincidenceMap.h:79
AthMessaging
Class to provide easy MsgStream access and capabilities.
Definition:
AthMessaging.h:55
LVL1TGC::TGCEIFICoincidenceMap::TGCEIFICoincidenceMap
TGCEIFICoincidenceMap(LVL1TGCTrigger::TGCArguments *, const SG::ReadCondHandleKey< TGCTriggerData > &readCondKey)
Definition:
TGCEIFICoincidenceMap.cxx:18
LVL1TGC::TGCEIFICoincidenceMap::m_side
int m_side
Definition:
TGCEIFICoincidenceMap.h:76
LVL1TGC::TGCEIFICoincidenceMap::getFlagROI
int getFlagROI(const unsigned int roi, const unsigned int ssc, const unsigned int sec) const
Definition:
TGCEIFICoincidenceMap.cxx:267
LVL1TGC::TGCEIFICoincidenceMap::N_INNER_SECTORS
static constexpr unsigned int N_INNER_SECTORS
Definition:
TGCEIFICoincidenceMap.h:62
TGCNumbering.h
LVL1TGC::TGCEIFICoincidenceMap::getTriggerBit
int getTriggerBit(const int slot, const int ssc, const int sec, const int reg, const int read, const int bit) const
Definition:
TGCEIFICoincidenceMap.cxx:284
LVL1TGC::TGCEIFICoincidenceMap::m_readCondKey
const SG::ReadCondHandleKey< TGCTriggerData > & m_readCondKey
Definition:
TGCEIFICoincidenceMap.h:81
LVL1TGC::TGCEIFICoincidenceMap::tgcArgs
LVL1TGCTrigger::TGCArguments * tgcArgs()
Definition:
TGCEIFICoincidenceMap.h:59
LVL1TGCTrigger::TGCArguments
Definition:
TGCArguments.h:12
SG::ReadCondHandleKey< TGCTriggerData >
get_generator_info.version
version
Definition:
get_generator_info.py:33
Pythia8_RapidityOrderMPI.val
val
Definition:
Pythia8_RapidityOrderMPI.py:14
AthMessaging.h
LVL1TGC::TGCEIFICoincidenceMap::isFullCW
bool isFullCW() const
Definition:
TGCEIFICoincidenceMap.h:52
TGCArguments.h
LVL1TGC::TGCEIFICoincidenceMap::tgcArgs
const LVL1TGCTrigger::TGCArguments * tgcArgs() const
Definition:
TGCEIFICoincidenceMap.h:58
LVL1TGCTrigger::TGCInnerTrackletSlot
Definition:
TGCInnerTrackletSlot.h:11
LVL1TGC::TGCEIFICoincidenceMap::m_fullCW
bool m_fullCW
Definition:
TGCEIFICoincidenceMap.h:77
TGCTriggerData.h
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