LVL1TGCTrigger::TGCSectorLogic Class Reference

#include <TGCSectorLogic.h>

Public Member Functions
	TGCSectorLogic (TGCArguments *, const TGCDatabaseManager *db, TGCRegionType regionIn, int id)
virtual	~TGCSectorLogic ()
	TGCSectorLogic (const TGCSectorLogic &right)
void	getTrackSelectorOutput (std::shared_ptr< TGCTrackSelectorOut > &trackSelectorOut) const
int	getTileMuonWord () const
int	getInnerStationWord () const
void	clockIn (const SG::ReadCondHandleKey< TGCTriggerData > &readCondKey, int bidIn, bool process=true)
int	getId () const
int	getModuleID () const
int	getOctantID () const
int	getSideID () const
TGCRegionType	getRegion () const
void	setWireHighPtBoard (int port, TGCHighPtBoard *highPtBoard)
void	setStripHighPtBoard (TGCHighPtBoard *highPtBoard)
int	getNumberOfWireHighPtBoard () const
void	deleteHPBOut ()
TGCSSCController *	getSSCController ()
void	setTMDB (std::shared_ptr< const LVL1TGC::TGCTMDB > tmdb)
void	setNSW (std::shared_ptr< const LVL1TGC::TGCNSW > nsw)
void	setBIS78 (std::shared_ptr< const LVL1TGC::TGCBIS78 > bis78)
void	showResult ()
int	getNumberOfSubSectorCluster () const
int	getNumberOfSubSector () const
void	dec2bin (int dec, char *binstr, int length)
int	getBid () const
void	setInnerTrackletSlots (const TGCInnerTrackletSlot *innerTrackletSlots[])
TGCArguments *	tgcArgs ()
const TGCArguments *	tgcArgs () const

Protected Types
enum	{ MaxNumberOfWireHighPtBoard =2 }

Protected Member Functions
void	collectInput ()
void	doInnerCoincidence (const SG::ReadCondHandleKey< TGCTriggerData > &readCondKey, int SSCId, TGCRPhiCoincidenceOut *coincidenceOut)
void	doInnerCoincidence (int SSCId, TGCRPhiCoincidenceOut *coincidenceOut)
void	doTGCNSWCoincidence (TGCRPhiCoincidenceOut *coincidenceOut)
bool	doTGCBIS78Coincidence (TGCRPhiCoincidenceOut *coincidenceOut)
bool	doTILECoincidence (TGCRPhiCoincidenceOut *coincidenceOut)
bool	doTGCEICoincidence (TGCRPhiCoincidenceOut *coincidenceOut)
bool	doTGCFICoincidence (TGCRPhiCoincidenceOut *coincidenceOut)

Private Member Functions
TGCSectorLogic &	operator= (const TGCSectorLogic &right)
bool	hitTileMu (const uint8_t &mask, const uint8_t &hit6, const uint8_t &hit56) const

Private Attributes
int	m_bid
int	m_id
LVL1TGC::TGCSide	m_sideId
int	m_sectorId
int	m_moduleId
int	m_octantId
TGCRegionType	m_region
int	m_NumberOfWireHighPtBoard
bool	m_useEIFI {false}
bool	m_useTileMu {false}
bool	m_useGoodMF {false}
bool	m_nswSide {false}
TGCSSCController	m_SSCController
TGCRPhiCoincidenceMatrix	m_matrix
const LVL1TGC::TGCEIFICoincidenceMap *	m_mapEIFI
std::shared_ptr< const LVL1TGC::TGCTileMuCoincidenceLUT >	m_tileMuLUT
std::shared_ptr< const LVL1TGC::TGCTMDB >	m_pTMDB
std::shared_ptr< const LVL1TGC::TGCNSW >	m_nsw
std::shared_ptr< const TGCNSWCoincidenceMap >	m_mapNSW
std::shared_ptr< const LVL1TGC::TGCBIS78 >	m_bis78
std::shared_ptr< const LVL1TGC::TGCBIS78CoincidenceMap >	m_mapBIS78
std::shared_ptr< const LVL1TGC::TGCGoodMF >	m_mapGoodMF
TGCTrackSelector	m_trackSelector
std::shared_ptr< TGCTrackSelectorOut >	m_trackSelectorOut
int	m_wordTileMuon
int	m_wordInnerStation
TGCHighPtBoard *	m_wireHighPtBoard [MaxNumberOfWireHighPtBoard]
TGCHighPtChipOut *	m_wireHighPtChipOut [MaxNumberOfWireHighPtBoard]
TGCHighPtBoard *	m_stripHighPtBoard
TGCHighPtChipOut *	m_stripHighPtChipOut
const TGCInnerTrackletSlot *	m_innerTrackletSlots [TGCInnerTrackletSlotHolder::NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR]
TGCArguments *	m_tgcArgs

Detailed Description

Definition at line 40 of file TGCSectorLogic.h.

Member Enumeration Documentation

anonymous enum

anonymous enum

protected

Enumerator
MaxNumberOfWireHighPtBoard

Definition at line 88 of file TGCSectorLogic.h.

{MaxNumberOfWireHighPtBoard =2};

Constructor & Destructor Documentation

TGCSectorLogic() [1/2]

LVL1TGCTrigger::TGCSectorLogic::TGCSectorLogic	(	TGCArguments *	tgcargs,
		const TGCDatabaseManager *	db,
		TGCRegionType	regionIn,
		int	id )

Definition at line 36 of file TGCSectorLogic.cxx.

 : m_bid(0),
   m_id(idIn),
   m_region(regionIn),
   m_NumberOfWireHighPtBoard(0), 
   m_SSCController(tgcargs,this), 
   m_matrix(tgcargs,this),
   m_pTMDB(0),
   m_trackSelector(this),
   m_wordTileMuon(0),
   m_wordInnerStation(0),
   m_stripHighPtBoard(0),
   m_stripHighPtChipOut(0),
   m_tgcArgs(tgcargs)
{
  m_sideId = static_cast<LVL1TGC::TGCSide>((idIn / NumberOfModule) / NumberOfOctant);
  m_octantId = (idIn / NumberOfModule) % NumberOfOctant;
  m_moduleId = idIn % NumberOfModule;
 
  if (m_region==TGCRegionType::ENDCAP) {
    m_sectorId  = m_moduleId%3 + 2*(m_moduleId/3);
    m_sectorId += 6*m_octantId;
  } else {
    m_sectorId  = m_moduleId/3; 
    m_sectorId += 3*m_octantId;
  }
 
  m_nswSide   =   (tgcArgs()->NSWSideInfo().find('A')!=std::string::npos && m_sideId == LVL1TGC::TGCSide::ASIDE)
               || (tgcArgs()->NSWSideInfo().find('C')!=std::string::npos && m_sideId == LVL1TGC::TGCSide::CSIDE);
 
  m_SSCController.setRegion(regionIn);
 
  m_matrix.setSideId(m_sideId);
  m_mapEIFI = db->getEIFICoincidenceMap(m_sideId);
 
  m_useTileMu = tgcArgs()->TILE_MU() && (m_region==TGCRegionType::ENDCAP);
 
  m_matrix.setCoincidenceLUT(db->getBigWheelCoincidenceLUT());
  m_tileMuLUT = db->getTileMuCoincidenceLUT();
  m_useTileMu = (m_tileMuLUT != nullptr) && m_useTileMu;
 
  m_mapGoodMF = db->getGoodMFMap();
  m_mapNSW = db->getNSWCoincidenceMap(m_sideId, m_octantId, m_moduleId);
  if(tgcArgs()->USE_BIS78()) m_mapBIS78 = db->getBIS78CoincidenceMap();
 
  m_trackSelectorOut.reset(new TGCTrackSelectorOut());
 
  for(int i=0; i<MaxNumberOfWireHighPtBoard; i++){
      m_wireHighPtBoard[i] = 0;
      m_wireHighPtChipOut[i] = 0;
  }
 
  for(unsigned int iSlot=0; iSlot<TGCInnerTrackletSlotHolder::NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR; iSlot++) {
    m_innerTrackletSlots[iSlot] = 0;
  }
 
  m_useEIFI  = tgcArgs()->USE_INNER() && (m_region==TGCRegionType::ENDCAP);
  if(m_mapEIFI == 0) m_useEIFI = false;
  m_useGoodMF = (m_mapGoodMF != nullptr);
  if(m_mapNSW == 0) tgcArgs()->set_USE_NSW(false);
  if(m_mapBIS78 == 0) tgcArgs()->set_USE_BIS78(false);
}

~TGCSectorLogic()

LVL1TGCTrigger::TGCSectorLogic::~TGCSectorLogic ( )

virtual

Definition at line 100 of file TGCSectorLogic.cxx.

{}

TGCSectorLogic() [2/2]

LVL1TGCTrigger::TGCSectorLogic::TGCSectorLogic

(

const TGCSectorLogic &

right

)

Definition at line 251 of file TGCSectorLogic.cxx.

 : m_bid(right.m_bid), m_id(right.m_id),
   m_sideId(right.m_sideId),
   m_sectorId(right.m_sectorId), m_moduleId(right.m_moduleId),
   m_octantId(right.m_octantId),
   m_region(right.m_region),
   m_NumberOfWireHighPtBoard(right.m_NumberOfWireHighPtBoard),
   m_useEIFI(right.m_useEIFI), m_useTileMu(right.m_useTileMu),
   m_useGoodMF(right.m_useGoodMF), m_nswSide(right.m_nswSide),
   m_SSCController(right.tgcArgs(),this), 
   m_matrix(right.tgcArgs(),this),
   m_mapEIFI(right.m_mapEIFI),
   m_pTMDB(right.m_pTMDB),
   m_wordTileMuon(0), m_wordInnerStation(0),
   m_stripHighPtBoard(right.m_stripHighPtBoard), 
   m_stripHighPtChipOut(0),
   m_tgcArgs(right.m_tgcArgs)
{
  for(int i=0; i<MaxNumberOfWireHighPtBoard; i++){
      m_wireHighPtBoard[i] = 0;
      m_wireHighPtChipOut[i] = 0;
  }
 
  for( int i = 0; i < m_SSCController.getNumberOfWireHighPtBoard(); i += 1) {
    m_wireHighPtBoard[i]   = right.m_wireHighPtBoard[i];
    m_wireHighPtChipOut[i] = right.m_wireHighPtChipOut[i];
  }
 
  for (unsigned int iSlot=0; iSlot<TGCInnerTrackletSlotHolder::NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR; iSlot++) {
    m_innerTrackletSlots[iSlot] = right.m_innerTrackletSlots[iSlot];
  }
}

Member Function Documentation

clockIn()

void LVL1TGCTrigger::TGCSectorLogic::clockIn	(	const SG::ReadCondHandleKey< TGCTriggerData > &	readCondKey,
		int	bidIn,
		bool	process = true )

Definition at line 137 of file TGCSectorLogic.cxx.

{
  // skip to process if want. (e.g. no hit in TGC)
  if(!process) return;
 
  m_bid=bidIn;
 
  collectInput();
 
  TGCSSCControllerOut* SSCCOut =
    m_SSCController.distribute(m_wireHighPtChipOut,m_stripHighPtChipOut);
#ifdef TGCDEBUG
  SSCCOut->print();
#endif  
  deleteHPBOut();
 
  for(int SSCid=0; SSCid<getNumberOfSubSectorCluster(); SSCid+=1){
    TGCRPhiCoincidenceOut* coincidenceOut = 0;
    if(SSCCOut->hasHit(SSCid)){
      m_matrix.clear();
      m_matrix.setSSCId(SSCid);
      m_matrix.inputR(SSCCOut->getR(SSCid),SSCCOut->getDR(SSCid),SSCCOut->getPtR(SSCid));
      for(int phiposInSSC = 0 ;phiposInSSC < TGCSSCControllerOut::MaxNumberOfPhiInSSC; phiposInSSC++){
        if(SSCCOut->hasHit(SSCid, phiposInSSC)){
          m_matrix.inputPhi(SSCCOut->getPhi(SSCid,phiposInSSC),
                          SSCCOut->getDPhi(SSCid,phiposInSSC),
                          SSCCOut->getPtPhi(SSCid,phiposInSSC));
        }
      }
      coincidenceOut = m_matrix.doCoincidence();
    }
    if(SSCCOut->hasHit(SSCid,true)){
      m_matrix.clear();
      m_matrix.setSSCId(SSCid);
      m_matrix.inputR(SSCCOut->getR(SSCid),SSCCOut->getDR(SSCid),SSCCOut->getPtR(SSCid));
      for(int phiposInSSC = 0 ;phiposInSSC < TGCSSCControllerOut::MaxNumberOfPhiInSSC; phiposInSSC++){
        if(SSCCOut->hasHit(SSCid, phiposInSSC, true)){
          m_matrix.inputPhi(SSCCOut->getPhi(SSCid,phiposInSSC,true),
                          SSCCOut->getDPhi(SSCid,phiposInSSC,true),
                          SSCCOut->getPtPhi(SSCid,phiposInSSC,true));
        }
      }
      
      TGCRPhiCoincidenceOut* oredCoincidenceOut = m_matrix.doCoincidence();
      if (oredCoincidenceOut) {
    if(coincidenceOut) {
      if (coincidenceOut->isSuperior(oredCoincidenceOut)) {
        delete oredCoincidenceOut;
      } else {
        delete coincidenceOut;
        coincidenceOut = oredCoincidenceOut;
      }
    } else {
      coincidenceOut = oredCoincidenceOut;
    }
      }
    }
 
    if (coincidenceOut) {
      if (m_useGoodMF) {
        bool isgoodMF = m_mapGoodMF->test_GoodMF(m_moduleId,SSCid,coincidenceOut->getRoI());
        coincidenceOut->setGoodMFFlag(isgoodMF);
      }
    }

    // do coincidence with Inner Tracklet of EI, NSW, Tile, and/or RPC-BIS78
    doInnerCoincidence(SSCid, coincidenceOut);
 
    if (coincidenceOut) {
      m_trackSelector.input(coincidenceOut);
    }
  }
  if(SSCCOut!=0) delete SSCCOut;
  SSCCOut=0;
 
  // Track selector chooses up to 4 track candidates to be sent to MUCTPI.
  m_trackSelector.select(m_trackSelectorOut);
}

collectInput()

void LVL1TGCTrigger::TGCSectorLogic::collectInput ( )

protected

Definition at line 219 of file TGCSectorLogic.cxx.

{
  for(int i = 0; i < m_SSCController.getNumberOfWireHighPtBoard(); i += 1) {
    m_wireHighPtChipOut[i] = m_wireHighPtBoard[i]->getOutput();
    m_wireHighPtBoard[i]->eraseOutput();
  }  
 
  m_stripHighPtChipOut = m_stripHighPtBoard->getOutput();
  m_stripHighPtBoard->eraseOutput();
}

dec2bin()

void LVL1TGCTrigger::TGCSectorLogic::dec2bin	(	int	dec,
		char *	binstr,
		int	length )

Definition at line 318 of file TGCSectorLogic.cxx.

{
  for (int i=0; i<length; i++){
    if((dec>>i) & 1)
      binstr[length-1-i] = '1';
    else
      binstr[length-1-i] = '0';
  }
  binstr[length] ='\0';
}

deleteHPBOut()

void LVL1TGCTrigger::TGCSectorLogic::deleteHPBOut

(

)

Definition at line 230 of file TGCSectorLogic.cxx.

{
  if(m_stripHighPtChipOut!=0) delete m_stripHighPtChipOut;
  m_stripHighPtChipOut=0;
 
  int i;
  for( i = 0; i < m_SSCController.getNumberOfWireHighPtBoard(); i += 1) {
    if(m_wireHighPtChipOut[i]!=0) delete m_wireHighPtChipOut[i];
    m_wireHighPtChipOut[i]=0;
  }
}

doInnerCoincidence() [1/2]

void LVL1TGCTrigger::TGCSectorLogic::doInnerCoincidence ( const SG::ReadCondHandleKey< TGCTriggerData > & readCondKey, int SSCId, TGCRPhiCoincidenceOut * coincidenceOut )

protected

doInnerCoincidence() [2/2]

void LVL1TGCTrigger::TGCSectorLogic::doInnerCoincidence ( int SSCId, TGCRPhiCoincidenceOut * coincidenceOut )

protected

Definition at line 337 of file TGCSectorLogic.cxx.

                                                                                        {
  if (coincidenceOut == 0) return;
 
  int pt = coincidenceOut->getpT();
  if (pt==0) return;
 
  if(SSCId <= 4 && m_region == TGCRegionType::ENDCAP){  //3 detectors are used to inner coincidnece in SSC#0~4 in Endcap;  
 
      // WHICH INNER COINCIDENCE
      // select a inner station detector which is used in inner coincidence algorithm.
      //Defenation of innerDetectorNumber :: enum{EI=0,TILE,BIS78};
 
      /*int innerDetectorNumber = which_InnerCoincidence();*/ //this function will be implemented.
 
      // The below section is a tmporary method. It will be replaced with WICHINNER COINCIDENCE.  
      int pos = 4*coincidenceOut->getR() +  coincidenceOut->getPhi();
      // check if inner is used for the roi 
      bool validEI = (m_mapEIFI->getFlagROI(pos, coincidenceOut->getIdSSC(), m_sectorId) == 1);
      // check if TileMu is used for the roi 
      bool validTileMu = (m_tileMuLUT->getFlagROI(pos, coincidenceOut->getIdSSC(), m_sectorId, m_sideId) == 1);
      bool validBIS78 = false;
      if(tgcArgs()->USE_BIS78()) validBIS78=(m_mapBIS78->getFlagROI(pos, coincidenceOut->getIdSSC(), m_sectorId, m_sideId) == 1);
 
      bool isEI=false;
      bool isTILE=false;
      bool isBIS78=false;
      if(m_useEIFI && validEI){isEI=doTGCEICoincidence(coincidenceOut);}
      if(m_useTileMu && validTileMu){isTILE=doTILECoincidence(coincidenceOut); }
      if(validBIS78){isBIS78=doTGCBIS78Coincidence(coincidenceOut); }
 
      coincidenceOut->setInnerCoincidenceFlag(isEI || isTILE || isBIS78 || (!m_useEIFI && !validEI && !m_useTileMu && !validTileMu && !tgcArgs()->USE_BIS78() && !validBIS78));
  } else {
    //  NSW or FI are used to inner coincidnece in SSC#5~18 in Endcap and Forward region 
      int pos = 4*coincidenceOut->getR() +  coincidenceOut->getPhi();
      bool validFI = (m_mapEIFI->getFlagROI(pos, coincidenceOut->getIdSSC(), m_sectorId) == 1) && m_region == TGCRegionType::ENDCAP;
 
      if(tgcArgs()->USE_NSW() && m_nswSide){
    if(tgcArgs()->FORCE_NSW_COIN()){
      coincidenceOut->setInnerCoincidenceFlag(true);
    }
    else{
      doTGCNSWCoincidence(coincidenceOut);
    }
      }
      else if(!m_nswSide && validFI){
    if(m_useEIFI){
      coincidenceOut->setInnerCoincidenceFlag( doTGCFICoincidence(coincidenceOut) );
    }
    } else {
      coincidenceOut->setInnerCoincidenceFlag(true);   // TBD
    }
  }
}

doTGCBIS78Coincidence()

bool LVL1TGCTrigger::TGCSectorLogic::doTGCBIS78Coincidence ( TGCRPhiCoincidenceOut * coincidenceOut )

protected

Definition at line 402 of file TGCSectorLogic.cxx.

                                                                               {
  std::shared_ptr<const LVL1TGC::BIS78TrigOut> pBIS78Out = m_bis78->getOutput(m_sectorId);
  if ( pBIS78Out.get() == 0 ) return false;
  int pt=0;
    
  pt = m_mapBIS78->TGCBIS78_pt(pBIS78Out.get(),     
                               coincidenceOut->getRoI());
 
  return (pt > 0);
}

doTGCEICoincidence()

bool LVL1TGCTrigger::TGCSectorLogic::doTGCEICoincidence ( TGCRPhiCoincidenceOut * coincidenceOut )

protected

Definition at line 431 of file TGCSectorLogic.cxx.

                                                                            {
 
    bool isHitInner=false;
    for(unsigned int iSlot=0;iSlot<TGCInnerTrackletSlotHolder::NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR; iSlot++) {
      const TGCInnerTrackletSlot* hit = m_innerTrackletSlots[iSlot];
      
      for (size_t reg=0;reg< TGCInnerTrackletSlot::NUMBER_OF_REGIONS; reg++){
 
    // Wire    
    bool isHitWire = false;
    for (size_t bit=0; bit< TGCInnerTrackletSlot::NUMBER_OF_TRIGGER_BITS; bit++){
      isHitWire =   m_mapEIFI->getTriggerBit(iSlot, coincidenceOut->getIdSSC(), m_sectorId, reg, TGCInnerTrackletSlot::WIRE, bit)
        &&   hit->getTriggerBit(reg,TGCInnerTrackletSlot::WIRE,bit) ;
      if(isHitWire){break;}
    }
 
    // Strip
    bool isHitStrip = false;
    for (size_t bit=0;bit< TGCInnerTrackletSlot::NUMBER_OF_TRIGGER_BITS; bit++){
      isHitStrip =  m_mapEIFI->getTriggerBit(iSlot, coincidenceOut->getIdSSC(), m_sectorId, reg, TGCInnerTrackletSlot::STRIP, bit)
        && hit->getTriggerBit(reg,TGCInnerTrackletSlot::STRIP,bit);
      if(isHitStrip){break;}
    }
 
    isHitInner = isHitWire && isHitStrip;
    if(isHitInner){
      return true;
    }
      }
 
    }
 
    return false;
}

doTGCFICoincidence()

bool LVL1TGCTrigger::TGCSectorLogic::doTGCFICoincidence ( TGCRPhiCoincidenceOut * coincidenceOut )

protected

Definition at line 467 of file TGCSectorLogic.cxx.

                                                                            {
   return doTGCEICoincidence(coincidenceOut);
}

doTGCNSWCoincidence()

void LVL1TGCTrigger::TGCSectorLogic::doTGCNSWCoincidence ( TGCRPhiCoincidenceOut * coincidenceOut )

protected

Definition at line 392 of file TGCSectorLogic.cxx.

                                                                             {
  std::shared_ptr<const LVL1TGC::NSWTrigOut> pNSWOut = m_nsw->getOutput(m_region,m_sideId,m_sectorId);
 
  // for now, if there is a hit at NSW and the side is included in the detector mask, turn on the inner coin flag
  coincidenceOut->setInnerCoincidenceFlag( pNSWOut->getNSWeta().size()>0 && m_nswSide);
  return;
 
  // will implement NSW pT calculation later
}

doTILECoincidence()

bool LVL1TGCTrigger::TGCSectorLogic::doTILECoincidence ( TGCRPhiCoincidenceOut * coincidenceOut )

protected

Definition at line 413 of file TGCSectorLogic.cxx.

{
  // The function is called for Run-3 algorithim, but the Run-2 algorithm is 
  // temporarily used for instance.
 
  bool isHitTileMu=false;
  for(int mod=0; mod < LVL1TGC::TGCTileMuCoincidenceLUT::N_Input_TileMuModule; mod++) {
    uint8_t maskTM = (uint8_t)(m_tileMuLUT->getTrigMask(mod, coincidenceOut->getIdSSC(), m_sectorId, m_sideId));
    std::shared_ptr<const LVL1TGC::TGCTMDBOut> tm = m_pTMDB->getOutput(m_sideId, m_sectorId, mod); 
    isHitTileMu = isHitTileMu || this->hitTileMu(maskTM, tm->getHit6(), tm->getHit56());
  }
 
  return isHitTileMu;
}

getBid()

int LVL1TGCTrigger::TGCSectorLogic::getBid ( ) const

inline

Definition at line 80 of file TGCSectorLogic.h.

{return m_bid;};

getId()

int LVL1TGCTrigger::TGCSectorLogic::getId ( ) const

inline

Definition at line 171 of file TGCSectorLogic.h.

{
  return m_id;
}

getInnerStationWord()

int LVL1TGCTrigger::TGCSectorLogic::getInnerStationWord ( ) const

inline

Definition at line 202 of file TGCSectorLogic.h.

{
  return m_wordInnerStation;
}

getModuleID()

int LVL1TGCTrigger::TGCSectorLogic::getModuleID ( ) const

inline

Definition at line 177 of file TGCSectorLogic.h.

{
  return m_moduleId;
}

getNumberOfSubSector()

int LVL1TGCTrigger::TGCSectorLogic::getNumberOfSubSector ( ) const

inline

Definition at line 158 of file TGCSectorLogic.h.

{
  return (m_region == TGCRegionType::FORWARD) ? 8 * LVL1TGC::kNRoiInSSC : LVL1TGC::kNumberOfEndcapRoI;
}

getNumberOfSubSectorCluster()

int LVL1TGCTrigger::TGCSectorLogic::getNumberOfSubSectorCluster ( ) const

inline

Definition at line 152 of file TGCSectorLogic.h.

{
  return (m_region == TGCRegionType::FORWARD) ? 8 : LVL1TGC::kNMaxSSC;
}

getNumberOfWireHighPtBoard()

int LVL1TGCTrigger::TGCSectorLogic::getNumberOfWireHighPtBoard ( ) const

inline

Definition at line 164 of file TGCSectorLogic.h.

{
  return m_NumberOfWireHighPtBoard; 
}

getOctantID()

int LVL1TGCTrigger::TGCSectorLogic::getOctantID ( ) const

inline

Definition at line 184 of file TGCSectorLogic.h.

{
  return m_octantId;
}

getRegion()

TGCRegionType LVL1TGCTrigger::TGCSectorLogic::getRegion ( ) const

inline

Definition at line 61 of file TGCSectorLogic.h.

{ return m_region;};

getSideID()

int LVL1TGCTrigger::TGCSectorLogic::getSideID ( ) const

inline

Definition at line 190 of file TGCSectorLogic.h.

{
  return m_sideId;
}

getSSCController()

TGCSSCController * LVL1TGCTrigger::TGCSectorLogic::getSSCController ( )

inline

Definition at line 68 of file TGCSectorLogic.h.

{return &m_SSCController;};

getTileMuonWord()

int LVL1TGCTrigger::TGCSectorLogic::getTileMuonWord ( ) const

inline

Definition at line 196 of file TGCSectorLogic.h.

{
  return m_wordTileMuon;
}

getTrackSelectorOutput()

void LVL1TGCTrigger::TGCSectorLogic::getTrackSelectorOutput

(

std::shared_ptr< TGCTrackSelectorOut > &

trackSelectorOut

)

const

Definition at line 132 of file TGCSectorLogic.cxx.

{
  trackSelectorOut=m_trackSelectorOut;
}

hitTileMu()

bool LVL1TGCTrigger::TGCSectorLogic::hitTileMu ( const uint8_t & mask, const uint8_t & hit6, const uint8_t & hit56 ) const

private

returns whether TMDBOut satisfies the Tile-CW mask (Run-2 algo.)

Parameters

[in]	mask	Trigger mask per TMDB module (3 bits)
[in]	hit6	TMDBOut for D6
[in]	hit56	TMDBOut for D5+D6

Definition at line 472 of file TGCSectorLogic.cxx.

{
  switch(mask) {
    case LVL1TGC::TGCTileMuCoincidenceLUT::TM_D6_L:
      return (hit6==LVL1TGC::TGCTMDBOut::TM_LOW || hit6==LVL1TGC::TGCTMDBOut::TM_HIGH);
      break;
    case LVL1TGC::TGCTileMuCoincidenceLUT::TM_D6_H:
      return (hit6==LVL1TGC::TGCTMDBOut::TM_HIGH);
      break;
    case LVL1TGC::TGCTileMuCoincidenceLUT::TM_D56_L:
      return (hit56==LVL1TGC::TGCTMDBOut::TM_LOW || hit56==LVL1TGC::TGCTMDBOut::TM_HIGH);
      break;
    case LVL1TGC::TGCTileMuCoincidenceLUT::TM_D56_H:
      return (hit56==LVL1TGC::TGCTMDBOut::TM_HIGH);
      break;
    default:
      return false;
      break;
  }
  return true;
}

operator=()

TGCSectorLogic & LVL1TGCTrigger::TGCSectorLogic::operator= ( const TGCSectorLogic & right )

private

Definition at line 285 of file TGCSectorLogic.cxx.

{
  if ( this != &right ) {
    m_tgcArgs = right.m_tgcArgs;
    m_matrix = right.m_matrix;
    m_bid =right.m_bid;
    m_id  =right.m_id;
    m_sideId = right.m_sideId;
    m_sectorId=right.m_sectorId;
    m_moduleId=right.m_moduleId;
    m_octantId=right.m_octantId;
    m_region=right.m_region;
    m_NumberOfWireHighPtBoard=right.m_NumberOfWireHighPtBoard;
    m_mapEIFI=right.m_mapEIFI;
    m_pTMDB=right.m_pTMDB;
    m_wordTileMuon=0;
    m_wordInnerStation=0;
    m_stripHighPtBoard=right.m_stripHighPtBoard;  
    m_stripHighPtChipOut=0;
    m_useEIFI=right.m_useEIFI;
    m_useTileMu=right.m_useTileMu;
    for( int i = 0; i < m_SSCController.getNumberOfWireHighPtBoard(); i += 1) {
      m_wireHighPtBoard[i]   = right.m_wireHighPtBoard[i];
      m_wireHighPtChipOut[i] = right.m_wireHighPtChipOut[i];
    }
    for (unsigned int iSlot=0; iSlot<TGCInnerTrackletSlotHolder::NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR; iSlot++) {
      m_innerTrackletSlots[iSlot] = right.m_innerTrackletSlots[iSlot];
    }
  }
  return *this;
}

setBIS78()

void LVL1TGCTrigger::TGCSectorLogic::setBIS78

(

std::shared_ptr< const LVL1TGC::TGCBIS78 >

bis78

)

Definition at line 115 of file TGCSectorLogic.cxx.

{
  m_bis78 = std::move(bis78);
  if(m_bis78 == 0) tgcArgs()->set_USE_BIS78(false);
}

setInnerTrackletSlots()

void LVL1TGCTrigger::TGCSectorLogic::setInnerTrackletSlots

(

const TGCInnerTrackletSlot *

innerTrackletSlots[]

)

Definition at line 329 of file TGCSectorLogic.cxx.

{
  for(unsigned int iSlot=0; iSlot<TGCInnerTrackletSlotHolder::NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR; iSlot++) {
    m_innerTrackletSlots[iSlot] = innerTrackletSlots[iSlot];
  }
}

setNSW()

void LVL1TGCTrigger::TGCSectorLogic::setNSW

(

std::shared_ptr< const LVL1TGC::TGCNSW >

nsw

)

Definition at line 109 of file TGCSectorLogic.cxx.

{
  m_nsw = std::move(nsw);
  if(m_nsw == 0) tgcArgs()->set_USE_NSW(false);
}

setStripHighPtBoard()

void LVL1TGCTrigger::TGCSectorLogic::setStripHighPtBoard

(

TGCHighPtBoard *

highPtBoard

)

Definition at line 127 of file TGCSectorLogic.cxx.

{
  m_stripHighPtBoard = highPtBoard;    
}

setTMDB()

void LVL1TGCTrigger::TGCSectorLogic::setTMDB

(

std::shared_ptr< const LVL1TGC::TGCTMDB >

tmdb

)

Definition at line 103 of file TGCSectorLogic.cxx.

{
  m_pTMDB = std::move(tmdb);
  if (m_pTMDB==0) m_useTileMu = false;
}

setWireHighPtBoard()

void LVL1TGCTrigger::TGCSectorLogic::setWireHighPtBoard	(	int	port,
		TGCHighPtBoard *	highPtBoard )

Definition at line 121 of file TGCSectorLogic.cxx.

{
  m_wireHighPtBoard[port] = highPtBoard;
  m_NumberOfWireHighPtBoard +=1;
}

showResult()

void LVL1TGCTrigger::TGCSectorLogic::showResult

(

)

Definition at line 243 of file TGCSectorLogic.cxx.

{
  std::cout<<"#SL O"<<" BID:"<<m_bid
       <<" region:"<<((m_region == TGCRegionType::FORWARD) ? "FWD" : "END")
       <<" SLid:"<<m_id<<" ";
}

tgcArgs() [1/2]

TGCArguments * LVL1TGCTrigger::TGCSectorLogic::tgcArgs ( )

inline

Definition at line 84 of file TGCSectorLogic.h.

{ return m_tgcArgs; }

tgcArgs() [2/2]

const TGCArguments * LVL1TGCTrigger::TGCSectorLogic::tgcArgs ( ) const

inline

Definition at line 85 of file TGCSectorLogic.h.

{ return m_tgcArgs; }

Member Data Documentation

m_bid

int LVL1TGCTrigger::TGCSectorLogic::m_bid

private

Definition at line 108 of file TGCSectorLogic.h.

m_bis78

std::shared_ptr<const LVL1TGC::TGCBIS78> LVL1TGCTrigger::TGCSectorLogic::m_bis78

private

Definition at line 131 of file TGCSectorLogic.h.

m_id

int LVL1TGCTrigger::TGCSectorLogic::m_id

private

Definition at line 110 of file TGCSectorLogic.h.

m_innerTrackletSlots

const TGCInnerTrackletSlot* LVL1TGCTrigger::TGCSectorLogic::m_innerTrackletSlots[TGCInnerTrackletSlotHolder::NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR]

private

Definition at line 147 of file TGCSectorLogic.h.

m_mapBIS78

std::shared_ptr<const LVL1TGC::TGCBIS78CoincidenceMap> LVL1TGCTrigger::TGCSectorLogic::m_mapBIS78

private

Definition at line 132 of file TGCSectorLogic.h.

m_mapEIFI

const LVL1TGC::TGCEIFICoincidenceMap* LVL1TGCTrigger::TGCSectorLogic::m_mapEIFI

private

Definition at line 126 of file TGCSectorLogic.h.

m_mapGoodMF

std::shared_ptr<const LVL1TGC::TGCGoodMF> LVL1TGCTrigger::TGCSectorLogic::m_mapGoodMF

private

Definition at line 133 of file TGCSectorLogic.h.

m_mapNSW

std::shared_ptr<const TGCNSWCoincidenceMap> LVL1TGCTrigger::TGCSectorLogic::m_mapNSW

private

Definition at line 130 of file TGCSectorLogic.h.

m_matrix

TGCRPhiCoincidenceMatrix LVL1TGCTrigger::TGCSectorLogic::m_matrix

private

Definition at line 125 of file TGCSectorLogic.h.

m_moduleId

int LVL1TGCTrigger::TGCSectorLogic::m_moduleId

private

Definition at line 112 of file TGCSectorLogic.h.

m_nsw

std::shared_ptr<const LVL1TGC::TGCNSW> LVL1TGCTrigger::TGCSectorLogic::m_nsw

private

Definition at line 129 of file TGCSectorLogic.h.

m_nswSide

bool LVL1TGCTrigger::TGCSectorLogic::m_nswSide {false}

private

Definition at line 120 of file TGCSectorLogic.h.

{false};

m_NumberOfWireHighPtBoard

int LVL1TGCTrigger::TGCSectorLogic::m_NumberOfWireHighPtBoard

private

Definition at line 115 of file TGCSectorLogic.h.

m_octantId

int LVL1TGCTrigger::TGCSectorLogic::m_octantId

private

Definition at line 113 of file TGCSectorLogic.h.

m_pTMDB

std::shared_ptr<const LVL1TGC::TGCTMDB> LVL1TGCTrigger::TGCSectorLogic::m_pTMDB

private

Definition at line 128 of file TGCSectorLogic.h.

m_region

TGCRegionType LVL1TGCTrigger::TGCSectorLogic::m_region

private

Definition at line 114 of file TGCSectorLogic.h.

m_sectorId

int LVL1TGCTrigger::TGCSectorLogic::m_sectorId

private

Definition at line 112 of file TGCSectorLogic.h.

m_sideId

LVL1TGC::TGCSide LVL1TGCTrigger::TGCSectorLogic::m_sideId

private

Definition at line 111 of file TGCSectorLogic.h.

m_SSCController

TGCSSCController LVL1TGCTrigger::TGCSectorLogic::m_SSCController

private

Definition at line 122 of file TGCSectorLogic.h.

m_stripHighPtBoard

TGCHighPtBoard* LVL1TGCTrigger::TGCSectorLogic::m_stripHighPtBoard

private

Definition at line 143 of file TGCSectorLogic.h.

m_stripHighPtChipOut

TGCHighPtChipOut* LVL1TGCTrigger::TGCSectorLogic::m_stripHighPtChipOut

private

Definition at line 144 of file TGCSectorLogic.h.

m_tgcArgs

TGCArguments* LVL1TGCTrigger::TGCSectorLogic::m_tgcArgs

private

Definition at line 148 of file TGCSectorLogic.h.

m_tileMuLUT

std::shared_ptr<const LVL1TGC::TGCTileMuCoincidenceLUT> LVL1TGCTrigger::TGCSectorLogic::m_tileMuLUT

private

Definition at line 127 of file TGCSectorLogic.h.

m_trackSelector

TGCTrackSelector LVL1TGCTrigger::TGCSectorLogic::m_trackSelector

private

Definition at line 135 of file TGCSectorLogic.h.

m_trackSelectorOut

std::shared_ptr<TGCTrackSelectorOut> LVL1TGCTrigger::TGCSectorLogic::m_trackSelectorOut

private

Definition at line 136 of file TGCSectorLogic.h.

m_useEIFI

bool LVL1TGCTrigger::TGCSectorLogic::m_useEIFI {false}

private

Definition at line 117 of file TGCSectorLogic.h.

{false};

m_useGoodMF

bool LVL1TGCTrigger::TGCSectorLogic::m_useGoodMF {false}

private

Definition at line 119 of file TGCSectorLogic.h.

{false};

m_useTileMu

bool LVL1TGCTrigger::TGCSectorLogic::m_useTileMu {false}

private

Definition at line 118 of file TGCSectorLogic.h.

{false};

m_wireHighPtBoard

TGCHighPtBoard* LVL1TGCTrigger::TGCSectorLogic::m_wireHighPtBoard[MaxNumberOfWireHighPtBoard]

private

Definition at line 141 of file TGCSectorLogic.h.

m_wireHighPtChipOut

TGCHighPtChipOut* LVL1TGCTrigger::TGCSectorLogic::m_wireHighPtChipOut[MaxNumberOfWireHighPtBoard]

private

Definition at line 142 of file TGCSectorLogic.h.

m_wordInnerStation

int LVL1TGCTrigger::TGCSectorLogic::m_wordInnerStation

private

Definition at line 139 of file TGCSectorLogic.h.

m_wordTileMuon

int LVL1TGCTrigger::TGCSectorLogic::m_wordTileMuon

private

Definition at line 138 of file TGCSectorLogic.h.

---

The documentation for this class was generated from the following files:

• TGCSectorLogic.h
• TGCSectorLogic.cxx