|
ATLAS Offline Software
|
#include <TGCSectorLogic.h>
Definition at line 41 of file TGCSectorLogic.h.
◆ anonymous enum
◆ TGCSectorLogic() [1/2]
◆ ~TGCSectorLogic()
LVL1TGCTrigger::TGCSectorLogic::~TGCSectorLogic |
( |
| ) |
|
|
virtual |
◆ TGCSectorLogic() [2/2]
◆ clockIn()
Definition at line 132 of file TGCSectorLogic.cxx.
142 TGCSSCControllerOut* SSCCOut =
150 TGCRPhiCoincidenceOut* coincidenceOut = 0;
151 if(SSCCOut->hasHit(SSCid)){
154 m_matrix.
inputR(SSCCOut->getR(SSCid),SSCCOut->getDR(SSCid),SSCCOut->getPtR(SSCid));
156 if(SSCCOut->hasHit(SSCid, phiposInSSC)){
158 SSCCOut->getDPhi(SSCid,phiposInSSC),
159 SSCCOut->getPtPhi(SSCid,phiposInSSC));
165 if(SSCCOut->hasHit(SSCid,
true)){
168 m_matrix.
inputR(SSCCOut->getR(SSCid),SSCCOut->getDR(SSCid),SSCCOut->getPtR(SSCid));
170 if(SSCCOut->hasHit(SSCid, phiposInSSC,
true)){
172 SSCCOut->getDPhi(SSCid,phiposInSSC,
true),
173 SSCCOut->getPtPhi(SSCid,phiposInSSC,
true));
178 if (oredCoincidenceOut) {
180 if (coincidenceOut->isSuperior(oredCoincidenceOut)) {
181 delete oredCoincidenceOut;
183 delete coincidenceOut;
184 coincidenceOut = oredCoincidenceOut;
187 coincidenceOut = oredCoincidenceOut;
192 if (coincidenceOut) {
195 coincidenceOut->setGoodMFFlag(isgoodMF);
203 if (coincidenceOut) {
207 if(SSCCOut!=0)
delete SSCCOut;
◆ collectInput()
void LVL1TGCTrigger::TGCSectorLogic::collectInput |
( |
| ) |
|
|
protected |
◆ dec2bin()
void LVL1TGCTrigger::TGCSectorLogic::dec2bin |
( |
int |
dec, |
|
|
char * |
binstr, |
|
|
int |
length |
|
) |
| |
◆ deleteHPBOut()
void LVL1TGCTrigger::TGCSectorLogic::deleteHPBOut |
( |
| ) |
|
◆ doInnerCoincidence() [1/2]
◆ doInnerCoincidence() [2/2]
void LVL1TGCTrigger::TGCSectorLogic::doInnerCoincidence |
( |
int |
SSCId, |
|
|
TGCRPhiCoincidenceOut * |
coincidenceOut |
|
) |
| |
|
protected |
Definition at line 332 of file TGCSectorLogic.cxx.
333 if (coincidenceOut == 0)
return;
335 int pt = coincidenceOut->getpT();
347 int pos = 4*coincidenceOut->getR() + coincidenceOut->getPhi();
352 bool validBIS78 =
false;
362 coincidenceOut->setInnerCoincidenceFlag(isEI || isTILE || isBIS78 || (!
m_useEIFI && !validEI && !
m_useTileMu && !validTileMu && !
tgcArgs()->USE_BIS78() && !validBIS78));
365 int pos = 4*coincidenceOut->getR() + coincidenceOut->getPhi();
370 coincidenceOut->setInnerCoincidenceFlag(
true);
381 coincidenceOut->setInnerCoincidenceFlag(
true);
◆ doTGCBIS78Coincidence()
Definition at line 397 of file TGCSectorLogic.cxx.
398 std::shared_ptr<const LVL1TGC::BIS78TrigOut> pBIS78Out =
m_bis78->getOutput(
m_sectorId);
399 if ( pBIS78Out.get() == 0 )
return false;
403 coincidenceOut->getRoI());
◆ doTGCEICoincidence()
Definition at line 426 of file TGCSectorLogic.cxx.
428 bool isHitInner=
false;
435 bool isHitWire =
false;
439 if(isHitWire){
break;}
443 bool isHitStrip =
false;
447 if(isHitStrip){
break;}
450 isHitInner = isHitWire && isHitStrip;
◆ doTGCFICoincidence()
◆ doTGCNSWCoincidence()
◆ doTILECoincidence()
◆ getBid()
int LVL1TGCTrigger::TGCSectorLogic::getBid |
( |
| ) |
const |
|
inline |
◆ getId()
int LVL1TGCTrigger::TGCSectorLogic::getId |
( |
| ) |
const |
|
inline |
◆ getInnerStationWord()
int LVL1TGCTrigger::TGCSectorLogic::getInnerStationWord |
( |
| ) |
const |
|
inline |
◆ getModuleID()
int LVL1TGCTrigger::TGCSectorLogic::getModuleID |
( |
| ) |
const |
|
inline |
◆ getNumberOfSubSector()
int LVL1TGCTrigger::TGCSectorLogic::getNumberOfSubSector |
( |
| ) |
const |
|
inline |
◆ getNumberOfSubSectorCluster()
int LVL1TGCTrigger::TGCSectorLogic::getNumberOfSubSectorCluster |
( |
| ) |
const |
|
inline |
◆ getNumberOfWireHighPtBoard()
int LVL1TGCTrigger::TGCSectorLogic::getNumberOfWireHighPtBoard |
( |
| ) |
const |
|
inline |
◆ getOctantID()
int LVL1TGCTrigger::TGCSectorLogic::getOctantID |
( |
| ) |
const |
|
inline |
◆ getRegion()
TGCRegionType LVL1TGCTrigger::TGCSectorLogic::getRegion |
( |
| ) |
const |
|
inline |
◆ getSideID()
int LVL1TGCTrigger::TGCSectorLogic::getSideID |
( |
| ) |
const |
|
inline |
◆ getSSCController()
◆ getTileMuonWord()
int LVL1TGCTrigger::TGCSectorLogic::getTileMuonWord |
( |
| ) |
const |
|
inline |
◆ getTrackSelectorOutput()
void LVL1TGCTrigger::TGCSectorLogic::getTrackSelectorOutput |
( |
std::shared_ptr< TGCTrackSelectorOut > & |
trackSelectorOut | ) |
const |
◆ hitTileMu()
bool LVL1TGCTrigger::TGCSectorLogic::hitTileMu |
( |
const uint8_t & |
mask, |
|
|
const uint8_t & |
hit6, |
|
|
const uint8_t & |
hit56 |
|
) |
| const |
|
private |
returns whether TMDBOut satisfies the Tile-CW mask (Run-2 algo.)
- Parameters
-
[in] | mask | Trigger mask per TMDB module (3 bits) |
[in] | hit6 | TMDBOut for D6 |
[in] | hit56 | TMDBOut for D5+D6 |
Definition at line 467 of file TGCSectorLogic.cxx.
◆ operator=()
◆ setBIS78()
◆ setInnerTrackletSlots()
◆ setNSW()
◆ setStripHighPtBoard()
void LVL1TGCTrigger::TGCSectorLogic::setStripHighPtBoard |
( |
TGCHighPtBoard * |
highPtBoard | ) |
|
◆ setTMDB()
◆ setWireHighPtBoard()
void LVL1TGCTrigger::TGCSectorLogic::setWireHighPtBoard |
( |
int |
port, |
|
|
TGCHighPtBoard * |
highPtBoard |
|
) |
| |
◆ showResult()
void LVL1TGCTrigger::TGCSectorLogic::showResult |
( |
| ) |
|
◆ tgcArgs() [1/2]
◆ tgcArgs() [2/2]
◆ m_bid
int LVL1TGCTrigger::TGCSectorLogic::m_bid |
|
private |
◆ m_bis78
◆ m_id
int LVL1TGCTrigger::TGCSectorLogic::m_id |
|
private |
◆ m_innerTrackletSlots
◆ m_mapBIS78
◆ m_mapEIFI
◆ m_mapGoodMF
◆ m_mapNSW
◆ m_matrix
◆ m_moduleId
int LVL1TGCTrigger::TGCSectorLogic::m_moduleId |
|
private |
◆ m_nsw
◆ m_nswSide
bool LVL1TGCTrigger::TGCSectorLogic::m_nswSide {false} |
|
private |
◆ m_NumberOfWireHighPtBoard
int LVL1TGCTrigger::TGCSectorLogic::m_NumberOfWireHighPtBoard |
|
private |
◆ m_octantId
int LVL1TGCTrigger::TGCSectorLogic::m_octantId |
|
private |
◆ m_pTMDB
◆ m_region
◆ m_sectorId
int LVL1TGCTrigger::TGCSectorLogic::m_sectorId |
|
private |
◆ m_sideId
◆ m_SSCController
◆ m_stripHighPtBoard
◆ m_stripHighPtChipOut
◆ m_tgcArgs
◆ m_tileMuLUT
◆ m_trackSelector
◆ m_trackSelectorOut
◆ m_useEIFI
bool LVL1TGCTrigger::TGCSectorLogic::m_useEIFI {false} |
|
private |
◆ m_useGoodMF
bool LVL1TGCTrigger::TGCSectorLogic::m_useGoodMF {false} |
|
private |
◆ m_useTileMu
bool LVL1TGCTrigger::TGCSectorLogic::m_useTileMu {false} |
|
private |
◆ m_wireHighPtBoard
◆ m_wireHighPtChipOut
◆ m_wordInnerStation
int LVL1TGCTrigger::TGCSectorLogic::m_wordInnerStation |
|
private |
◆ m_wordTileMuon
int LVL1TGCTrigger::TGCSectorLogic::m_wordTileMuon |
|
private |
The documentation for this class was generated from the following files:
TGCSSCControllerOut * distribute(TGCHighPtChipOut *wire[], TGCHighPtChipOut *strip)
const TGCInnerTrackletSlot * m_innerTrackletSlots[TGCInnerTrackletSlotHolder::NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR]
void inputR(int rIn, int dRIn, int ptRIn)
bool select(std::shared_ptr< TGCTrackSelectorOut > TrackcandidateOut)
std::shared_ptr< const TGCNSWCoincidenceMap > m_mapNSW
std::shared_ptr< const LVL1TGC::TGCNSW > m_nsw
std::shared_ptr< TGCTrackSelectorOut > m_trackSelectorOut
int m_NumberOfWireHighPtBoard
void doInnerCoincidence(const SG::ReadCondHandleKey< TGCTriggerData > &readCondKey, int SSCId, TGCRPhiCoincidenceOut *coincidenceOut)
std::shared_ptr< const LVL1TGC::TGCBIS78 > m_bis78
LVL1TGC::TGCSide m_sideId
bool doTILECoincidence(TGCRPhiCoincidenceOut *coincidenceOut)
TGCSSCController m_SSCController
bool doTGCBIS78Coincidence(TGCRPhiCoincidenceOut *coincidenceOut)
TGCHighPtBoard * m_stripHighPtBoard
TGCRPhiCoincidenceMatrix m_matrix
const std::vector< uint8_t > & getNSWeta() const
void set_USE_BIS78(bool v)
bool FORCE_NSW_COIN() const
void input(TGCRPhiCoincidenceOut *rPhiOut)
TGCRPhiCoincidenceOut * doCoincidence()
std::shared_ptr< const LVL1TGC::TGCTileMuCoincidenceLUT > m_tileMuLUT
const std::string & NSWSideInfo() const
int getNumberOfWireHighPtBoard()
std::shared_ptr< const LVL1TGC::TGCGoodMF > m_mapGoodMF
TGCHighPtBoard * m_wireHighPtBoard[MaxNumberOfWireHighPtBoard]
bool hitTileMu(const uint8_t &mask, const uint8_t &hit6, const uint8_t &hit56) const
@ MaxNumberOfWireHighPtBoard
int getFlagROI(const unsigned int roi, const unsigned int ssc, const unsigned int sec) const
bool doTGCEICoincidence(TGCRPhiCoincidenceOut *coincidenceOut)
@ NUMBER_OF_SLOTS_PER_TRIGGER_SECTOR
TileModuleHit getHit56() const
TileModuleHit getHit6() const
void setSideId(int sideIdIn)
void doTGCNSWCoincidence(TGCRPhiCoincidenceOut *coincidenceOut)
int getNumberOfSubSectorCluster() const
int getTriggerBit(const int slot, const int ssc, const int sec, const int reg, const int read, const int bit) const
void inputPhi(int phiIn, int dPhiIn, int ptPhiIn)
std::shared_ptr< const LVL1TGC::TGCBIS78CoincidenceMap > m_mapBIS78
bool doTGCFICoincidence(TGCRPhiCoincidenceOut *coincidenceOut)
void setCoincidenceLUT(std::shared_ptr< const LVL1TGC::BigWheelCoincidenceLUT > lut)
const LVL1TGC::TGCEIFICoincidenceMap * m_mapEIFI
TGCHighPtChipOut * m_wireHighPtChipOut[MaxNumberOfWireHighPtBoard]
TGCSide
The sides of TGC (A- or C-side)
TGCHighPtChipOut * getOutput()
void setRegion(TGCRegionType regionIn)
void setSSCId(int SSCIdIn)
TGCTrackSelector m_trackSelector
std::shared_ptr< const LVL1TGC::TGCTMDB > m_pTMDB
TGCHighPtChipOut * m_stripHighPtChipOut