ATLAS Offline Software
FPGATrackSimLogicalHitsProcessAlg.cxx
Go to the documentation of this file.
1 // Copyright (C) 2002-2024 CERN for the benefit of the ATLAS collaboration
2 
4 
13 
18 
20 
23 
25 
26 #include "GaudiKernel/IEventProcessor.h"
27 
28 #ifdef BENCHMARK_LOGICALHITSALG
29 #define TIME(name) \
30  t_1 = std::chrono::steady_clock::now(); \
31  (name) += std::chrono::duration_cast<std::chrono::microseconds>(t_1 - t_0).count(); \
32  t_0 = t_1;
33 
34 size_t m_tread = 0, m_tprocess = 0, m_troads = 0, m_troad_filter = 0, m_tlrt = 0, m_ttracks = 0, m_tOR = 0, m_t2ndStage = 0, m_tmon = 0, m_tfin = 0;
35 #else
36 #define TIME(name)
37 #endif
38 
39 
41 // Initialize
42 
43 FPGATrackSimLogicalHitsProcessAlg::FPGATrackSimLogicalHitsProcessAlg (const std::string& name, ISvcLocator* pSvcLocator) :
44  AthAlgorithm(name, pSvcLocator)
45 {
46 }
47 
48 
50 {
51  std::stringstream ss(m_description);
52  std::string line;
53  ATH_MSG_INFO("Tag config:");
54  if (!m_description.empty()) {
55  while (std::getline(ss, line, '\n')) {
56  ATH_MSG_INFO('\t' << line);
57  }
58  }
59 
60 
61  ATH_CHECK(m_hitSGInputTool.retrieve(EnableTool{!m_hitSGInputTool.empty()}));
62 
63  ATH_CHECK(m_hitInputTool.retrieve(EnableTool{!m_hitInputTool.empty()}));
64  ATH_CHECK(m_hitInputTool2.retrieve(EnableTool{m_secondInputToolN > 0 && !m_hitInputTool2.empty()}));
65  ATH_CHECK(m_hitMapTool.retrieve());
66  ATH_CHECK(m_hitFilteringTool.retrieve(EnableTool{m_doHitFiltering}));
67  ATH_CHECK(m_clusteringTool.retrieve(EnableTool{m_clustering}));
68  ATH_CHECK(m_spacepointsTool.retrieve(EnableTool{m_doSpacepoints}));
69  ATH_CHECK(m_roadFinderTool.retrieve());
70 
71 
72  ATH_CHECK(m_LRTRoadFilterTool.retrieve(EnableTool{m_doLRT}));
73  ATH_CHECK(m_LRTRoadFinderTool.retrieve(EnableTool{m_doLRT}));
74  ATH_CHECK(m_houghRootOutputTool.retrieve(EnableTool{m_doHoughRootOutput}));
75  ATH_CHECK(m_NNTrackTool.retrieve(EnableTool{m_doNNTrack}));
76  ATH_CHECK(m_roadFilterTool.retrieve(EnableTool{m_filterRoads}));
77  ATH_CHECK(m_roadFilterTool2.retrieve(EnableTool{m_filterRoads2}));
78  if (m_doSpacepoints) ATH_CHECK(m_spRoadFilterTool.retrieve(EnableTool{m_spRoadFilterTool}));
79  ATH_CHECK(m_trackFitterTool_1st.retrieve(EnableTool{m_doTracking}));
81  ATH_CHECK(m_trackFitterTool_2nd.retrieve(EnableTool{m_runSecondStage && m_doTracking}));
82  ATH_CHECK(m_overlapRemovalTool_2nd.retrieve(EnableTool{m_runSecondStage}));
83  ATH_CHECK(m_dataFlowTool.retrieve());
84  ATH_CHECK(m_writeOutputTool.retrieve());
85  ATH_CHECK(m_FPGATrackSimMapping.retrieve());
86  if ( m_doEvtSel ) {
87  ATH_CHECK(m_evtSel.retrieve());
88  }
89 
90  ATH_MSG_DEBUG("initialize() Instantiating root objects");
91  m_logicEventHeader_1st = m_writeOutputTool->getLogicalEventInputHeader_1st();
92 
93 
94  m_logicEventOutputHeader = m_writeOutputTool->getLogicalEventOutputHeader();
95  if (m_runSecondStage) m_logicEventHeader_2nd = m_writeOutputTool->getLogicalEventInputHeader_2nd();
96 
97  ATH_MSG_DEBUG("initialize() Setting branch");
98  if (m_outputHitTxt) {
99  ATH_MSG_INFO("writing road hits to " << m_outputHitTxtName);
101  }
102 
103  if (!m_monTool.empty())
104  ATH_CHECK(m_monTool.retrieve());
105 
106  ATH_CHECK( m_FPGAClusterKey.initialize() );
108  ATH_CHECK( m_FPGAHitKey.initialize() );
111  ATH_CHECK( m_FPGASpacePointsKey.initialize() );
115 
116  ATH_MSG_DEBUG("initialize() Finished");
117 
118 
119  return StatusCode::SUCCESS;
120 }
121 
122 
124 // MAIN EXECUTE ROUTINE //
126 
128 {
129 #ifdef BENCHMARK_LOGICALHITSALG
130  std::chrono::time_point<std::chrono::steady_clock> t_0, t_1;
132 #endif
133 
134  const EventContext& ctx = getContext();
135  // Read inputs
136  bool done = false;
137  ATH_CHECK(readInputs(done));
138 
139  if (done) {
140  IEventProcessor* appMgr = nullptr;
141  ATH_CHECK(service("ApplicationMgr",appMgr));
142  if (!appMgr) {
143  ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
144  return StatusCode::FAILURE;
145  }
146  return appMgr->stopRun();
147  }
148 
151 
152  ATH_CHECK( FPGARoads_1st.record (std::make_unique<FPGATrackSimRoadCollection>()));
153  ATH_CHECK( FPGAHitsInRoads_1st.record (std::make_unique<FPGATrackSimHitContainer>()));
154 
156  ATH_CHECK(FPGATracks_1stHandle.record (std::make_unique<FPGATrackSimTrackCollection>()));
157 
159  ATH_CHECK( FPGAHits_1st.record (std::make_unique<FPGATrackSimHitCollection>()));
160 
162  ATH_CHECK( FPGAHitsFiltered_1st.record (std::make_unique<FPGATrackSimHitCollection>()));
163 
165  ATH_CHECK( FPGAHitUnmapped_1st.record (std::make_unique<FPGATrackSimHitCollection>()));
166 
168  ATH_CHECK( FPGAClusters_1st.record (std::make_unique<FPGATrackSimClusterCollection>()));
169 
171  ATH_CHECK( FPGAClustersFiltered_1st.record (std::make_unique<FPGATrackSimClusterCollection>()));
172 
174  ATH_CHECK( FPGASpacePoints_1st.record (std::make_unique<FPGATrackSimClusterCollection>()));
175 
176  // Apply truth track cuts
177  if ( m_doEvtSel ){
178  if (!m_evtSel->selectEvent(&m_eventHeader))
179  {
180  ATH_MSG_DEBUG("Event skipped by: " << m_evtSel->name());
181  return StatusCode::SUCCESS;
182  }
183  ATH_MSG_DEBUG("Event accepted by: " << m_evtSel->name());
184  } else {
185  ATH_MSG_DEBUG("No Event Election applied");
186  }
187  TIME(m_tread);
188 
189  // Event passes cuts, count it
190  m_evt++;
191 
192  // Map, cluster, and filter hits
193  ATH_CHECK(processInputs(FPGAHitUnmapped_1st, FPGAClusters_1st, FPGAClustersFiltered_1st, FPGASpacePoints_1st));
194  // Get reference to hits
195  unsigned regionID = m_evtSel->getRegionID();
196  // Recording Data
197  auto mon_regionID = Monitored::Scalar<unsigned>("regionID", regionID);
198  Monitored::Group(m_monTool, mon_regionID);
199 
200  TIME(m_tprocess);
201 
202  // Get roads
203  std::vector<FPGATrackSimRoad*> prefilter_roads;
204  std::vector<FPGATrackSimRoad*>& roads_1st = prefilter_roads;
205  std::vector<const FPGATrackSimHit*> phits_1st;
206 
207  // If and when we set up code to run over more than one region/tower at a time this will need to be updated
208  std::vector<FPGATrackSimHit> const & hits_1st = m_logicEventHeader_1st->towers().at(0).hits();
209 
210  for (FPGATrackSimHit const& h : hits_1st) {
211  if (h.isReal()) phits_1st.push_back(&h);
212  }
213 
214  for (const FPGATrackSimHit* Hit : phits_1st) FPGAHits_1st->push_back(*Hit);
215 
216  auto mon_nhits_1st = Monitored::Scalar<unsigned>("nHits_1st", hits_1st.size());
217  auto mon_nhits_1st_unmapped = Monitored::Scalar<unsigned>("nHits_1st_unmapped", m_hits_1st_miss.size());
218  Monitored::Group(m_monTool, mon_nhits_1st, mon_nhits_1st_unmapped);
219  ATH_CHECK(m_roadFinderTool->getRoads(phits_1st, roads_1st));
220 
221 ;
222  for (const FPGATrackSimRoad *road:roads_1st){
223  std::vector<FPGATrackSimHit> road_hits;
224  ATH_MSG_DEBUG("Hough Road X Y: " << road->getX() << " " << road->getY());
225  for (size_t l = 0; l < road->getNLayers(); ++l) {
226  for (const FPGATrackSimHit* layerH : road->getHits(l)) {
227  road_hits.push_back(*layerH);
228  }
229  }
230  FPGAHitsInRoads_1st->push_back(road_hits);
231  FPGARoads_1st->push_back(*road);
232  }
233 
234  auto mon_nroads_1st = Monitored::Scalar<unsigned>("nroads_1st", roads_1st.size());
235  for (FPGATrackSimRoad *road : roads_1st) {
236  unsigned bitmask = road->getHitLayers();
237  for (size_t l = 0; l < m_FPGATrackSimMapping->PlaneMap_1st()->getNLogiLayers(); l++) {
238  if (bitmask & (1 << l)) {
239  auto mon_layerIDs_1st = Monitored::Scalar<unsigned>("layerIDs_1st",l);
240  Monitored::Group(m_monTool,mon_layerIDs_1st);
241  }
242  }
243  }
244  Monitored::Group(m_monTool, mon_nroads_1st);
245 
246  TIME(m_troads);
247  // Standard road Filter
248  std::vector<FPGATrackSimRoad*> postfilter_roads;
249  if (m_filterRoads)
250  {
251  ATH_CHECK(m_roadFilterTool->filterRoads(roads_1st, postfilter_roads));
252  roads_1st = postfilter_roads;
253  }
254  ATH_CHECK(m_overlapRemovalTool_1st->runOverlapRemoval(roads_1st));
255  // Road Filter2
256  std::vector<FPGATrackSimRoad*> postfilter2_roads;
257  if (m_filterRoads2) {
258  ATH_CHECK(m_roadFilterTool2->filterRoads(roads_1st, postfilter2_roads));
259  roads_1st = postfilter2_roads;
260  }
261  // Spacepoint road filter tool. Needed when fitting to spacepoints.
262  std::vector<FPGATrackSimRoad*> postfilter3_roads;
263  if (m_doSpacepoints) {
264  ATH_CHECK(m_spRoadFilterTool->filterRoads(roads_1st, postfilter3_roads));
265  roads_1st = postfilter3_roads;
266  }
267  auto mon_nroads_1st_postfilter = Monitored::Scalar<unsigned>("nroads_1st_postfilter", roads_1st.size());
268  Monitored::Group(m_monTool, mon_nroads_1st_postfilter);
269 
270 
271 
272  TIME(m_troad_filter);
273  // Get tracks
274  std::vector<FPGATrackSimTrack> tracks_1st;
275  if (m_doTracking) {
276  if (m_doNNTrack) {
277  ATH_MSG_DEBUG("Performing NN tracking");
278  const FPGATrackSimNNMap* nnMap = m_FPGATrackSimMapping->NNMap();
279  ATH_CHECK(m_NNTrackTool->getTracks(roads_1st, tracks_1st, nnMap));
280  }
281  else {
282  ATH_CHECK(m_trackFitterTool_1st->getTracks(roads_1st, tracks_1st));
283  float bestchi2 = 1.e15;
284  for (const FPGATrackSimTrack& track : tracks_1st) {
285  float chi2 = track.getChi2ndof();
286  if (chi2 < bestchi2) bestchi2 = chi2;
287  auto mon_chi2_1st = Monitored::Scalar<float>("chi2_1st_all",chi2);
288  Monitored::Group(m_monTool,mon_chi2_1st);
289  }
290  auto mon_best_chi2_1st = Monitored::Scalar<float>("best_chi2_1st",bestchi2);
291  Monitored::Group(m_monTool,mon_best_chi2_1st);
292  }
293  }
294  auto mon_ntracks_1st = Monitored::Scalar<unsigned>("ntrack_1st", tracks_1st.size());
295  Monitored::Group(m_monTool,mon_ntracks_1st);
296 
297  TIME(m_ttracks);
298 
299  // Overlap removal
300  ATH_CHECK(m_overlapRemovalTool_1st->runOverlapRemoval(tracks_1st));
301  unsigned ntrackOLRChi2 = 0;
302  for (auto track : tracks_1st) {
303  if (track.getChi2ndof() < 10) {
305  if (track.passedOR()) {
306  ntrackOLRChi2++;
308  }
309  }
310  }
311  auto mon_ntracks_1st_olr = Monitored::Scalar<unsigned>("ntrack_1st_afterOLR", ntrackOLRChi2);
312  Monitored::Group(m_monTool,mon_ntracks_1st_olr);
313 
314  m_nRoadsTot += roads_1st.size();
315  m_nTracksTot += tracks_1st.size();
316 
317  // Do some simple monitoring of efficiencies
318  std::vector<FPGATrackSimTruthTrack> const & truthtracks = m_logicEventHeader_1st->optional().getTruthTracks();
319  if (truthtracks.size() > 0) {
320  m_evt_truth++;
321  auto passroad = Monitored::Scalar<bool>("eff_road",(roads_1st.size() > 0));
322  auto passtrack = Monitored::Scalar<bool>("eff_track",(tracks_1st.size() > 0));
323  auto truthpT_zoom = Monitored::Scalar<float>("pT_zoom",truthtracks.front().getPt()*0.001);
324  auto truthpT = Monitored::Scalar<float>("pT",truthtracks.front().getPt()*0.001);
325  auto trutheta = Monitored::Scalar<float>("eta",truthtracks.front().getEta());
326  auto truthphi= Monitored::Scalar<float>("phi",truthtracks.front().getPhi());
327  auto truthd0= Monitored::Scalar<float>("d0",truthtracks.front().getD0());
328  auto truthz0= Monitored::Scalar<float>("z0",truthtracks.front().getZ0());
329  if (roads_1st.size() > 0) m_nRoadsFound++;
330  bool passchi2 = false;
331  bool passchi2OLR = false;
332  if (tracks_1st.size() > 0) {
333  m_nTracksFound++;
334  for (auto track : tracks_1st) {
335  if (track.getChi2ndof() < 10) {
336  passchi2 = true;
337  if (track.passedOR()) {
338  passchi2OLR = true;
339  break;
340  }
341  }
342  }
343  }
344  if (passchi2) m_nTracksChi2Found++;
345  if (passchi2OLR) m_nTracksChi2OLRFound++;
346  auto passtrackchi2 = Monitored::Scalar<bool>("eff_track_chi2",passchi2);
347  Monitored::Group(m_monTool,passroad,passtrack,truthpT_zoom,truthpT,trutheta,truthphi,truthd0,truthz0,passtrackchi2);
348  }
349 
350  for (const FPGATrackSimTrack& track : tracks_1st) FPGATracks_1stHandle->push_back(track);
351 
352  TIME(m_tOR);
353 
354  // Now, we may want to do large-radius tracking on the hits not used by the first stage tracking.
355  // This follows overlap removal.
356  std::vector<FPGATrackSimRoad*> roadsLRT;
357  std::vector<FPGATrackSimTrack> tracksLRT; // currently empty
358  if (m_doLRT) {
359  // Filter out hits that are on successful first-stage tracks
360  std::vector<const FPGATrackSimHit*> remainingHits;
361 
362  if (m_doLRTHitFiltering) {
363  ATH_MSG_DEBUG("Doing hit filtering based on prompt tracks.");
364  ATH_CHECK(m_LRTRoadFilterTool->filterUsedHits(tracks_1st, phits_1st, remainingHits));
365 
366  for (const FPGATrackSimHit* Hit : remainingHits) FPGAHitsFiltered_1st->push_back(*Hit);
367 
368  } else {
369  ATH_MSG_DEBUG("No hit filtering requested; using all hits for LRT.");
370  remainingHits = phits_1st;
371  }
372 
373  // Get LRT roads with remaining hits
374  ATH_MSG_DEBUG("Finding LRT roads");
375  ATH_CHECK(m_LRTRoadFinderTool->getRoads( remainingHits, roadsLRT ));
376  }
377 
378  TIME(m_tlrt);
379 
380  auto dataFlowInfo = std::make_unique<FPGATrackSimDataFlowInfo>();
381 
382  // Second stage fitting
383  std::vector<FPGATrackSimRoad*> roads_2nd;
384  std::vector<FPGATrackSimTrack> tracks_2nd;
385  if (m_runSecondStage) {
386  ATH_CHECK(secondStageProcessing(tracks_1st, roads_2nd, tracks_2nd));
387  TIME(m_t2ndStage);
388  }
389 
390  // Calculate data flow quantities
391  if (m_writeOutputData) {
392  ATH_CHECK(m_dataFlowTool->calculateDataFlow(dataFlowInfo.get(), m_logicEventHeader_1st, m_clusters_1st, roads_1st, tracks_1st, roads_2nd, tracks_2nd));
393  }
394 
395  // Write the output and reset
396  ATH_CHECK(writeOutputData(roads_1st, tracks_1st, roads_2nd, tracks_2nd, dataFlowInfo.get()));
397 
398  if (m_doHoughRootOutput) {
400  }
401 
402  // dump hit identifiers per road/track to text file
403  if(m_outputHitTxt) {
404 
405  ATH_MSG_DEBUG("Dumping hits in roads to text file " << m_outputHitTxtName);
406  m_outputHitTxtStream << std::endl << "event " << m_ev << ", "
407  << roads_1st.size() << " roads"; // endl moved below to deal with trailing comma
408 
409  // m_clusters_original exists, we just need to know which ones to access
410  // FPGATrackSimRoad::getHits returns a vector of FPGATrackSimHit, but each of them is actually a cluster
411  // m_parentageMask has been co-opted to store the cluster index (set in clustering tool)
412  // this lets us get hold of the actual FPGATrackSimCluster via m_clusters_original[index]
413 
414  int roadCount = 0;
415  for(auto &road : roads_1st) {
416  // to avoid empty entries if a layer has no hits in a road, save the hits to vector first
417  std::vector< std::vector<FPGATrackSimHit> > clusters_in_road;
418  for(int layer = 0; layer < int(road->getNLayers()); layer ++) {
419  for(auto &cluster_as_hit : road->getHits(layer)) {
420  unsigned clusterIndex = (unsigned)cluster_as_hit->getParentageMask();
421  FPGATrackSimCluster thisCluster = m_clusters_1st_original.at(clusterIndex);
422 
423  // check that they match (might slow things down unnecessarily - remove later perhaps)
424  if( (cluster_as_hit->getR() != thisCluster.getClusterEquiv().getR()) ||
425  (cluster_as_hit->getZ() != thisCluster.getClusterEquiv().getZ()) ||
426  (cluster_as_hit->getGPhi() != thisCluster.getClusterEquiv().getGPhi()) ){
427  ATH_MSG_ERROR("cluster retrieved from index seems not to match");
428  ATH_MSG_DEBUG("road ID " << road->getRoadID() << ", layer " << layer
429  << ", cluster index " << clusterIndex << "road.getHits(layer): " << cluster_as_hit->getR() << " "
430  << cluster_as_hit->getZ() << " " << cluster_as_hit->getGPhi());
431  ATH_MSG_DEBUG("m_cluster[index]: " << thisCluster.getClusterEquiv().getR() << " "
432  << thisCluster.getClusterEquiv().getZ() << " "
433  << thisCluster.getClusterEquiv().getGPhi());
434  }
435  clusters_in_road.push_back(thisCluster.getHitList());
436  }
437  }
438 
439  if(roadCount != 0) m_outputHitTxtStream << ",";
440  m_outputHitTxtStream << std::endl << "[ ";
441  bool firstCluster = true;
442  for(auto &clusterHits : clusters_in_road) {
443  if(firstCluster) firstCluster = false;
444  else m_outputHitTxtStream << ", ";
445  bool firstHit = true;
446  m_outputHitTxtStream << "[ ";
447  for(auto &hit : clusterHits) {
448  if(firstHit) firstHit = false;
449  else m_outputHitTxtStream << ", ";
450 
451  m_outputHitTxtStream << "[" << hit.isStrip() << ", " << hit.getIdentifierHash() << ", "
452  << hit.getEtaIndex() << ", " << hit.getPhiIndex() << "]";
453  }
454  m_outputHitTxtStream << " ]";
455  }
456  m_outputHitTxtStream << " ]";
457  roadCount++;
458  }
459  }
460 
461 
462  // Reset data pointers
467 
468  TIME(m_tfin);
469 
470  return StatusCode::SUCCESS;
471 }
472 
473 
475 // INPUT PASSING, READING AND PROCESSING //
477 
479 {
480 
481  if ( !m_hitSGInputTool.empty()) {
482  ATH_CHECK(m_hitSGInputTool->readData(&m_eventHeader, Gaudi::Hive::currentContext()));
483  ATH_MSG_DEBUG("Loaded " << m_eventHeader.nHits() << " hits in event header from SG");
484 
485  return StatusCode::SUCCESS;
486  }
487 
488  if (m_ev % m_firstInputToolN == 0)
489  {
490  // Read primary input
491  ATH_CHECK(m_hitInputTool->readData(&m_firstInputHeader, done));
492  if (done)
493  {
494  ATH_MSG_INFO("Cannot read more events from file, returning");
495  return StatusCode::SUCCESS; // end of loop over events
496  }
497  }
498 
500 
501  // Read secondary input
502  for (int i = 0; i < m_secondInputToolN; i++)
503  {
504  ATH_CHECK(m_hitInputTool2->readData(&m_eventHeader, done, false));
505  if (done)
506  {
507  ATH_MSG_INFO("Cannot read more events from file, returning");
508  return StatusCode::SUCCESS;
509  }
510  }
511 
512  m_ev++;
513 
514  return StatusCode::SUCCESS;
515 }
516 
517 
518 // Applies clustering, mapping, hit filtering, and space points
521  SG::WriteHandle<FPGATrackSimClusterCollection> &FPGAClustersFiltered_1st,
523 {
524  m_clusters_1st.clear();
525  m_spacepoints_1st.clear();
526  m_hits_1st_miss.clear();
527 
528  // Map hits
529  ATH_MSG_DEBUG("Running hits conversion");
533 
534  ATH_CHECK(m_hitMapTool->getUnmapped(m_hits_1st_miss));
535  for (const FPGATrackSimHit& hit : m_hits_1st_miss) FPGAHitUnmapped_1st->push_back(hit);
536 
537 
538 
539  ATH_MSG_DEBUG("Hits conversion done");
540  // Random removal of hits
541  if (m_doHitFiltering) {
542  ATH_MSG_DEBUG("Running hits filtering");
543  ATH_CHECK(m_hitFilteringTool->DoRandomRemoval(*m_logicEventHeader_1st, true));
544  }
545 
546  // Clustering
547  if (m_clustering)
548  {
549  ATH_MSG_DEBUG("Running clustering");
552 
553  // I think I also want to pass m_clusters to random removal (but won't work currently)
555  for (const FPGATrackSimCluster& cluster : m_clusters_1st_original) FPGAClusters_1st->push_back(cluster);
556 
557  }
558 
559  // Filter hits/clusters (untested for hits, ie with m_clustering = false)
560  if (m_doHitFiltering)
561  {
562  // get the sets of layers that we want to filter hits from
563  std::vector<int> filter_pixel_physLayers, filter_strip_physLayers;
564  const FPGATrackSimPlaneMap *planeMap_1st = m_FPGATrackSimMapping->PlaneMap_1st();
565  ATH_CHECK(m_hitFilteringTool->GetPairedStripPhysLayers(planeMap_1st, filter_strip_physLayers));
566  m_clusters_1st.clear();
567  ATH_CHECK(m_hitFilteringTool->DoHitFiltering(*m_logicEventHeader_1st, filter_pixel_physLayers, filter_strip_physLayers, m_clusters_1st));
568  for (const FPGATrackSimCluster &cluster : m_clusters_1st) FPGAClustersFiltered_1st->push_back(cluster);
569 
570  }
571 
572  // Space points
573  if (m_doSpacepoints) {
575  for (const FPGATrackSimCluster& cluster : m_spacepoints_1st) FPGASpacePoints_1st->push_back(cluster);
576  }
577 
578  return StatusCode::SUCCESS;
579 }
580 
581 
582 StatusCode FPGATrackSimLogicalHitsProcessAlg::secondStageProcessing(std::vector<FPGATrackSimTrack> const & tracks_1st,
583  std::vector<FPGATrackSimRoad*> & roads_2nd, std::vector<FPGATrackSimTrack> & tracks_2nd)
584 {
585  m_clusters_2nd.clear();
586  m_spacepoints_2nd.clear();
587  m_hits_2nd_miss.clear();
588 
589 
590  const EventContext& ctx = getContext();
591 
592  // Map hits
596 
598 
600  ATH_CHECK( FPGAClusters_2nd.record (std::make_unique<FPGATrackSimClusterCollection>()));
601  for (const FPGATrackSimCluster& cluster : m_clusters_2nd) FPGAClusters_2nd->push_back(cluster);
602 
603  // Space points
604  if (m_doSpacepoints) {
606 
608  ATH_CHECK( FPGASpacePoints_2nd.record (std::make_unique<FPGATrackSimClusterCollection>()));
609  for (const FPGATrackSimCluster& cluster : m_spacepoints_2nd) FPGASpacePoints_2nd->push_back(cluster);
610  }
611 
612  std::vector<FPGATrackSimHit> const & hits_2nd = m_logicEventHeader_2nd->towers().at(0).hits();
613 
614  ATH_MSG_DEBUG("Number of second stage hits = " << hits_2nd.size());
615 
616  std::vector<const FPGATrackSimHit*> phits_2nd;
617  for (FPGATrackSimHit const & h : hits_2nd) phits_2nd.push_back(&h);
618 
620  ATH_CHECK( FPGAHits_2nd.record (std::make_unique<FPGATrackSimHitCollection>()));
621  for (const FPGATrackSimHit* Hit : phits_2nd) FPGAHits_2nd->push_back(*Hit);
622 
623  // Get the first stage tracks after OR
624  std::vector<FPGATrackSimTrack> tracks_1st_OR;
625  for (auto track : tracks_1st) {
626  if (track.passedOR() == 1) tracks_1st_OR.push_back(track);
627  }
628 
629  ATH_MSG_DEBUG("Number of roads for second stage fitting " << roads_2nd.size());
630 
631  // Get second stage tracks
632  if (m_doTracking) ATH_CHECK(m_trackFitterTool_2nd->getTracks(roads_2nd, tracks_2nd));
633 
634  ATH_MSG_DEBUG("Number of tracks from the second stage fitting = " << tracks_2nd.size() << " and truth tracks = " << m_logicEventHeader_1st->optional().getTruthTracks().size());
635 
636  // Overlap removal
637  ATH_CHECK(m_overlapRemovalTool_2nd->runOverlapRemoval(tracks_2nd));
638 
639  return StatusCode::SUCCESS;
640 }
641 
642 StatusCode FPGATrackSimLogicalHitsProcessAlg::writeOutputData(std::vector<FPGATrackSimRoad*> const & roads_1st, std::vector<FPGATrackSimTrack> const & tracks_1st,
643  std::vector<FPGATrackSimRoad*> const & roads_2nd, std::vector<FPGATrackSimTrack> const & tracks_2nd,
644  FPGATrackSimDataFlowInfo const * dataFlowInfo)
645 {
647 
648  ATH_MSG_DEBUG("NFPGATrackSimRoads_1st = " << roads_1st.size() << ", NFPGATrackSimTracks_1st = " << tracks_1st.size() << ", NFPGATrackSimRoads_2nd = " << roads_2nd.size() << ", NFPGATrackSimTracks_2nd = " << tracks_2nd.size());
649 
650  if (!m_writeOutputData) return StatusCode::SUCCESS;
653  if (m_doTracking) {
656  }
657 
658 
659  if (m_runSecondStage) {
662 
665  }
666 
669 
671 
672 
673 
674  return StatusCode::SUCCESS;
675 }
676 
677 
678 
679 
681 // Finalize
682 
684 {
685 #ifdef BENCHMARK_LOGICALHITSALG
686  ATH_MSG_INFO("Timings:" <<
687  "\nread input: " << std::setw(10) << m_tread <<
688  "\nprocess hits: " << std::setw(10) << m_tprocess <<
689  "\nroads: " << std::setw(10) << m_troads <<
690  "\nroad filter: " << std::setw(10) << m_troad_filter <<
691  "\nllp: " << std::setw(10) << m_tlrt <<
692  "\ntracks: " << std::setw(10) << m_ttracks <<
693  "\nOR: " << std::setw(10) << m_tOR <<
694  (m_runSecondStage ? : ("\n2ndStage: " << std::setw(10) << m_t2ndStage) : "") <<
695  "\nmon: " << std::setw(10) << m_tmon <<
696  "\nfin: " << std::setw(10) << m_tfin
697  );
698 #endif
699 
700 
702 
703  ATH_MSG_INFO("PRINTING FPGATRACKSIM SIMPLE STATS");
704  ATH_MSG_INFO("========================================================================================");
705  ATH_MSG_INFO("Inclusive efficiency to find a road = " << m_nRoadsFound/m_evt_truth);
706  ATH_MSG_INFO("Inclusive efficiency to find a track = " << m_nTracksFound/m_evt_truth);
707  ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 = " << m_nTracksChi2Found/m_evt_truth);
708  ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 and OLR = " << m_nTracksChi2OLRFound/m_evt_truth);
709 
710 
711  ATH_MSG_INFO("Number of 1st stage roads/event = " << m_nRoadsTot/m_evt);
712  ATH_MSG_INFO("Number of 1st stage track combinations/event = " << m_nTracksTot/m_evt);
713  ATH_MSG_INFO("Number of 1st stage tracks passing chi2/event = " << m_nTracksChi2Tot/m_evt);
714  ATH_MSG_INFO("Number of 1st stage tracks passing chi2 and OLR/event = " << m_nTracksChi2OLRTot/m_evt);
715  ATH_MSG_INFO("========================================================================================");
716 
717  return StatusCode::SUCCESS;
718 }
719 
720 
722 // Helpers
723 
724 void FPGATrackSimLogicalHitsProcessAlg::printHitSubregions(std::vector<FPGATrackSimHit> const & hits)
725 {
726  ATH_MSG_WARNING("Hit regions:");
727  for (auto hit : hits)
728  {
729  std::vector<uint32_t> regions = m_FPGATrackSimMapping->SubRegionMap()->getRegions(hit);
730  std::stringstream ss;
731  for (auto r : regions)
732  ss << r << ",";
733  ATH_MSG_WARNING("\t[" << ss.str() << "]");
734  }
735 }
FPGATrackSimLogicalHitsProcessAlg::m_hits_2nd_miss
std::vector< FPGATrackSimHit > m_hits_2nd_miss
Definition: FPGATrackSimLogicalHitsProcessAlg.h:130
FPGATrackSimLogicalHitsProcessAlg::m_doSpacepoints
Gaudi::Property< bool > m_doSpacepoints
Definition: FPGATrackSimLogicalHitsProcessAlg.h:103
FPGATrackSimLogicalHitsProcessAlg::m_filterRoads
Gaudi::Property< bool > m_filterRoads
Definition: FPGATrackSimLogicalHitsProcessAlg.h:106
FPGATrackSimLogicalHitsProcessAlg::m_clusters_2nd
std::vector< FPGATrackSimCluster > m_clusters_2nd
Definition: FPGATrackSimLogicalHitsProcessAlg.h:128
FPGATrackSimLogicalHitsProcessAlg::m_logicEventHeader_1st
FPGATrackSimLogicalEventInputHeader * m_logicEventHeader_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:123
FPGATrackSimLogicalHitsProcessAlg::m_doEvtSel
Gaudi::Property< bool > m_doEvtSel
Definition: FPGATrackSimLogicalHitsProcessAlg.h:115
beamspotman.r
def r
Definition: beamspotman.py:676
FPGATrackSimLogicalHitsProcessAlg::m_outputHitTxtName
std::string m_outputHitTxtName
Definition: FPGATrackSimLogicalHitsProcessAlg.h:117
checkFileSG.line
line
Definition: checkFileSG.py:75
TrigDefs::Group
Group
Properties of a chain group.
Definition: GroupProperties.h:13
FPGATrackSimOptionalEventInfo::getOfflineTracks
const std::vector< FPGATrackSimOfflineTrack > & getOfflineTracks() const
Definition: FPGATrackSimOptionalEventInfo.h:32
FPGATrackSimRegionSlices.h
Stores slice definitions for FPGATrackSim regions.
FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFinderTool
ToolHandle< IFPGATrackSimRoadFinderTool > m_LRTRoadFinderTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:83
FPGATrackSimLogicalHitsProcessAlg::m_FPGAClusterKey
SG::WriteHandleKeyArray< FPGATrackSimClusterCollection > m_FPGAClusterKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:164
FPGATrackSimCluster::getHitList
hitVector const & getHitList() const
Definition: FPGATrackSimCluster.h:30
FPGATrackSimLogicalHitsProcessAlg::m_spacepointsTool
ToolHandle< FPGATrackSimSpacePointsToolI > m_spacepointsTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:80
FPGATrackSimLogicalHitsProcessAlg::m_description
std::string m_description
Definition: FPGATrackSimLogicalHitsProcessAlg.h:70
PowhegControl_ttHplus_NLO.ss
ss
Definition: PowhegControl_ttHplus_NLO.py:83
FPGATrackSimLogicalHitsProcessAlg::m_logicEventOutputHeader
FPGATrackSimLogicalEventOutputHeader * m_logicEventOutputHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:125
FPGATrackSimLogicalHitsProcessAlg::m_FPGARoadKey
SG::WriteHandleKey< FPGATrackSimRoadCollection > m_FPGARoadKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:171
FPGATrackSimLogicalHitsProcessAlg::m_secondInputToolN
Gaudi::Property< int > m_secondInputToolN
Definition: FPGATrackSimLogicalHitsProcessAlg.h:100
FPGATrackSimDataFlowTool.h
ATH_MSG_INFO
#define ATH_MSG_INFO(x)
Definition: AthMsgStreamMacros.h:31
FPGATrackSimLogicalHitsProcessAlg::m_nTracksTot
long m_nTracksTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:136
FPGATrackSimCluster
Definition: FPGATrackSimCluster.h:25
FPGATrackSimLogicalHitsProcessAlg::m_hits_1st_miss
std::vector< FPGATrackSimHit > m_hits_1st_miss
Definition: FPGATrackSimLogicalHitsProcessAlg.h:130
CaloCellPos2Ntuple.int
int
Definition: CaloCellPos2Ntuple.py:24
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitInRoadsKey
SG::WriteHandleKey< FPGATrackSimHitContainer > m_FPGAHitInRoadsKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:170
FPGATrackSimTrack
Definition: FPGATrackSimTrack.h:16
FPGATrackSimLogicalHitsProcessAlg::writeOutputData
StatusCode writeOutputData(std::vector< FPGATrackSimRoad * > const &roads_1st, std::vector< FPGATrackSimTrack > const &tracks_1st, std::vector< FPGATrackSimRoad * > const &roads_2nd, std::vector< FPGATrackSimTrack > const &tracks_2nd, FPGATrackSimDataFlowInfo const *dataFlowInfo)
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:642
FPGATrackSimLogicalHitsProcessAlg::m_spacepoints_1st
std::vector< FPGATrackSimCluster > m_spacepoints_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:129
FPGATrackSimLogicalHitsProcessAlg::m_spacepoints_2nd
std::vector< FPGATrackSimCluster > m_spacepoints_2nd
Definition: FPGATrackSimLogicalHitsProcessAlg.h:129
FPGATrackSimLogicalHitsProcessAlg::m_dataFlowTool
ToolHandle< FPGATrackSimDataFlowTool > m_dataFlowTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:93
FPGATrackSimLogicalEventOutputHeader::reserveFPGATrackSimRoads_1st
void reserveFPGATrackSimRoads_1st(size_t size)
Definition: FPGATrackSimLogicalEventOutputHeader.h:23
FPGATrackSimNNTrackTool.h
Utilize NN score to build track candidates.
FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFilterTool
ToolHandle< FPGATrackSimLLPRoadFilterTool > m_LRTRoadFilterTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:82
FPGATrackSimLogicalHitsProcessAlg::m_writeOutputTool
ToolHandle< IFPGATrackSimEventOutputHeaderTool > m_writeOutputTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:94
FPGATrackSimLogicalHitsProcessAlg::m_doTracking
Gaudi::Property< bool > m_doTracking
Definition: FPGATrackSimLogicalHitsProcessAlg.h:104
FPGATrackSimLogicalHitsProcessAlg::m_hitMapTool
ToolHandle< FPGATrackSimRawToLogicalHitsTool > m_hitMapTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:77
FPGATrackSimLogicalHitsProcessAlg::FPGATrackSimLogicalHitsProcessAlg
FPGATrackSimLogicalHitsProcessAlg(const std::string &name, ISvcLocator *pSvcLocator)
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:43
FPGATrackSimLogicalHitsProcessAlg::m_clusters_1st_original
std::vector< FPGATrackSimCluster > m_clusters_1st_original
Definition: FPGATrackSimLogicalHitsProcessAlg.h:128
FPGATrackSimLogicalHitsProcessAlg::m_clusters_1st
std::vector< FPGATrackSimCluster > m_clusters_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:128
FPGATrackSimLogicalHitsProcessAlg::m_evtSel
ServiceHandle< IFPGATrackSimEventSelectionSvc > m_evtSel
Definition: FPGATrackSimLogicalHitsProcessAlg.h:96
FPGATrackSimLogicalEventOutputHeader::reset
void reset()
Definition: FPGATrackSimLogicalEventOutputHeader.cxx:13
FPGATrackSimLogicalHitsProcessAlg::m_writeOutputData
Gaudi::Property< bool > m_writeOutputData
Definition: FPGATrackSimLogicalHitsProcessAlg.h:113
UploadAMITag.l
list l
Definition: UploadAMITag.larcaf.py:158
FPGATrackSimReadRawRandomHitsTool.h
FPGATrackSimLogicalHitsProcessAlg::m_overlapRemovalTool_1st
ToolHandle< FPGATrackSimOverlapRemovalTool > m_overlapRemovalTool_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:91
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey
SG::WriteHandleKeyArray< FPGATrackSimHitCollection > m_FPGAHitKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:167
FPGATrackSimLogicalHitsProcessAlg::m_hitInputTool2
ToolHandle< FPGATrackSimReadRawRandomHitsTool > m_hitInputTool2
Definition: FPGATrackSimLogicalHitsProcessAlg.h:76
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitFilteredKey
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitFilteredKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:169
FPGATrackSimLogicalHitsProcessAlg::m_doNNTrack
Gaudi::Property< bool > m_doNNTrack
Definition: FPGATrackSimLogicalHitsProcessAlg.h:110
FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackKey
SG::WriteHandleKey< FPGATrackSimTrackCollection > m_FPGATrackKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:172
FPGATrackSimLogicalHitsProcessAlg::m_evt_truth
double m_evt_truth
Definition: FPGATrackSimLogicalHitsProcessAlg.h:140
xAOD::unsigned
unsigned
Definition: RingSetConf_v1.cxx:662
FPGATrackSimLogicalHitsProcessAlg::m_monTool
ToolHandle< GenericMonitoringTool > m_monTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:162
FPGATrackSimLogicalEventOutputHeader::getDataFlowInfo
FPGATrackSimDataFlowInfo const & getDataFlowInfo() const
Definition: FPGATrackSimLogicalEventOutputHeader.h:45
FPGATrackSimOptionalEventInfo::getTruthTracks
const std::vector< FPGATrackSimTruthTrack > & getTruthTracks() const
Definition: FPGATrackSimOptionalEventInfo.h:37
FPGATrackSimHit
Definition: FPGATrackSimHit.h:38
FPGATrackSimLogicalHitsProcessAlg::m_doHoughRootOutput
Gaudi::Property< bool > m_doHoughRootOutput
Definition: FPGATrackSimLogicalHitsProcessAlg.h:109
FPGATrackSimHit::getGPhi
float getGPhi() const
Definition: FPGATrackSimHit.h:129
FPGATrackSimLogicalHitsProcessAlg::m_evt
double m_evt
Definition: FPGATrackSimLogicalHitsProcessAlg.h:134
FPGATrackSimEventInputHeader::nHits
int nHits() const
Definition: FPGATrackSimEventInputHeader.h:37
FPGATrackSimRegionMap.h
Maps ITK module indices to FPGATrackSim regions.
FPGATrackSimLogicalHitsProcessAlg::m_doLRTHitFiltering
Gaudi::Property< bool > m_doLRTHitFiltering
Definition: FPGATrackSimLogicalHitsProcessAlg.h:112
FPGATrackSimLogicalHitsProcessAlg::m_logicEventHeader_2nd
FPGATrackSimLogicalEventInputHeader * m_logicEventHeader_2nd
Definition: FPGATrackSimLogicalHitsProcessAlg.h:124
FPGATrackSimLogicalHitsProcessAlg::m_doHitFiltering
Gaudi::Property< bool > m_doHitFiltering
Definition: FPGATrackSimLogicalHitsProcessAlg.h:101
FPGATrackSimLogicalHitsProcessAlg::m_firstInputToolN
Gaudi::Property< int > m_firstInputToolN
Definition: FPGATrackSimLogicalHitsProcessAlg.h:99
FPGATrackSimLogicalHitsProcessAlg::m_overlapRemovalTool_2nd
ToolHandle< FPGATrackSimOverlapRemovalTool > m_overlapRemovalTool_2nd
Definition: FPGATrackSimLogicalHitsProcessAlg.h:92
FPGATrackSimLogicalHitsProcessAlg::m_runSecondStage
Gaudi::Property< bool > m_runSecondStage
Definition: FPGATrackSimLogicalHitsProcessAlg.h:108
FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool2
ToolHandle< IFPGATrackSimRoadFilterTool > m_roadFilterTool2
Definition: FPGATrackSimLogicalHitsProcessAlg.h:85
FPGATrackSimLogicalHitsProcessAlg::m_outputHitTxt
Gaudi::Property< bool > m_outputHitTxt
Definition: FPGATrackSimLogicalHitsProcessAlg.h:114
Hit
Definition: Simulation/ISF/ISF_FastCaloSim/ISF_FastCaloGpu/ISF_FastCaloGpu/Hit.h:16
FPGATrackSimLogicalEventInputHeader::optional
FPGATrackSimOptionalEventInfo const & optional() const
Definition: FPGATrackSimLogicalEventInputHeader.h:32
FPGATrackSimLogicalEventOutputHeader::addFPGATrackSimTracks_2nd
void addFPGATrackSimTracks_2nd(std::vector< FPGATrackSimTrack > const &tracks_2nd)
Definition: FPGATrackSimLogicalEventOutputHeader.h:42
python.handimod.now
now
Definition: handimod.py:675
FPGATrackSimDataFlowInfo
Definition: FPGATrackSimDataFlowInfo.h:18
ATH_MSG_ERROR
#define ATH_MSG_ERROR(x)
Definition: AthMsgStreamMacros.h:33
FPGATrackSimLogicalHitsProcessAlg::m_FPGASpacePointsKey
SG::WriteHandleKeyArray< FPGATrackSimClusterCollection > m_FPGASpacePointsKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:166
FPGATrackSimLogicalEventOutputHeader::reserveFPGATrackSimTracks_1st
void reserveFPGATrackSimTracks_1st(size_t size)
Definition: FPGATrackSimLogicalEventOutputHeader.h:35
lumiFormat.i
int i
Definition: lumiFormat.py:92
FPGATrackSimLogicalHitsProcessAlg::m_roadFinderTool
ToolHandle< IFPGATrackSimRoadFinderTool > m_roadFinderTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:81
FPGATrackSimLogicalEventOutputHeader.h
FPGATrackSimLogicalHitsProcessAlg::m_firstInputHeader
FPGATrackSimEventInputHeader m_firstInputHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:122
FPGATrackSimLogicalHitsProcessAlg::execute
virtual StatusCode execute() override
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:127
FPGATrackSimLogicalHitsProcessAlg::m_ev
int m_ev
Definition: FPGATrackSimLogicalHitsProcessAlg.h:71
FPGATrackSimEventInputHeader::clearHits
void clearHits()
Definition: FPGATrackSimEventInputHeader.h:39
EL::StatusCode
::StatusCode StatusCode
StatusCode definition for legacy code.
Definition: PhysicsAnalysis/D3PDTools/EventLoop/EventLoop/StatusCode.h:22
ATH_MSG_DEBUG
#define ATH_MSG_DEBUG(x)
Definition: AthMsgStreamMacros.h:29
FPGATrackSimDataFlowInfo.h
Structs that store the data flow information per event.
LArG4ShowerLibProcessing.hits
hits
Definition: LArG4ShowerLibProcessing.py:136
TRT::Hit::layer
@ layer
Definition: HitInfo.h:79
FPGATrackSimRawToLogicalHitsTool.h
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitUnmappedKey
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitUnmappedKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:168
chi2
double chi2(TH1 *h0, TH1 *h1)
Definition: comparitor.cxx:522
ATH_CHECK
#define ATH_CHECK
Definition: AthCheckMacros.h:40
FPGATrackSimNNMap
Definition: FPGATrackSimNNMap.h:27
FPGATrackSimLogicalHitsProcessAlg::m_clusteringTool
ToolHandle< FPGATrackSimClusteringToolI > m_clusteringTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:79
SG::VarHandleKey::initialize
StatusCode initialize(bool used=true)
If this object is used as a property, then this should be called during the initialize phase.
Definition: AthToolSupport/AsgDataHandles/Root/VarHandleKey.cxx:103
FPGATrackSimLogicalEventOutputHeader::setDataFlowInfo
void setDataFlowInfo(FPGATrackSimDataFlowInfo const &info)
Definition: FPGATrackSimLogicalEventOutputHeader.h:46
AthAlgorithm
Definition: AthAlgorithm.h:47
FPGATrackSimLogicalEventInputHeader::reset
void reset()
FPGATrackSimLogicalHitsProcessAlg::m_clustering
Gaudi::Property< bool > m_clustering
Definition: FPGATrackSimLogicalHitsProcessAlg.h:102
FPGATrackSimLogicalHitsProcessAlg::m_nTracksFound
long m_nTracksFound
Definition: FPGATrackSimLogicalHitsProcessAlg.h:142
FPGATrackSimHit::getZ
float getZ() const
Definition: FPGATrackSimHit.h:127
FPGATrackSimPlaneMap
Definition: FPGATrackSimPlaneMap.h:62
FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Tot
long m_nTracksChi2Tot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:137
FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRFound
long m_nTracksChi2OLRFound
Definition: FPGATrackSimLogicalHitsProcessAlg.h:144
FPGATrackSimLogicalHitsProcessAlg::readInputs
StatusCode readInputs(bool &done)
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:478
FPGATrackSimLogicalHitsProcessAlg::m_eventHeader
FPGATrackSimEventInputHeader m_eventHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:121
FPGATrackSimCluster::getClusterEquiv
FPGATrackSimHit const & getClusterEquiv() const
Definition: FPGATrackSimCluster.h:31
name
std::string name
Definition: Control/AthContainers/Root/debug.cxx:195
FPGATrackSimLogicalHitsProcessAlg::m_spRoadFilterTool
ToolHandle< IFPGATrackSimRoadFilterTool > m_spRoadFilterTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:86
FPGATrackSimLogicalEventOutputHeader::addFPGATrackSimTracks_1st
void addFPGATrackSimTracks_1st(std::vector< FPGATrackSimTrack > const &tracks_1st)
Definition: FPGATrackSimLogicalEventOutputHeader.h:36
TIME
#define TIME(name)
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:36
FPGATrackSimLogicalHitsProcessAlg::printHitSubregions
void printHitSubregions(std::vector< FPGATrackSimHit > const &hits)
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:724
FPGATrackSimHit.h
: FPGATrackSim-specific class to represent an hit in the detector.
FPGATrackSimLogicalHitsProcessAlg::processInputs
StatusCode processInputs(SG::WriteHandle< FPGATrackSimHitCollection > &FPGAHitUnmapped_1st, SG::WriteHandle< FPGATrackSimClusterCollection > &FPGAClusters_1st, SG::WriteHandle< FPGATrackSimClusterCollection > &FPGAClustersFiltered_1st, SG::WriteHandle< FPGATrackSimClusterCollection > &FPGASpacePoints_1st)
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:519
FPGATrackSimLogicalHitsProcessAlg::m_hitFilteringTool
ToolHandle< IFPGATrackSimHitFilteringTool > m_hitFilteringTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:78
FPGATrackSimOverlapRemovalTool.h
Overlap removal tool for FPGATrackSimTrack.
FPGATrackSimLogicalHitsProcessAlg::finalize
virtual StatusCode finalize() override
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:683
FPGATrackSimLogicalHitsProcessAlg.h
FPGATrackSimLogicalHitsProcessAlg::m_trackFitterTool_1st
ToolHandle< FPGATrackSimTrackFitterTool > m_trackFitterTool_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:89
FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Found
long m_nTracksChi2Found
Definition: FPGATrackSimLogicalHitsProcessAlg.h:143
SG::WriteHandle
Definition: StoreGate/StoreGate/WriteHandle.h:76
FPGATrackSimLogicalHitsProcessAlg::m_nRoadsTot
long m_nRoadsTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:135
FPGATrackSimLogicalHitsProcessAlg::m_hitSGInputTool
ToolHandle< IFPGATrackSimInputTool > m_hitSGInputTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:74
FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRTot
long m_nTracksChi2OLRTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:138
FPGATrackSimHit::getR
float getR() const
Definition: FPGATrackSimHit.h:128
FPGATrackSimLogicalEventOutputHeader::reserveFPGATrackSimTracks_2nd
void reserveFPGATrackSimTracks_2nd(size_t size)
Definition: FPGATrackSimLogicalEventOutputHeader.h:41
h
SG::WriteHandle::record
StatusCode record(std::unique_ptr< T > data)
Record a const object to the store.
FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool
ToolHandle< IFPGATrackSimRoadFilterTool > m_roadFilterTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:84
FPGATrackSimLogicalHitsProcessAlg::secondStageProcessing
StatusCode secondStageProcessing(std::vector< FPGATrackSimTrack > const &tracks_1st, std::vector< FPGATrackSimRoad * > &roads_2nd, std::vector< FPGATrackSimTrack > &tracks_2nd)
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:582
ATH_MSG_WARNING
#define ATH_MSG_WARNING(x)
Definition: AthMsgStreamMacros.h:32
FPGATrackSimLogicalHitsProcessAlg::m_trackFitterTool_2nd
ToolHandle< FPGATrackSimTrackFitterTool > m_trackFitterTool_2nd
Definition: FPGATrackSimLogicalHitsProcessAlg.h:90
FPGATrackSimLogicalHitsProcessAlg::m_outputHitTxtStream
std::ofstream m_outputHitTxtStream
Definition: FPGATrackSimLogicalHitsProcessAlg.h:118
FPGATrackSimLogicalHitsProcessAlg::m_doLRT
Gaudi::Property< bool > m_doLRT
Definition: FPGATrackSimLogicalHitsProcessAlg.h:111
FPGATrackSimLogicalEventInputHeader::towers
const std::vector< FPGATrackSimTowerInputHeader > & towers() const
Definition: FPGATrackSimLogicalEventInputHeader.h:36
FPGATrackSimLogicalHitsProcessAlg::m_FPGAClusterFilteredKey
SG::WriteHandleKey< FPGATrackSimClusterCollection > m_FPGAClusterFilteredKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:165
FPGATrackSimLogicalHitsProcessAlg::m_nRoadsFound
long m_nRoadsFound
Definition: FPGATrackSimLogicalHitsProcessAlg.h:141
FPGATrackSimLogicalHitsProcessAlg::initialize
virtual StatusCode initialize() override
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:49
xAOD::track
@ track
Definition: TrackingPrimitives.h:512
FPGATrackSimRoad.h
Defines a class for roads.
Monitored::Scalar
Declare a monitored scalar variable.
Definition: MonitoredScalar.h:34
FPGATrackSimLogicalEventOutputHeader::reserveFPGATrackSimRoads_2nd
void reserveFPGATrackSimRoads_2nd(size_t size)
Definition: FPGATrackSimLogicalEventOutputHeader.h:29
FPGATrackSimLogicalEventOutputHeader::addFPGATrackSimRoads_2nd
void addFPGATrackSimRoads_2nd(std::vector< FPGATrackSimRoad * > const &roads_2nd)
Definition: FPGATrackSimLogicalEventOutputHeader.h:30
FPGATrackSimLogicalEventInputHeader.h
FPGATrackSimLogicalHitsProcessAlg::m_filterRoads2
Gaudi::Property< bool > m_filterRoads2
Definition: FPGATrackSimLogicalHitsProcessAlg.h:107
FPGATrackSimEventInputHeader::reset
void reset()
Definition: FPGATrackSimEventInputHeader.cxx:15
FPGATrackSimLogicalHitsProcessAlg::m_NNTrackTool
ToolHandle< FPGATrackSimNNTrackTool > m_NNTrackTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:87
FPGATrackSimTrackFitterTool.h
FPGATrackSimTrackPars.h
Structs that store the 5 track parameters.
FPGATrackSimLogicalHitsProcessAlg::m_houghRootOutputTool
ToolHandle< FPGATrackSimHoughRootOutputTool > m_houghRootOutputTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:88
FPGATrackSimTrack.h
FPGATrackSimCluster.h
FPGATrackSimRoad
Definition: FPGATrackSimRoad.h:29
FPGATrackSimLogicalEventOutputHeader::addFPGATrackSimRoads_1st
void addFPGATrackSimRoads_1st(std::vector< FPGATrackSimRoad * > const &roads_1st)
Definition: FPGATrackSimLogicalEventOutputHeader.h:24
FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackSimMapping
ServiceHandle< IFPGATrackSimMappingSvc > m_FPGATrackSimMapping
Definition: FPGATrackSimLogicalHitsProcessAlg.h:95
FPGATrackSimLogicalHitsProcessAlg::m_hitInputTool
ToolHandle< IFPGATrackSimEventInputHeaderTool > m_hitInputTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:75