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FPGATrackSimLogicalHitsProcessAlg Class Reference

#include <FPGATrackSimLogicalHitsProcessAlg.h>

Inheritance diagram for FPGATrackSimLogicalHitsProcessAlg:
Collaboration diagram for FPGATrackSimLogicalHitsProcessAlg:

Public Member Functions

 FPGATrackSimLogicalHitsProcessAlg (const std::string &name, ISvcLocator *pSvcLocator)
 
virtual ~FPGATrackSimLogicalHitsProcessAlg ()=default
 
virtual StatusCode initialize () override
 
virtual StatusCode execute () override
 
virtual StatusCode finalize () override
 
virtual StatusCode sysInitialize () override
 Override sysInitialize. More...
 
virtual const DataObjIDColl & extraOutputDeps () const override
 Return the list of extra output dependencies. More...
 
ServiceHandle< StoreGateSvc > & evtStore ()
 The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc. More...
 
const ServiceHandle< StoreGateSvc > & evtStore () const
 The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc. More...
 
const ServiceHandle< StoreGateSvc > & detStore () const
 The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc. More...
 
virtual StatusCode sysStart () override
 Handle START transition. More...
 
virtual std::vector< Gaudi::DataHandle * > inputHandles () const override
 Return this algorithm's input handles. More...
 
virtual std::vector< Gaudi::DataHandle * > outputHandles () const override
 Return this algorithm's output handles. More...
 
Gaudi::Details::PropertyBase & declareProperty (Gaudi::Property< T, V, H > &t)
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, SG::VarHandleKey &hndl, const std::string &doc, const SG::VarHandleKeyType &)
 Declare a new Gaudi property. More...
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, SG::VarHandleBase &hndl, const std::string &doc, const SG::VarHandleType &)
 Declare a new Gaudi property. More...
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, SG::VarHandleKeyArray &hndArr, const std::string &doc, const SG::VarHandleKeyArrayType &)
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, T &property, const std::string &doc, const SG::NotHandleType &)
 Declare a new Gaudi property. More...
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, T &property, const std::string &doc="none")
 Declare a new Gaudi property. More...
 
void updateVHKA (Gaudi::Details::PropertyBase &)
 
MsgStream & msg () const
 
MsgStream & msg (const MSG::Level lvl) const
 
bool msgLvl (const MSG::Level lvl) const
 

Protected Member Functions

void renounceArray (SG::VarHandleKeyArray &handlesArray)
 remove all handles from I/O resolution More...
 
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > renounce (T &h)
 
void extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
 Add StoreName to extra input/output deps as needed. More...
 

Private Types

typedef ServiceHandle< StoreGateSvc > StoreGateSvc_t
 

Private Member Functions

StatusCode writeOutputData (const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads_1st, std::vector< FPGATrackSimTrack > const &tracks_1st, FPGATrackSimDataFlowInfo const *dataFlowInfo)
 
void printHitSubregions (std::vector< FPGATrackSimHit > const &hits)
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
 specialization for handling Gaudi::Property<SG::VarHandleKey> More...
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyArrayType &)
 specialization for handling Gaudi::Property<SG::VarHandleKeyArray> More...
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleType &)
 specialization for handling Gaudi::Property<SG::VarHandleBase> More...
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &t, const SG::NotHandleType &)
 specialization for handling everything that's not a Gaudi::Property<SG::VarHandleKey> or a <SG::VarHandleKeyArray> More...
 

Private Attributes

std::string m_description
 
ToolHandle< FPGATrackSimSpacePointsToolI > m_spacepointsTool {this, "SpacePointTool", "FPGATrackSimSpacePointsTool/FPGATrackSimSpacePointsTool", "Space Points Tool"}
 
ToolHandle< FPGATrackSimRoadUnionTool > m_roadFinderTool {this, "RoadFinder", "FPGATrackSimPatternMatchTool", "Road Finder Tool"}
 
ToolHandle< FPGATrackSimLLPRoadFilterTool > m_LRTRoadFilterTool {this, "LRTRoadFilter", "FPGATrackSimLLPRoadFilterTool/FPGATrackSimLLPRoadFilterTool", "LRT Road Filter Tool"}
 
ToolHandle< IFPGATrackSimRoadFinderTool > m_LRTRoadFinderTool {this, "LRTRoadFinder", "FPGATrackSimHoughTransform_d0phi0_Tool/FPGATrackSimHoughTransform_d0phi0_Tool", "LRT Road Finder Tool"}
 
ToolHandle< IFPGATrackSimRoadFilterTool > m_roadFilterTool {this, "RoadFilter", "FPGATrackSimEtaPatternFilterTool", "Road Filter Tool"}
 
ToolHandle< IFPGATrackSimRoadFilterTool > m_roadFilterTool2 {this, "RoadFilter2", "FPGATrackSimPhiRoadFilterTool", "Road Filter2 Tool"}
 
ToolHandle< FPGATrackSimNNTrackTool > m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool", "NN Track Tool"}
 
ToolHandle< FPGATrackSimHoughRootOutputTool > m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
 
ToolHandle< FPGATrackSimTrackFitterTool > m_trackFitterTool_1st {this, "TrackFitter_1st", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_1st", "1st stage track fit tool"}
 
ToolHandle< FPGATrackSimOverlapRemovalTool > m_overlapRemovalTool_1st {this, "OverlapRemoval_1st", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_1st", "1st stage overlap removal tool"}
 
ToolHandle< FPGATrackSimOutputHeaderTool > m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
 
ToolHandle< FPGATrackSimSlicingEngineTool > m_slicingEngineTool {this, "SlicingEngineTool", "FPGATrackSimSlicingEngineTool/FPGATrackSimSlicingEngineTool", "Slicing engine tool"}
 
ServiceHandle< IFPGATrackSimMappingSvc > m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
 
ServiceHandle< IFPGATrackSimEventSelectionSvc > m_evtSel {this, "eventSelector", "", "Event selection Svc"}
 
ToolHandle< GenericMonitoringTool > m_monTool {this,"MonTool", "", "Monitoring tool"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_road_monitor {this, "FirstStageRoadMonitor", "FPGATrackSimTrackMonitor", "First Stage Road Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_road_post_filter_1_monitor {this, "FirstStageRoadPostFilter1Monitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Filter1 Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_road_post_OLR_monitor {this, "FirstStageRoadPostOverlapRemovalMonitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Overlap Removal Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_road_post_filter_2_monitor {this, "FirstStageRoadPostFilter2Monitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Filter2 Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_monitor {this, "FirstStageTrackMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_post_setTruth_monitor {this, "FirstStageTrackPostSetTruthMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Set to TruthTracks Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_post_chi2_monitor {this, "FirstStageTrackPostChi2Monitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Chi2 Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_post_OLR_monitor {this, "FirstStageTrackPostOverlapRemovalTrackMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Overlap Removal Monitor"}
 
ServiceHandle< IChronoStatSvc > m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
 
Gaudi::Property< int > m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
 
Gaudi::Property< bool > m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
 
Gaudi::Property< bool > m_doTracking {this, "tracking", false, "flag to enable the tracking"}
 
Gaudi::Property< bool > m_doOverlapRemoval {this, "doOverlapRemoval", true , "flag to enable the overlap removal"}
 
Gaudi::Property< bool > m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
 
Gaudi::Property< bool > m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
 
Gaudi::Property< bool > m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
 
Gaudi::Property< bool > m_doHoughRootOutput1st {this, "DoHoughRootOutput1st", false, "Dump output from the Hough Transform to flat ntuples"}
 
Gaudi::Property< bool > m_doNNTrack {this, "DoNNTrack_1st", false, "Run NN track filtering for 1st stage"}
 
Gaudi::Property< bool > m_doGNNTrack {this, "DoGNNTrack", false, "Run tracking algorithm for GNN" }
 
Gaudi::Property< bool > m_doGNNPixelSeeding {this, "DoGNNPixelSeeding", false, "Flag to configure for GNN Pixel Seeding" }
 
Gaudi::Property< bool > m_doLRT {this, "doLRT", false, "Enable Large Radius Tracking"}
 
Gaudi::Property< bool > m_doLRTHitFiltering {this, "LRTHitFiltering", false, "flag to enable hit/cluster filtering for LRT"}
 
Gaudi::Property< bool > m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
 
Gaudi::Property< float > m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
 
Gaudi::Property< bool > m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
 
Gaudi::Property< int > m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
 
Gaudi::Property< bool > m_passLowestChi2TrackOnly {this,"passLowestChi2TrackOnly", false, "case when passing only lowest chi2 track per road"}
 
Gaudi::Property< bool > m_secondStageStrips {this, "secondStageStrips", true, "If set to true, strip hits/SPs go to the second stage. Otherwise they go to the first." }
 
Gaudi::Property< bool > m_outputRoadUnionTool {this, "outputRoadUnionTool", false, "If set to true, create LogicalEventInputHeader in output ROOT file using road union tool."}
 
Gaudi::Property< int > m_region {this, "Region", 0, "Region ID to assign to tracks"}
 
Gaudi::Property< bool > m_writeInputBranches {this, "writeInputBranches", true, "If set to false, never write input branches"}
 
Gaudi::Property< int > m_writeRegion {this,"writeRegion", -1, "Only output selected region, default is -1 which means not requirement"}
 
Gaudi::Property< std::string > m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for sliced hits in output ROOT file." }
 
Gaudi::Property< std::string > m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
 
Gaudi::Property< std::string > m_sliceFirstPixelBranch {this, "FirstPixelBranchName", "LogicalEventFirstPixelHeader", "Name of the branch for first stage pixel hits in output ROOT file"}
 
Gaudi::Property< std::string > m_sliceSecondPixelBranch {this, "SecondPixelBranchName", "LogicalEventSecondPixelHeader", "Name of the branch for second stage pixel hits in output ROOT file"}
 
Gaudi::Property< std::string > m_sliceStripBranch {this, "StripBranchName", "LogicalEventSpacepointHeader", "Name of the branch for (post-SP) strip hits in output ROOT file"}
 
Gaudi::Property< std::string > m_sliceStripBranchPreSP {this, "StripPreSPBranchName", "LogicalEventStripHeader", "Name of the branch for (pre-SP) strip hits in output ROOT file"}
 
FPGATrackSimLogicalEventInputHeader * m_slicedHitHeader = nullptr
 
FPGATrackSimLogicalEventInputHeader * m_slicedFirstPixelHeader = nullptr
 
FPGATrackSimLogicalEventInputHeader * m_slicedSecondPixelHeader = nullptr
 
FPGATrackSimLogicalEventInputHeader * m_slicedStripHeader = nullptr
 
FPGATrackSimLogicalEventInputHeader * m_slicedStripHeaderPreSP = nullptr
 
FPGATrackSimLogicalEventOutputHeader * m_logicEventOutputHeader = nullptr
 
std::vector< FPGATrackSimTrack > m_tracks_1st_guessedcheck
 
std::vector< FPGATrackSimTrack > m_tracks_1st_nomiss
 
std::vector< FPGATrackSimTrack > m_tracks_2nd_guessedcheck
 
std::vector< FPGATrackSimTrack > m_tracks_2nd_nomiss
 
std::vector< FPGATrackSimCluster > m_spacepoints {}
 
double m_evt = 0
 
long m_nRoadsTot = 0
 
long m_nTracksTot = 0
 
long m_nTracksChi2Tot = 0
 
long m_nTracksChi2OLRTot = 0
 
double m_evt_truth = 0
 
long m_nRoadsFound = 0
 
long m_nTracksFound = 0
 
long m_nTracksChi2Found = 0
 
long m_nTracksChi2OLRFound = 0
 
unsigned long m_maxNRoadsFound = 0
 
unsigned long m_maxNTracksTot = 0
 
unsigned long m_maxNTracksChi2Tot = 0
 
unsigned long m_maxNTracksChi2OLRTot = 0
 
SG::ReadHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey {this, "FPGATrackSimHitKey","FPGAHits", "FPGATrackSim hits key"}
 
SG::WriteHandleKey< FPGATrackSimClusterCollection > m_FPGASpacePointsKey {this, "FPGATrackSimSpacePoints1stKey","FPGASpacePoints_1st","FPGATrackSim SpacePoints key"}
 
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey_1st {this, "FPGATrackSimHitKey_1st","FPGAHits_1st","FPGATrackSim 1st stage hits key"}
 
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey_2nd {this, "FPGATrackSimHitKey_2nd","FPGAHits_2nd","FPGATrackSim 2nd stage hits key"}
 
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitFilteredKey {this, "FPGATrackSimHitFiltered1stKey","FPGAHitsFiltered_1st","FPGATrackSim Filtered Hits 1st stage key"}
 
SG::WriteHandleKey< FPGATrackSimHitContainer > m_FPGAHitInRoadsKey {this, "FPGATrackSimHitInRoads1stKey","FPGAHitsInRoads_1st","FPGATrackSim Hits in 1st stage roads key"}
 
SG::WriteHandleKey< FPGATrackSimRoadCollection > m_FPGARoadKey {this, "FPGATrackSimRoad1stKey","FPGARoads_1st","FPGATrackSim Roads 1st stage key"}
 
SG::WriteHandleKey< FPGATrackSimTrackCollection > m_FPGATrackKey {this, "FPGATrackSimTrack1stKey","FPGATracks_1st","FPGATrackSim Tracks 1st stage key"}
 
SG::ReadHandleKey< FPGATrackSimTruthTrackCollection > m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
 
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollection > m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
 
SG::ReadHandleKey< FPGATrackSimEventInfo > m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
 
DataObjIDColl m_extendedExtraObjects
 
StoreGateSvc_t m_evtStore
 Pointer to StoreGate (event store by default) More...
 
StoreGateSvc_t m_detStore
 Pointer to StoreGate (detector store by default) More...
 
std::vector< SG::VarHandleKeyArray * > m_vhka
 
bool m_varHandleArraysDeclared
 

Detailed Description

Definition at line 69 of file FPGATrackSimLogicalHitsProcessAlg.h.

Member Typedef Documentation

◆ StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< Algorithm > >::StoreGateSvc_t
privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

◆ FPGATrackSimLogicalHitsProcessAlg()

FPGATrackSimLogicalHitsProcessAlg::FPGATrackSimLogicalHitsProcessAlg ( const std::string &  name,
ISvcLocator *  pSvcLocator 
)

Definition at line 42 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

42  :
43  AthAlgorithm(name, pSvcLocator)
44 {
45 }

◆ ~FPGATrackSimLogicalHitsProcessAlg()

virtual FPGATrackSimLogicalHitsProcessAlg::~FPGATrackSimLogicalHitsProcessAlg ( )
virtualdefault

Member Function Documentation

◆ declareGaudiProperty() [1/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  hndl,
const SG::VarHandleKeyArrayType &   
)
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKeyArray>

Definition at line 170 of file AthCommonDataStore.h.

172  {
173  return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
174  hndl.value(),
175  hndl.documentation());
176 
177  }

◆ declareGaudiProperty() [2/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  hndl,
const SG::VarHandleKeyType &   
)
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

158  {
159  return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
160  hndl.value(),
161  hndl.documentation());
162 
163  }

◆ declareGaudiProperty() [3/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  hndl,
const SG::VarHandleType &   
)
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleBase>

Definition at line 184 of file AthCommonDataStore.h.

186  {
187  return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
188  hndl.value(),
189  hndl.documentation());
190  }

◆ declareGaudiProperty() [4/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  t,
const SG::NotHandleType &   
)
inlineprivateinherited

specialization for handling everything that's not a Gaudi::Property<SG::VarHandleKey> or a <SG::VarHandleKeyArray>

Definition at line 199 of file AthCommonDataStore.h.

200  {
201  return PBASE::declareProperty(t);
202  }

◆ declareProperty() [1/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
SG::VarHandleBase &  hndl,
const std::string &  doc,
const SG::VarHandleType &   
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
hndlObject holding the property value.
docDocumentation string for the property.

This is the version for types that derive from SG::VarHandleBase. The property value object is put on the input and output lists as appropriate; then we forward to the base class.

Definition at line 245 of file AthCommonDataStore.h.

249  {
250  this->declare(hndl.vhKey());
251  hndl.vhKey().setOwner(this);
252 
253  return PBASE::declareProperty(name,hndl,doc);
254  }

◆ declareProperty() [2/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
SG::VarHandleKey &  hndl,
const std::string &  doc,
const SG::VarHandleKeyType &   
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
hndlObject holding the property value.
docDocumentation string for the property.

This is the version for types that derive from SG::VarHandleKey. The property value object is put on the input and output lists as appropriate; then we forward to the base class.

Definition at line 221 of file AthCommonDataStore.h.

225  {
226  this->declare(hndl);
227  hndl.setOwner(this);
228 
229  return PBASE::declareProperty(name,hndl,doc);
230  }

◆ declareProperty() [3/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
SG::VarHandleKeyArray &  hndArr,
const std::string &  doc,
const SG::VarHandleKeyArrayType &   
)
inlineinherited

Definition at line 259 of file AthCommonDataStore.h.

263  {
264 
265  // std::ostringstream ost;
266  // ost << Algorithm::name() << " VHKA declareProp: " << name
267  // << " size: " << hndArr.keys().size()
268  // << " mode: " << hndArr.mode()
269  // << " vhka size: " << m_vhka.size()
270  // << "\n";
271  // debug() << ost.str() << endmsg;
272 
273  hndArr.setOwner(this);
274  m_vhka.push_back(&hndArr);
275 
276  Gaudi::Details::PropertyBase* p = PBASE::declareProperty(name, hndArr, doc);
277  if (p != 0) {
278  p->declareUpdateHandler(&AthCommonDataStore<PBASE>::updateVHKA, this);
279  } else {
280  ATH_MSG_ERROR("unable to call declareProperty on VarHandleKeyArray "
281  << name);
282  }
283 
284  return p;
285 
286  }

◆ declareProperty() [4/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
T &  property,
const std::string &  doc,
const SG::NotHandleType &   
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
propertyObject holding the property value.
docDocumentation string for the property.

This is the generic version, for types that do not derive from SG::VarHandleKey. It just forwards to the base class version of declareProperty.

Definition at line 333 of file AthCommonDataStore.h.

337  {
338  return PBASE::declareProperty(name, property, doc);
339  }

◆ declareProperty() [5/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
T &  property,
const std::string &  doc = "none" 
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
propertyObject holding the property value.
docDocumentation string for the property.

This dispatches to either the generic declareProperty or the one for VarHandle/Key/KeyArray.

Definition at line 352 of file AthCommonDataStore.h.

355  {
356  typedef typename SG::HandleClassifier<T>::type htype;
357  return declareProperty (name, property, doc, htype());
358  }

◆ declareProperty() [6/6]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( Gaudi::Property< T, V, H > &  t)
inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

145  {
146  typedef typename SG::HandleClassifier<T>::type htype;
147  return AthCommonDataStore<PBASE>::declareGaudiProperty(t, htype());
148  }

◆ detStore()

const ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::detStore ( ) const
inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

95 { return m_detStore; }

◆ evtStore() [1/2]

ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::evtStore ( )
inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

85 { return m_evtStore; }

◆ evtStore() [2/2]

const ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::evtStore ( ) const
inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 90 of file AthCommonDataStore.h.

90 { return m_evtStore; }

◆ execute()

StatusCode FPGATrackSimLogicalHitsProcessAlg::execute ( )
overridevirtual

(first track monitor, after getting tracks) create a vector of references from a vector of instances

(second track monitor, after set track parameters to truth) create a vector of references from a vector of instances

Definition at line 146 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

147 {
148  const EventContext& ctx = getContext();
149 
150  // Get reference to hits from StoreGate.
151  SG::ReadHandle<FPGATrackSimHitCollection> FPGAHits(m_FPGAHitKey, ctx);
152  if (!FPGAHits.isValid()) {
153  if (m_evt == 0) {
154  ATH_MSG_WARNING("Didn't receive " << FPGAHits.key() << " on first event; assuming no input events.");
155  }
156  SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
157  if (!appMgr) {
158  ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
159  return StatusCode::FAILURE;
160  }
161  return appMgr->stopRun();
162  }
163 
164  // Set up write handles.
165  SG::WriteHandle<FPGATrackSimHitCollection> FPGAHits_1st (m_FPGAHitKey_1st,ctx);
166  SG::WriteHandle<FPGATrackSimHitCollection> FPGAHits_2nd (m_FPGAHitKey_2nd,ctx);
167  SG::WriteHandle<FPGATrackSimRoadCollection> FPGARoads_1st (m_FPGARoadKey, ctx);
168  SG::WriteHandle<FPGATrackSimHitContainer> FPGAHitsInRoads_1st (m_FPGAHitInRoadsKey, ctx);
169 
170  ATH_CHECK( FPGAHits_1st.record (std::make_unique<FPGATrackSimHitCollection>()));
171  ATH_CHECK( FPGAHits_2nd.record (std::make_unique<FPGATrackSimHitCollection>()));
172  ATH_CHECK( FPGARoads_1st.record (std::make_unique<FPGATrackSimRoadCollection>()));
173  ATH_CHECK( FPGAHitsInRoads_1st.record (std::make_unique<FPGATrackSimHitContainer>()));
174 
175  SG::WriteHandle<FPGATrackSimTrackCollection> FPGATracks_1stHandle (m_FPGATrackKey, ctx);
176  ATH_CHECK(FPGATracks_1stHandle.record (std::make_unique<FPGATrackSimTrackCollection>()));
177 
178  SG::WriteHandle<FPGATrackSimHitCollection> FPGAHitsFiltered_1st (m_FPGAHitFilteredKey, ctx);
179  ATH_CHECK( FPGAHitsFiltered_1st.record (std::make_unique<FPGATrackSimHitCollection>()));
180 
181  SG::WriteHandle<FPGATrackSimClusterCollection> FPGASpacePoints (m_FPGASpacePointsKey, ctx);
182  ATH_CHECK( FPGASpacePoints.record (std::make_unique<FPGATrackSimClusterCollection>()));
183 
184  // Query the event selection service to make sure this event passed cuts.
185  if (!m_evtSel->getSelectedEvent()) {
186 
187  // Potentially write the output data, now it's empty and reset, but this keeps things synchronized over trees
188  if (m_writeOutputData) {
189  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roads_1st;
190  std::vector<FPGATrackSimTrack> tracks_1st;
191  auto dataFlowInfo = std::make_unique<FPGATrackSimDataFlowInfo>();
192  ATH_CHECK(writeOutputData(roads_1st, tracks_1st, dataFlowInfo.get()));
193  }
194 
195  return StatusCode::SUCCESS;
196  }
197  ATH_MSG_INFO("Event accepted by: " << m_evtSel->name());
198  if ((m_writeRegion>=0)&&(m_writeRegion==m_evtSel->getRegionID())) {
199  m_writeOutputTool->activateEventOutput();
200  }
201 
202  // Event passes cuts, count it. technically, DataPrep does this now.
203  m_evt++;
204 
205  // Read event info structure. all we need this for is to propagate to our event info structures.
206  SG::ReadHandle<FPGATrackSimEventInfo> FPGAEventInfo(m_FPGAEventInfoKey, ctx);
207  if (!FPGAEventInfo.isValid()) {
208  ATH_MSG_ERROR("Could not find FPGA Event Info with key " << FPGAEventInfo.key());
209  return StatusCode::FAILURE;
210  }
211  FPGATrackSimEventInfo eventInfo = *FPGAEventInfo.cptr();
212  m_slicedFirstPixelHeader->newEvent(eventInfo);
213  m_slicedSecondPixelHeader->newEvent(eventInfo);
214  m_slicedStripHeader->newEvent(eventInfo);
215  m_slicedStripHeaderPreSP->newEvent(eventInfo);
216 
217  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: Split hits to 1st and 2nd stage");
218 
219  std::vector<std::shared_ptr<const FPGATrackSimHit>> phits_output, phits_all, phits_1st, phits_2nd;
220  phits_1st.reserve(FPGAHits->size());
221  phits_2nd.reserve(FPGAHits->size());
222  ATH_MSG_DEBUG("Incoming Hits: " << FPGAHits->size());
223  for (const FPGATrackSimHit& hit : *(FPGAHits.cptr())) {
224  phits_all.emplace_back(&hit, [](const FPGATrackSimHit*){});
225  }
226 
227  // Use the slicing engine tool to do the stage-based separation. Does not use the pmap.
228  m_slicingEngineTool->sliceHits(phits_all, phits_1st, phits_2nd);
229  // record 1st stage hits in SG
230  for (auto& hit : phits_1st) {
231  FPGAHits_1st->push_back(*hit);
232  }
233 
234  if(m_writeOutputData) *m_slicedStripHeaderPreSP = *m_slicedStripHeader;
235 
236  // The slicing engine puts strip hits into a logical event input header. That header now needs to go
237  // to the spacepoint tool if it's turned on. Those hits then get added to phits_1st or phits_2nd as appropriate.
238  if (m_doSpacepoints) {
239  m_spacepoints.clear();
240  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: SP fornmation");
241  ATH_CHECK(m_spacepointsTool->DoSpacePoints(*m_slicedStripHeader, m_spacepoints));
242  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: SP fornmation");
243  for (const FPGATrackSimCluster& cluster : m_spacepoints) FPGASpacePoints->push_back(cluster);
244  }
245 
246  // Use a property to control whether the strips/SPs go to 1st or second stage.
247  for (const FPGATrackSimHit& hit : m_slicedStripHeader->towers().at(0).hits()) {
248  (m_secondStageStrips ? phits_2nd : phits_1st).emplace_back(&hit, [](const FPGATrackSimHit*){});
249  }
250  for (auto& hit : phits_2nd) {
251  FPGAHits_2nd->push_back(*hit);
252  }
253 
254  // Add all hits including SPs to this for the HoughRootOutputTool
255  for (const FPGATrackSimHit& hit : *(FPGAHits_2nd.cptr())) {
256  phits_output.emplace_back(&hit, [](const FPGATrackSimHit*){});
257  }
258 
259  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: Split hits to 1st and 2nd stage");
260  ATH_MSG_DEBUG("1st stage hits: " << phits_1st.size() << " 2nd stage hits: " << phits_2nd.size() );
261  if (phits_1st.empty()) return StatusCode::SUCCESS;
262  // Get truth tracks from DataPrep as well.
263  SG::ReadHandle<FPGATrackSimTruthTrackCollection> FPGATruthTracks(m_FPGATruthTrackKey, ctx);
264  if (!FPGATruthTracks.isValid()) {
265  ATH_MSG_ERROR("Could not find FPGA Truth Track Collection with key " << FPGATruthTracks.key());
266  return StatusCode::FAILURE;
267  }
268 
269  // Same for offline tracks.
270  SG::ReadHandle<FPGATrackSimOfflineTrackCollection> FPGAOfflineTracks(m_FPGAOfflineTrackKey, ctx);
271  if (!FPGAOfflineTracks.isValid()) {
272  ATH_MSG_ERROR("Could not find FPGA Offline Track Collection with key " << FPGAOfflineTracks.key());
273  return StatusCode::FAILURE;
274  }
275 
276 
278  // roads //
280 
282  const std::vector<FPGATrackSimTruthTrack>& truthtracks = *FPGATruthTracks;
284  auto nLogicalLayers = m_FPGATrackSimMapping->PlaneMap_1st(0)->getNLogiLayers();
287  auto monitorRoads = [&](auto& monitor, const auto& roads) {
288  if (!monitor.empty()) {
289  monitor->fillRoad(roads, truthtracks, nLogicalLayers);
290  }
291  };
292 
293 
294  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: GetRoads");
295  // get roads
296  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roads_1st;
297  ATH_CHECK(m_roadFinderTool->getRoads(phits_1st, roads_1st, *(FPGATruthTracks.cptr())));
298  monitorRoads(m_1st_stage_road_monitor, roads_1st);
299  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: GetRoads");
300 
301 
302 
303  // Standard road Filter
304  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: RoadFiltering");
305  std::vector<std::shared_ptr<const FPGATrackSimRoad>> postfilter_roads;
306  if (m_filterRoads) {
307  ATH_CHECK(m_roadFilterTool->filterRoads(roads_1st, postfilter_roads));
308  roads_1st = std::move(postfilter_roads);
309  }
311  monitorRoads(m_1st_stage_road_post_filter_1_monitor, roads_1st);
312  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: RoadFiltering");
313 
314 
315  // overlap removal
316  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: OverlapRemoval");
317  if (m_doOverlapRemoval) ATH_CHECK(m_overlapRemovalTool_1st->runOverlapRemoval(roads_1st));
319  monitorRoads(m_1st_stage_road_post_OLR_monitor, roads_1st);
320  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: OverlapRemoval");
321 
322 
323  // Road Filter2
324  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: RoadFiltering2");
325  std::vector<std::shared_ptr<const FPGATrackSimRoad>> postfilter2_roads;
326  if (m_filterRoads2) {
327  ATH_CHECK(m_roadFilterTool2->filterRoads(roads_1st, postfilter2_roads));
328  roads_1st = std::move(postfilter2_roads);
329  }
331  monitorRoads(m_1st_stage_road_post_filter_2_monitor, roads_1st);
332  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: RoadFiltering2");
333 
334 
336  // tracks //
338 
340  auto monitorTracks = [&](auto& monitor, const auto& tracks) {
341  if (monitor.empty()) return;
342  // prepare vector<const FPGATrackSimTrack*> regardless of input type
343  std::vector<const FPGATrackSimTrack*> track_ptrs;
344  track_ptrs.reserve(tracks.size());
345  // transform tracks into a vector of pointers
346  if constexpr (std::is_pointer_v<typename std::decay_t<decltype(tracks)>::value_type>) {
347  // tracks is std::vector<const FPGATrackSimTrack*>
348  track_ptrs.insert(track_ptrs.end(), tracks.begin(), tracks.end());
349  } else {
350  // tracks is std::vector<FPGATrackSimTrack>
351  std::transform(tracks.begin(), tracks.end(), std::back_inserter(track_ptrs), [](const auto& t) { return &t; });
352  }
353  // monitor using track pointers
354  monitor->fillTrack(track_ptrs, truthtracks, 1.e15);
355  };
356 
357  // Get tracks
358  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: Getting Tracks");
359  std::vector<FPGATrackSimTrack> tracks_1st;
360  if (m_doTracking) {
361  if (m_doNNTrack) {
362  ATH_MSG_DEBUG("Performing NN tracking");
363  ATH_CHECK(m_NNTrackTool->getTracks_1st(roads_1st, tracks_1st));
364  if (m_doGNNTrack) {
365  ATH_MSG_DEBUG("Performing track parameter estimation");
366  ATH_CHECK(m_NNTrackTool->setTrackParameters(tracks_1st,true,m_evtSel->getMin(), m_evtSel->getMax()));
367  }
368  } else {
369  ATH_MSG_DEBUG("Performing Linear tracking");
370  if (m_passLowestChi2TrackOnly) { // Pass only the lowest chi2 track per road
371  // Loop over roads and keep only the best track for each road
372  for (const auto& road : roads_1st) {
373  std::vector<FPGATrackSimTrack> tracksForCurrentRoad;
374 
375  // Collect tracks for this road
376  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roadVec = {road};
377  ATH_CHECK(m_trackFitterTool_1st->getTracks(roadVec, tracksForCurrentRoad, m_evtSel->getMin(), m_evtSel->getMax()));
378 
379  // Find the best track for this road
380  if (!tracksForCurrentRoad.empty()) {
381  auto bestTrackIter = std::min_element(
382  tracksForCurrentRoad.begin(), tracksForCurrentRoad.end(),
383  [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
384  return a.getChi2ndof() < b.getChi2ndof();
385  });
386 
387  if (bestTrackIter != tracksForCurrentRoad.end() && bestTrackIter->getChi2ndof() < 1.e15) {
388  tracks_1st.push_back(*bestTrackIter);
389  }
390  }
391  }
392  } else { // Pass all tracks with chi2 < 1e15
393  ATH_CHECK(m_trackFitterTool_1st->getTracks(roads_1st, tracks_1st, m_evtSel->getMin(), m_evtSel->getMax()));
394  }
395  }
396  } else { // No tracking;
397  ATH_MSG_DEBUG("No tracking. Just running dummy road2track algorith");
398  if(m_doGNNPixelSeeding) { //For GNNPixelSeeding, convert the roads to a track in the simplest form
399  for (const std::shared_ptr<const FPGATrackSimRoad>& road : roads_1st) {
400  std::vector<std::shared_ptr<const FPGATrackSimHit>> track_hits;
401  for (unsigned layer = 0; layer < road->getNLayers(); ++layer) {
402  track_hits.insert(track_hits.end(), road->getHits(layer).begin(), road->getHits(layer).end());
403  }
404 
405  FPGATrackSimTrack track_cand;
406  track_cand.setNLayers(track_hits.size());
407  for (size_t ihit = 0; ihit < track_hits.size(); ++ihit) {
408  track_cand.setFPGATrackSimHit(ihit, *(track_hits[ihit]));
409  }
410  tracks_1st.push_back(track_cand);
411  }
412  }
413  else { roadsToTrack(roads_1st, tracks_1st, m_FPGATrackSimMapping->PlaneMap_1st(0)); }
414  }
415 
418  monitorTracks(m_1st_stage_track_monitor, tracks_1st);
419  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: Getting Tracks");
420 
421 
422  // set track parameters to truth
423  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: Set Track Parameters to Truth");
424  //Loop over tracks and set the region for all of them, also optionally set track parameters to truth
425  for (FPGATrackSimTrack& track : tracks_1st) {
426  track.setRegion(m_region);
427  if (m_SetTruthParametersForTracks >= 0 && truthtracks.size() > 0) {
428  if (m_SetTruthParametersForTracks != 0)
429  track.setQOverPt(truthtracks.front().getQOverPt());
430  else if (m_SetTruthParametersForTracks != 1)
431  track.setD0(truthtracks.front().getD0());
432  else if (m_SetTruthParametersForTracks != 2)
433  track.setPhi(truthtracks.front().getPhi());
434  else if (m_SetTruthParametersForTracks != 3)
435  track.setZ0(truthtracks.front().getZ0());
436  else if (m_SetTruthParametersForTracks != 4)
437  track.setEta(truthtracks.front().getEta());
438  }
439  }
442  monitorTracks(m_1st_stage_track_post_setTruth_monitor, tracks_1st);
443  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: Set Track Parameters to Truth");
444 
445  // Loop over roads and store them in SG (after track finding to also copy the sector information)
446  for (auto const& road : roads_1st) {
447  std::vector<FPGATrackSimHit> road_hits;
448  ATH_MSG_DEBUG("Hough Road X Y: " << road->getX() << " " << road->getY());
449  for (size_t l = 0; l < road->getNLayers(); ++l) {
450  for (const auto& layerH : road->getHits(l)) {
451  road_hits.push_back(*layerH);
452  }
453  }
454  FPGAHitsInRoads_1st->push_back(std::move(road_hits));
455  FPGARoads_1st->push_back(*road);
456  }
457 
458  // overlap removal
459  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: OverlapRemoval");
460  if (m_doOverlapRemoval) ATH_CHECK(m_overlapRemovalTool_1st->runOverlapRemoval(tracks_1st));
461  // monitor variables (vectors of pointers)
462  std::vector<const FPGATrackSimTrack*> tracks_1st_after_chi2;
463  std::vector<const FPGATrackSimTrack*> tracks_1st_after_overlap;
464  for (const FPGATrackSimTrack& track : tracks_1st) {
465  if (track.getChi2ndof() < m_trackScoreCut.value()) {
466  m_nTracksChi2Tot++;
467  tracks_1st_after_chi2.push_back(&track);
468  if (track.passedOR()) {
469  tracks_1st_after_overlap.push_back(&track);
470  m_nTracksChi2OLRTot++;
471  }
472  }
473  }
475  monitorTracks(m_1st_stage_track_post_chi2_monitor, tracks_1st_after_chi2);
477  monitorTracks(m_1st_stage_track_post_OLR_monitor, tracks_1st_after_overlap);
478  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: OverlapRemoval");
479 
480  m_nRoadsTot += roads_1st.size();
481  m_nTracksTot += tracks_1st.size();
482 
483  // Do some simple monitoring of efficiencies. okay, we need truth tracks here.
484  if (truthtracks.size() > 0) {
485  m_evt_truth++;
486  if (roads_1st.size() > 0) m_nRoadsFound++;
487  if (roads_1st.size() > m_maxNRoadsFound) m_maxNRoadsFound = roads_1st.size();
488 
489  unsigned npasschi2(0);
490  unsigned npasschi2OLR(0);
491  if (tracks_1st.size() > 0) {
492  m_nTracksFound++;
493  if (tracks_1st.size() > m_maxNTracksTot) m_maxNTracksTot = tracks_1st.size();
494  for (const auto& track : tracks_1st) {
495  if (track.getChi2ndof() < m_trackScoreCut.value()) {
496  npasschi2++;
497  if (track.passedOR()) {
498  npasschi2OLR++;
499  }
500  }
501  }
502  }
503  if (npasschi2 > m_maxNTracksChi2Tot) m_maxNTracksChi2Tot = npasschi2;
504  if (npasschi2OLR > m_maxNTracksChi2OLRTot) m_maxNTracksChi2OLRTot = npasschi2OLR;
505  if (npasschi2 > 0) m_nTracksChi2Found++;
506  if (npasschi2OLR > 0) m_nTracksChi2OLRFound++;
507  }
508 
509  for (const FPGATrackSimTrack& track : tracks_1st) FPGATracks_1stHandle->push_back(track);
510 
511  // Now, we may want to do large-radius tracking on the hits not used by the first stage tracking.
512  // This follows overlap removal.
513  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roadsLRT;
514  std::vector<FPGATrackSimTrack> tracksLRT; // currently empty
515  if (m_doLRT) {
516  // Filter out hits that are on successful first-stage tracks
517  std::vector<std::shared_ptr<const FPGATrackSimHit>> remainingHits;
518 
519  if (m_doLRTHitFiltering) {
520  ATH_MSG_DEBUG("Doing hit filtering based on prompt tracks.");
521  ATH_CHECK(m_LRTRoadFilterTool->filterUsedHits(tracks_1st, phits_1st, remainingHits));
522 
523  for (const auto &Hit : remainingHits) FPGAHitsFiltered_1st->push_back(*Hit);
524 
525  } else {
526  ATH_MSG_DEBUG("No hit filtering requested; using all hits for LRT.");
527  remainingHits = std::move(phits_1st);
528  }
529 
530  // Get LRT roads with remaining hits
531  ATH_MSG_DEBUG("Finding LRT roads");
532  ATH_CHECK(m_LRTRoadFinderTool->getRoads( remainingHits, roadsLRT ));
533  }
534 
535  auto dataFlowInfo = std::make_unique<FPGATrackSimDataFlowInfo>();
536 
537  // Write the output and reset
538  if (m_writeOutputData) {
539  ATH_CHECK(writeOutputData(roads_1st, tracks_1st, dataFlowInfo.get()));
540  }
541 
542  // This one we can do-- by passing in truth and offline tracks via storegate above (*FPGAOfflineTracks).
543  if (m_doHoughRootOutput1st) {
544  ATH_MSG_DEBUG("Running HoughRootOutputTool in 1st stage.");
545 
546  SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
547  if (!appMgr) {
548  ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
549  return StatusCode::FAILURE;
550  }
551 
552  // Create output ROOT file
553  ATH_CHECK(m_houghRootOutputTool->fillTree(tracks_1st, truthtracks, *FPGAOfflineTracks, phits_output, m_writeOutNonSPStripHits, false));
554  }
555 
556  // Reset data pointers
557  if (m_outputRoadUnionTool) m_slicedHitHeader->reset();
558  m_logicEventOutputHeader->reset();
559 
560  return StatusCode::SUCCESS;
561 }

◆ extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase &  ExtraDeps)
protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

◆ extraOutputDeps()

const DataObjIDColl & AthAlgorithm::extraOutputDeps ( ) const
overridevirtualinherited

Return the list of extra output dependencies.

This list is extended to include symlinks implied by inheritance relations.

Definition at line 50 of file AthAlgorithm.cxx.

51 {
52  // If we didn't find any symlinks to add, just return the collection
53  // from the base class. Otherwise, return the extended collection.
54  if (!m_extendedExtraObjects.empty()) {
55  return m_extendedExtraObjects;
56  }
57  return Algorithm::extraOutputDeps();
58 }

◆ finalize()

StatusCode FPGATrackSimLogicalHitsProcessAlg::finalize ( )
overridevirtual

Definition at line 599 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

600 {
601  ATH_MSG_INFO("PRINTING FPGATRACKSIM SIMPLE STATS");
602  ATH_MSG_INFO("========================================================================================");
603  ATH_MSG_INFO("Ran on events = " << m_evt);
604  ATH_MSG_INFO("Inclusive efficiency to find a road = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nRoadsFound/(float)m_evt_truth)));
605  ATH_MSG_INFO("Inclusive efficiency to find a track = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksFound/(float)m_evt_truth)));
606  ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2Found/(float)m_evt_truth)));
607  ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 and OLR = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRFound/(float)m_evt_truth)));
608 
609 
610  ATH_MSG_INFO("Number of 1st stage roads/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nRoadsTot/(float)m_evt)));
611  ATH_MSG_INFO("Number of 1st stage track combinations/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksTot/(float)m_evt)));
612  ATH_MSG_INFO("Number of 1st stage tracks passing chi2/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2Tot/(float)m_evt)));
613  ATH_MSG_INFO("Number of 1st stage tracks passing chi2 and OLR/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRTot/(float)m_evt)));
614  ATH_MSG_INFO("========================================================================================");
615 
616  ATH_MSG_INFO("Max number of 1st stage roads in an event = " << m_maxNRoadsFound);
617  ATH_MSG_INFO("Max number of 1st stage track combinations in an event = " << m_maxNTracksTot);
618  ATH_MSG_INFO("Max number of 1st stage tracks passing chi2 in an event = " << m_maxNTracksChi2Tot);
619  ATH_MSG_INFO("Max number of 1st stage tracks passing chi2 and OLR in an event = " << m_maxNTracksChi2OLRTot);
620  ATH_MSG_INFO("========================================================================================");
621 
622  return StatusCode::SUCCESS;
623 }

◆ initialize()

StatusCode FPGATrackSimLogicalHitsProcessAlg::initialize ( )
overridevirtual

Definition at line 48 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

49 {
50  // Dump the configuration to make sure it propagated through right
51  const std::vector<Gaudi::Details::PropertyBase*> props = this->getProperties();
52  for( Gaudi::Details::PropertyBase* prop : props ) {
53  if (prop->ownerTypeName()==this->type()) {
54  ATH_MSG_DEBUG("Property:\t" << prop->name() << "\t : \t" << prop->toString());
55  }
56  }
57 
58  std::stringstream ss(m_description);
59  std::string line;
60  ATH_MSG_INFO("Tag config:");
61  if (!m_description.empty()) {
62  while (std::getline(ss, line, '\n')) {
63  ATH_MSG_INFO('\t' << line);
64  }
65  }
66  ATH_CHECK(m_roadFinderTool.retrieve());
67  ATH_CHECK(m_LRTRoadFilterTool.retrieve(EnableTool{m_doLRT}));
68  ATH_CHECK(m_LRTRoadFinderTool.retrieve(EnableTool{m_doLRT}));
69  ATH_CHECK(m_houghRootOutputTool.retrieve(EnableTool{m_doHoughRootOutput1st}));
70  ATH_CHECK(m_NNTrackTool.retrieve(EnableTool{m_doNNTrack}));
71  ATH_CHECK(m_roadFilterTool.retrieve(EnableTool{m_filterRoads}));
72  ATH_CHECK(m_roadFilterTool2.retrieve(EnableTool{m_filterRoads2}));
73 
74  ATH_CHECK(m_spacepointsTool.retrieve(EnableTool{m_doSpacepoints}));
75 
76  ATH_CHECK(m_trackFitterTool_1st.retrieve(EnableTool{m_doTracking}));
77  ATH_CHECK(m_overlapRemovalTool_1st.retrieve());
78  ATH_CHECK(m_writeOutputTool.retrieve());
79  ATH_CHECK(m_FPGATrackSimMapping.retrieve());
80  ATH_CHECK(m_slicingEngineTool.retrieve());
81 
82 
87  ATH_CHECK(m_1st_stage_road_monitor.retrieve());
88  ATH_CHECK(m_1st_stage_road_post_filter_1_monitor.retrieve());
89  ATH_CHECK(m_1st_stage_road_post_OLR_monitor.retrieve());
90  ATH_CHECK(m_1st_stage_road_post_filter_2_monitor.retrieve());
92  ATH_CHECK(m_1st_stage_track_monitor.retrieve());
93  ATH_CHECK(m_1st_stage_track_post_setTruth_monitor.retrieve());
94  ATH_CHECK(m_1st_stage_track_post_chi2_monitor.retrieve());
95  ATH_CHECK(m_1st_stage_track_post_OLR_monitor.retrieve());
96 
97 
98 
99  ATH_MSG_DEBUG("initialize() Instantiating root objects");
100 
101  // ROOT branches created for test vectors.
102  m_logicEventOutputHeader = m_writeOutputTool->addOutputBranch(m_outputBranch.value(), true);
103 
104  if (m_outputRoadUnionTool) m_slicedHitHeader = m_writeOutputTool->addInputBranch(m_sliceBranch.value(), m_writeInputBranches);
105 
106  // Updated slicing engine test vectors will have three streams.
107  m_slicedFirstPixelHeader = m_writeOutputTool->addInputBranch(m_sliceFirstPixelBranch.value(), m_writeInputBranches);
108  m_slicedSecondPixelHeader = m_writeOutputTool->addInputBranch(m_sliceSecondPixelBranch.value(), m_writeInputBranches);
109  m_slicedStripHeader = m_writeOutputTool->addInputBranch(m_sliceStripBranch.value(), m_writeInputBranches);
110 
111  // We also need a pre- and post- SP copy of the SPs.
112  m_slicedStripHeaderPreSP = m_writeOutputTool->addInputBranch(m_sliceStripBranchPreSP.value(), m_writeInputBranches);
113 
114  // Connect the slicing tools accordingly. We probably no longer need to hook up the roadfinder here.
115  if (m_outputRoadUnionTool) m_roadFinderTool->setupSlices(m_slicedHitHeader);
116  m_slicingEngineTool->setupSlices(m_slicedFirstPixelHeader, m_slicedSecondPixelHeader, m_slicedStripHeader);
117 
118  ATH_MSG_DEBUG("initialize() Setting branch");
119 
120  if (!m_monTool.empty())
121  ATH_CHECK(m_monTool.retrieve());
122 
123  ATH_CHECK( m_FPGASpacePointsKey.initialize() );
124  ATH_CHECK( m_FPGAHitInRoadsKey.initialize() );
125  ATH_CHECK( m_FPGAHitFilteredKey.initialize() );
126  ATH_CHECK( m_FPGARoadKey.initialize() );
127  ATH_CHECK( m_FPGATrackKey.initialize() );
128  ATH_CHECK( m_FPGAHitKey.initialize() );
129  ATH_CHECK( m_FPGAHitKey_1st.initialize() );
130  ATH_CHECK( m_FPGAHitKey_2nd.initialize() );
131  ATH_CHECK( m_FPGATruthTrackKey.initialize() );
132  ATH_CHECK( m_FPGAOfflineTrackKey.initialize() );
133  ATH_CHECK( m_FPGAEventInfoKey.initialize() );
134 
135  ATH_CHECK( m_chrono.retrieve() );
136  ATH_MSG_DEBUG("initialize() Finished");
137 
138  return StatusCode::SUCCESS;
139 }

◆ inputHandles()

virtual std::vector<Gaudi::DataHandle*> AthCommonDataStore< AthCommonMsg< Algorithm > >::inputHandles ( ) const
overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ msg() [1/2]

MsgStream& AthCommonMsg< Algorithm >::msg ( ) const
inlineinherited

Definition at line 24 of file AthCommonMsg.h.

24  {
25  return this->msgStream();
26  }

◆ msg() [2/2]

MsgStream& AthCommonMsg< Algorithm >::msg ( const MSG::Level  lvl) const
inlineinherited

Definition at line 27 of file AthCommonMsg.h.

27  {
28  return this->msgStream(lvl);
29  }

◆ msgLvl()

bool AthCommonMsg< Algorithm >::msgLvl ( const MSG::Level  lvl) const
inlineinherited

Definition at line 30 of file AthCommonMsg.h.

30  {
31  return this->msgLevel(lvl);
32  }

◆ outputHandles()

virtual std::vector<Gaudi::DataHandle*> AthCommonDataStore< AthCommonMsg< Algorithm > >::outputHandles ( ) const
overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ printHitSubregions()

void FPGATrackSimLogicalHitsProcessAlg::printHitSubregions ( std::vector< FPGATrackSimHit > const &  hits)
private

Definition at line 629 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

630 {
631  ATH_MSG_WARNING("Hit regions:");
632  for (const auto& hit : hits)
633  {
634  std::vector<uint32_t> regions = m_FPGATrackSimMapping->SubRegionMap()->getRegions(hit);
635  std::stringstream ss;
636  for (auto r : regions)
637  ss << r << ",";
638  ATH_MSG_WARNING("\t[" << ss.str() << "]");
639  }
640 }

◆ renounce()

std::enable_if_t<std::is_void_v<std::result_of_t<decltype(&T::renounce)(T)> > && !std::is_base_of_v<SG::VarHandleKeyArray, T> && std::is_base_of_v<Gaudi::DataHandle, T>, void> AthCommonDataStore< AthCommonMsg< Algorithm > >::renounce ( T &  h)
inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

381  {
382  h.renounce();
383  PBASE::renounce (h);
384  }

◆ renounceArray()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::renounceArray ( SG::VarHandleKeyArray &  handlesArray)
inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

364  {
365  handlesArray.renounce();
366  }

◆ sysInitialize()

StatusCode AthAlgorithm::sysInitialize ( )
overridevirtualinherited

Override sysInitialize.

Override sysInitialize from the base class.

Loop through all output handles, and if they're WriteCondHandles, automatically register them and this Algorithm with the CondSvc

Scan through all outputHandles, and if they're WriteCondHandles, register them with the CondSvc

Reimplemented from AthCommonDataStore< AthCommonMsg< Algorithm > >.

Reimplemented in AthAnalysisAlgorithm, AthFilterAlgorithm, PyAthena::Alg, and AthHistogramAlgorithm.

Definition at line 66 of file AthAlgorithm.cxx.

66  {
67  StatusCode sc=AthCommonDataStore<AthCommonMsg<Algorithm>>::sysInitialize();
68 
69  if (sc.isFailure()) {
70  return sc;
71  }
72  ServiceHandle<ICondSvc> cs("CondSvc",name());
73  for (auto h : outputHandles()) {
74  if (h->isCondition() && h->mode() == Gaudi::DataHandle::Writer) {
75  // do this inside the loop so we don't create the CondSvc until needed
76  if ( cs.retrieve().isFailure() ) {
77  ATH_MSG_WARNING("no CondSvc found: won't autoreg WriteCondHandles");
78  return StatusCode::SUCCESS;
79  }
80  if (cs->regHandle(this,*h).isFailure()) {
81  sc = StatusCode::FAILURE;
82  ATH_MSG_ERROR("unable to register WriteCondHandle " << h->fullKey()
83  << " with CondSvc");
84  }
85  }
86  }
87  return sc;
88 }

◆ sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< Algorithm > >::sysStart ( )
overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

◆ updateVHKA()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::updateVHKA ( Gaudi::Details::PropertyBase &  )
inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

308  {
309  // debug() << "updateVHKA for property " << p.name() << " " << p.toString()
310  // << " size: " << m_vhka.size() << endmsg;
311  for (auto &a : m_vhka) {
312  std::vector<SG::VarHandleKey*> keys = a->keys();
313  for (auto k : keys) {
314  k->setOwner(this);
315  }
316  }
317  }

◆ writeOutputData()

StatusCode FPGATrackSimLogicalHitsProcessAlg::writeOutputData ( const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &  roads_1st,
std::vector< FPGATrackSimTrack > const &  tracks_1st,
FPGATrackSimDataFlowInfo const *  dataFlowInfo 
)
private

Definition at line 568 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

571 {
572  m_logicEventOutputHeader->reset();
573 
574  ATH_MSG_DEBUG("NFPGATrackSimRoads_1st = " << roads_1st.size() << ", NFPGATrackSimTracks_1st = " << tracks_1st.size());
575 
576  if (!m_writeOutputData) return StatusCode::SUCCESS;
577  m_logicEventOutputHeader->reserveFPGATrackSimRoads_1st(roads_1st.size());
578  m_logicEventOutputHeader->addFPGATrackSimRoads_1st(roads_1st);
579 
580  m_logicEventOutputHeader->reserveFPGATrackSimTracks_1st(tracks_1st.size());
581  m_logicEventOutputHeader->addFPGATrackSimTracks_1st(tracks_1st);
582 
583  m_logicEventOutputHeader->setDataFlowInfo(*dataFlowInfo);
584  ATH_MSG_DEBUG(m_logicEventOutputHeader->getDataFlowInfo());
585 
586  // It would be nice to rearrange this so both algorithms use one instance of this tool, I think.
587  // Which means that dataprep can't call writeData because that does Fill().
588  ATH_CHECK(m_writeOutputTool->writeData());
589 
590 
591 
592  return StatusCode::SUCCESS;
593 }

Member Data Documentation

◆ m_1st_stage_road_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_road_monitor {this, "FirstStageRoadMonitor", "FPGATrackSimTrackMonitor", "First Stage Road Monitor"}
private

Definition at line 106 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_road_post_filter_1_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_road_post_filter_1_monitor {this, "FirstStageRoadPostFilter1Monitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Filter1 Monitor"}
private

Definition at line 108 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_road_post_filter_2_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_road_post_filter_2_monitor {this, "FirstStageRoadPostFilter2Monitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Filter2 Monitor"}
private

Definition at line 112 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_road_post_OLR_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_road_post_OLR_monitor {this, "FirstStageRoadPostOverlapRemovalMonitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Overlap Removal Monitor"}
private

Definition at line 110 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_track_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_monitor {this, "FirstStageTrackMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Monitor"}
private

Definition at line 115 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_track_post_chi2_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_post_chi2_monitor {this, "FirstStageTrackPostChi2Monitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Chi2 Monitor"}
private

Definition at line 119 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_track_post_OLR_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_post_OLR_monitor {this, "FirstStageTrackPostOverlapRemovalTrackMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Overlap Removal Monitor"}
private

Definition at line 121 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_track_post_setTruth_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_post_setTruth_monitor {this, "FirstStageTrackPostSetTruthMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Set to TruthTracks Monitor"}
private

Definition at line 117 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_chrono

ServiceHandle<IChronoStatSvc> FPGATrackSimLogicalHitsProcessAlg::m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
private

Definition at line 125 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_description

std::string FPGATrackSimLogicalHitsProcessAlg::m_description
private

Definition at line 81 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_detStore
privateinherited

Pointer to StoreGate (detector store by default)

Definition at line 393 of file AthCommonDataStore.h.

◆ m_doGNNPixelSeeding

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doGNNPixelSeeding {this, "DoGNNPixelSeeding", false, "Flag to configure for GNN Pixel Seeding" }
private

Definition at line 138 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doGNNTrack

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doGNNTrack {this, "DoGNNTrack", false, "Run tracking algorithm for GNN" }
private

Definition at line 137 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doHoughRootOutput1st

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doHoughRootOutput1st {this, "DoHoughRootOutput1st", false, "Dump output from the Hough Transform to flat ntuples"}
private

Definition at line 135 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doLRT

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doLRT {this, "doLRT", false, "Enable Large Radius Tracking"}
private

Definition at line 139 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doLRTHitFiltering

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doLRTHitFiltering {this, "LRTHitFiltering", false, "flag to enable hit/cluster filtering for LRT"}
private

Definition at line 140 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doMissingHitsChecks

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
private

Definition at line 132 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doNNTrack

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doNNTrack {this, "DoNNTrack_1st", false, "Run NN track filtering for 1st stage"}
private

Definition at line 136 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doOverlapRemoval

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doOverlapRemoval {this, "doOverlapRemoval", true , "flag to enable the overlap removal"}
private

Definition at line 131 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doSpacepoints

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
private

Definition at line 129 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doTracking

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doTracking {this, "tracking", false, "flag to enable the tracking"}
private

Definition at line 130 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evt

double FPGATrackSimLogicalHitsProcessAlg::m_evt = 0
private

Definition at line 174 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evt_truth

double FPGATrackSimLogicalHitsProcessAlg::m_evt_truth = 0
private

Definition at line 180 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evtSel

ServiceHandle<IFPGATrackSimEventSelectionSvc> FPGATrackSimLogicalHitsProcessAlg::m_evtSel {this, "eventSelector", "", "Event selection Svc"}
private

Definition at line 97 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_evtStore
privateinherited

Pointer to StoreGate (event store by default)

Definition at line 390 of file AthCommonDataStore.h.

◆ m_extendedExtraObjects

DataObjIDColl AthAlgorithm::m_extendedExtraObjects
privateinherited

Definition at line 79 of file AthAlgorithm.h.

◆ m_filterRoads

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
private

Definition at line 133 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_filterRoads2

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
private

Definition at line 134 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAEventInfoKey

SG::ReadHandleKey<FPGATrackSimEventInfo> FPGATrackSimLogicalHitsProcessAlg::m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
private

Definition at line 213 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitFilteredKey

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitFilteredKey {this, "FPGATrackSimHitFiltered1stKey","FPGAHitsFiltered_1st","FPGATrackSim Filtered Hits 1st stage key"}
private

Definition at line 206 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitInRoadsKey

SG::WriteHandleKey<FPGATrackSimHitContainer> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitInRoadsKey {this, "FPGATrackSimHitInRoads1stKey","FPGAHitsInRoads_1st","FPGATrackSim Hits in 1st stage roads key"}
private

Definition at line 207 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey

SG::ReadHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey {this, "FPGATrackSimHitKey","FPGAHits", "FPGATrackSim hits key"}
private

Definition at line 198 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey_1st

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_1st {this, "FPGATrackSimHitKey_1st","FPGAHits_1st","FPGATrackSim 1st stage hits key"}
private

Definition at line 204 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey_2nd

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_2nd {this, "FPGATrackSimHitKey_2nd","FPGAHits_2nd","FPGATrackSim 2nd stage hits key"}
private

Definition at line 205 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAOfflineTrackKey

SG::ReadHandleKey<FPGATrackSimOfflineTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
private

Definition at line 212 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGARoadKey

SG::WriteHandleKey<FPGATrackSimRoadCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGARoadKey {this, "FPGATrackSimRoad1stKey","FPGARoads_1st","FPGATrackSim Roads 1st stage key"}
private

Definition at line 208 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGASpacePointsKey

SG::WriteHandleKey<FPGATrackSimClusterCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGASpacePointsKey {this, "FPGATrackSimSpacePoints1stKey","FPGASpacePoints_1st","FPGATrackSim SpacePoints key"}
private

Definition at line 201 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATrackKey

SG::WriteHandleKey<FPGATrackSimTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackKey {this, "FPGATrackSimTrack1stKey","FPGATracks_1st","FPGATrackSim Tracks 1st stage key"}
private

Definition at line 209 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATrackSimMapping

ServiceHandle<IFPGATrackSimMappingSvc> FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
private

Definition at line 96 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATruthTrackKey

SG::ReadHandleKey<FPGATrackSimTruthTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
private

Definition at line 211 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_houghRootOutputTool

ToolHandle<FPGATrackSimHoughRootOutputTool> FPGATrackSimLogicalHitsProcessAlg::m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
private

Definition at line 91 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_logicEventOutputHeader

FPGATrackSimLogicalEventOutputHeader* FPGATrackSimLogicalHitsProcessAlg::m_logicEventOutputHeader = nullptr
private

Definition at line 167 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_LRTRoadFilterTool

ToolHandle<FPGATrackSimLLPRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFilterTool {this, "LRTRoadFilter", "FPGATrackSimLLPRoadFilterTool/FPGATrackSimLLPRoadFilterTool", "LRT Road Filter Tool"}
private

Definition at line 86 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_LRTRoadFinderTool

ToolHandle<IFPGATrackSimRoadFinderTool> FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFinderTool {this, "LRTRoadFinder", "FPGATrackSimHoughTransform_d0phi0_Tool/FPGATrackSimHoughTransform_d0phi0_Tool", "LRT Road Finder Tool"}
private

Definition at line 87 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNRoadsFound

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNRoadsFound = 0
private

Definition at line 186 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksChi2OLRTot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2OLRTot = 0
private

Definition at line 189 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksChi2Tot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2Tot = 0
private

Definition at line 188 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksTot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksTot = 0
private

Definition at line 187 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_monTool

ToolHandle<GenericMonitoringTool> FPGATrackSimLogicalHitsProcessAlg::m_monTool {this,"MonTool", "", "Monitoring tool"}
private

Definition at line 101 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_NNTrackTool

ToolHandle<FPGATrackSimNNTrackTool> FPGATrackSimLogicalHitsProcessAlg::m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool", "NN Track Tool"}
private

Definition at line 90 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nRoadsFound

long FPGATrackSimLogicalHitsProcessAlg::m_nRoadsFound = 0
private

Definition at line 181 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nRoadsTot

long FPGATrackSimLogicalHitsProcessAlg::m_nRoadsTot = 0
private

Definition at line 175 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2Found

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Found = 0
private

Definition at line 183 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2OLRFound

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRFound = 0
private

Definition at line 184 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2OLRTot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRTot = 0
private

Definition at line 178 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2Tot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Tot = 0
private

Definition at line 177 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksFound

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksFound = 0
private

Definition at line 182 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksTot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksTot = 0
private

Definition at line 176 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_NumOfHitPerGrouping

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
private

Definition at line 144 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_outputBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
private

Definition at line 154 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_outputRoadUnionTool

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_outputRoadUnionTool {this, "outputRoadUnionTool", false, "If set to true, create LogicalEventInputHeader in output ROOT file using road union tool."}
private

Definition at line 147 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_overlapRemovalTool_1st

ToolHandle<FPGATrackSimOverlapRemovalTool> FPGATrackSimLogicalHitsProcessAlg::m_overlapRemovalTool_1st {this, "OverlapRemoval_1st", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_1st", "1st stage overlap removal tool"}
private

Definition at line 93 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_passLowestChi2TrackOnly

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_passLowestChi2TrackOnly {this,"passLowestChi2TrackOnly", false, "case when passing only lowest chi2 track per road"}
private

Definition at line 145 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_region

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_region {this, "Region", 0, "Region ID to assign to tracks"}
private

Definition at line 148 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFilterTool

ToolHandle<IFPGATrackSimRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool {this, "RoadFilter", "FPGATrackSimEtaPatternFilterTool", "Road Filter Tool"}
private

Definition at line 88 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFilterTool2

ToolHandle<IFPGATrackSimRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool2 {this, "RoadFilter2", "FPGATrackSimPhiRoadFilterTool", "Road Filter2 Tool"}
private

Definition at line 89 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFinderTool

ToolHandle<FPGATrackSimRoadUnionTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFinderTool {this, "RoadFinder", "FPGATrackSimPatternMatchTool", "Road Finder Tool"}
private

Definition at line 85 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_secondStageStrips

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_secondStageStrips {this, "secondStageStrips", true, "If set to true, strip hits/SPs go to the second stage. Otherwise they go to the first." }
private

Definition at line 146 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_SetTruthParametersForTracks

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
private

Definition at line 128 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for sliced hits in output ROOT file." }
private

Definition at line 153 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedFirstPixelHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedFirstPixelHeader = nullptr
private

Definition at line 163 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedHitHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedHitHeader = nullptr
private

Definition at line 162 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedSecondPixelHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedSecondPixelHeader = nullptr
private

Definition at line 164 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedStripHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedStripHeader = nullptr
private

Definition at line 165 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedStripHeaderPreSP

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedStripHeaderPreSP = nullptr
private

Definition at line 166 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceFirstPixelBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceFirstPixelBranch {this, "FirstPixelBranchName", "LogicalEventFirstPixelHeader", "Name of the branch for first stage pixel hits in output ROOT file"}
private

Definition at line 155 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceSecondPixelBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceSecondPixelBranch {this, "SecondPixelBranchName", "LogicalEventSecondPixelHeader", "Name of the branch for second stage pixel hits in output ROOT file"}
private

Definition at line 156 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceStripBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranch {this, "StripBranchName", "LogicalEventSpacepointHeader", "Name of the branch for (post-SP) strip hits in output ROOT file"}
private

Definition at line 157 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceStripBranchPreSP

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranchPreSP {this, "StripPreSPBranchName", "LogicalEventStripHeader", "Name of the branch for (pre-SP) strip hits in output ROOT file"}
private

Definition at line 158 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicingEngineTool

ToolHandle<FPGATrackSimSlicingEngineTool> FPGATrackSimLogicalHitsProcessAlg::m_slicingEngineTool {this, "SlicingEngineTool", "FPGATrackSimSlicingEngineTool/FPGATrackSimSlicingEngineTool", "Slicing engine tool"}
private

Definition at line 95 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_spacepoints

std::vector<FPGATrackSimCluster> FPGATrackSimLogicalHitsProcessAlg::m_spacepoints {}
private

Definition at line 171 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_spacepointsTool

ToolHandle<FPGATrackSimSpacePointsToolI> FPGATrackSimLogicalHitsProcessAlg::m_spacepointsTool {this, "SpacePointTool", "FPGATrackSimSpacePointsTool/FPGATrackSimSpacePointsTool", "Space Points Tool"}
private

Definition at line 84 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_trackFitterTool_1st

ToolHandle<FPGATrackSimTrackFitterTool> FPGATrackSimLogicalHitsProcessAlg::m_trackFitterTool_1st {this, "TrackFitter_1st", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_1st", "1st stage track fit tool"}
private

Definition at line 92 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_1st_guessedcheck

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_1st_guessedcheck
private

Definition at line 170 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_1st_nomiss

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_1st_nomiss
private

Definition at line 170 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_2nd_guessedcheck

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_2nd_guessedcheck
private

Definition at line 170 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_2nd_nomiss

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_2nd_nomiss
private

Definition at line 170 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_trackScoreCut

Gaudi::Property<float> FPGATrackSimLogicalHitsProcessAlg::m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
private

Definition at line 142 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< Algorithm > >::m_varHandleArraysDeclared
privateinherited

Definition at line 399 of file AthCommonDataStore.h.

◆ m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< Algorithm > >::m_vhka
privateinherited

Definition at line 398 of file AthCommonDataStore.h.

◆ m_writeInputBranches

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_writeInputBranches {this, "writeInputBranches", true, "If set to false, never write input branches"}
private

Definition at line 149 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeOutNonSPStripHits

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
private

Definition at line 143 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeOutputData

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
private

Definition at line 141 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeOutputTool

ToolHandle<FPGATrackSimOutputHeaderTool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
private

Definition at line 94 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeRegion

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_writeRegion {this,"writeRegion", -1, "Only output selected region, default is -1 which means not requirement"}
private

Definition at line 150 of file FPGATrackSimLogicalHitsProcessAlg.h.

The documentation for this class was generated from the following files:
FPGATrackSimLogicalHitsProcessAlg::m_passLowestChi2TrackOnly
Gaudi::Property< bool > m_passLowestChi2TrackOnly
Definition: FPGATrackSimLogicalHitsProcessAlg.h:145
FPGATrackSimLogicalHitsProcessAlg::m_doSpacepoints
Gaudi::Property< bool > m_doSpacepoints
Definition: FPGATrackSimLogicalHitsProcessAlg.h:129
FPGATrackSimLogicalHitsProcessAlg::m_filterRoads
Gaudi::Property< bool > m_filterRoads
Definition: FPGATrackSimLogicalHitsProcessAlg.h:133
beamspotman.r
def r
Definition: beamspotman.py:672
FPGATrackSimLogicalHitsProcessAlg::m_maxNRoadsFound
unsigned long m_maxNRoadsFound
Definition: FPGATrackSimLogicalHitsProcessAlg.h:186
FPGATrackSimLogicalHitsProcessAlg::m_slicedSecondPixelHeader
FPGATrackSimLogicalEventInputHeader * m_slicedSecondPixelHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:164
FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_post_OLR_monitor
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_post_OLR_monitor
Definition: FPGATrackSimLogicalHitsProcessAlg.h:121
FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_road_post_filter_2_monitor
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_road_post_filter_2_monitor
Definition: FPGATrackSimLogicalHitsProcessAlg.h:112
FPGATrackSimLogicalHitsProcessAlg::m_writeOutputTool
ToolHandle< FPGATrackSimOutputHeaderTool > m_writeOutputTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:94
FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFinderTool
ToolHandle< IFPGATrackSimRoadFinderTool > m_LRTRoadFinderTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:87
FPGATrackSimLogicalHitsProcessAlg::m_doHoughRootOutput1st
Gaudi::Property< bool > m_doHoughRootOutput1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:135
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_2nd
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey_2nd
Definition: FPGATrackSimLogicalHitsProcessAlg.h:205
TRTCalib_Extractor.hits
hits
Definition: TRTCalib_Extractor.py:35
FPGATrackSimLogicalHitsProcessAlg::m_spacepointsTool
ToolHandle< FPGATrackSimSpacePointsToolI > m_spacepointsTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:84
FPGATrackSimLogicalHitsProcessAlg::m_doGNNPixelSeeding
Gaudi::Property< bool > m_doGNNPixelSeeding
Definition: FPGATrackSimLogicalHitsProcessAlg.h:138
FPGATrackSimLogicalHitsProcessAlg::m_description
std::string m_description
Definition: FPGATrackSimLogicalHitsProcessAlg.h:81
PowhegControl_ttHplus_NLO.ss
ss
Definition: PowhegControl_ttHplus_NLO.py:83
FPGATrackSimLogicalHitsProcessAlg::m_logicEventOutputHeader
FPGATrackSimLogicalEventOutputHeader * m_logicEventOutputHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:167
FPGATrackSimLogicalHitsProcessAlg::m_FPGARoadKey
SG::WriteHandleKey< FPGATrackSimRoadCollection > m_FPGARoadKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:208
FPGATrackSimLogicalHitsProcessAlg::m_slicedHitHeader
FPGATrackSimLogicalEventInputHeader * m_slicedHitHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:162
ATH_MSG_INFO
#define ATH_MSG_INFO(x)
Definition: AthMsgStreamMacros.h:31
FPGATrackSimLogicalHitsProcessAlg::m_nTracksTot
long m_nTracksTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:176
FPGATrackSimCluster
Definition: FPGATrackSimCluster.h:24
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitInRoadsKey
SG::WriteHandleKey< FPGATrackSimHitContainer > m_FPGAHitInRoadsKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:207
FPGATrackSimTrack
Definition: FPGATrackSimTrack.h:18
FPGATrackSimLogicalHitsProcessAlg::m_region
Gaudi::Property< int > m_region
Definition: FPGATrackSimLogicalHitsProcessAlg.h:148
SG::ReadHandle
Definition: StoreGate/StoreGate/ReadHandle.h:67
FPGATrackSimLogicalEventOutputHeader::reserveFPGATrackSimRoads_1st
void reserveFPGATrackSimRoads_1st(size_t size)
Definition: FPGATrackSimLogicalEventOutputHeader.h:24
FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFilterTool
ToolHandle< FPGATrackSimLLPRoadFilterTool > m_LRTRoadFilterTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:86
FPGATrackSimLogicalHitsProcessAlg::m_doTracking
Gaudi::Property< bool > m_doTracking
Definition: FPGATrackSimLogicalHitsProcessAlg.h:130
FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_monitor
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_monitor
Definition: FPGATrackSimLogicalHitsProcessAlg.h:115
FPGATrackSimLogicalHitsProcessAlg::m_writeRegion
Gaudi::Property< int > m_writeRegion
Definition: FPGATrackSimLogicalHitsProcessAlg.h:150
FPGATrackSimLogicalHitsProcessAlg::m_writeOutNonSPStripHits
Gaudi::Property< bool > m_writeOutNonSPStripHits
Definition: FPGATrackSimLogicalHitsProcessAlg.h:143
FPGATrackSimLogicalHitsProcessAlg::m_FPGATruthTrackKey
SG::ReadHandleKey< FPGATrackSimTruthTrackCollection > m_FPGATruthTrackKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:211
AthCommonDataStore< AthCommonMsg< Algorithm > >::m_evtStore
StoreGateSvc_t m_evtStore
Pointer to StoreGate (event store by default)
Definition: AthCommonDataStore.h:390
FPGATrackSimLogicalHitsProcessAlg::m_evtSel
ServiceHandle< IFPGATrackSimEventSelectionSvc > m_evtSel
Definition: FPGATrackSimLogicalHitsProcessAlg.h:97
AthCommonDataStore< AthCommonMsg< Algorithm > >::m_vhka
std::vector< SG::VarHandleKeyArray * > m_vhka
Definition: AthCommonDataStore.h:398
FPGATrackSimLogicalEventOutputHeader::reset
void reset()
Definition: FPGATrackSimLogicalEventOutputHeader.cxx:12
FPGATrackSimLogicalHitsProcessAlg::m_writeOutputData
Gaudi::Property< bool > m_writeOutputData
Definition: FPGATrackSimLogicalHitsProcessAlg.h:141
FPGATrackSimLogicalHitsProcessAlg::m_spacepoints
std::vector< FPGATrackSimCluster > m_spacepoints
Definition: FPGATrackSimLogicalHitsProcessAlg.h:171
FPGATrackSimLogicalHitsProcessAlg::m_FPGAEventInfoKey
SG::ReadHandleKey< FPGATrackSimEventInfo > m_FPGAEventInfoKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:213
FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2OLRTot
unsigned long m_maxNTracksChi2OLRTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:189
PrintTrkAnaSummary.l
l
Printing final latex table to .tex output file.
Definition: PrintTrkAnaSummary.py:369
FPGATrackSimLogicalHitsProcessAlg::m_overlapRemovalTool_1st
ToolHandle< FPGATrackSimOverlapRemovalTool > m_overlapRemovalTool_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:93
read_hist_ntuple.t
t
Definition: read_hist_ntuple.py:5
FPGATrackSimLogicalHitsProcessAlg::m_sliceFirstPixelBranch
Gaudi::Property< std::string > m_sliceFirstPixelBranch
Definition: FPGATrackSimLogicalHitsProcessAlg.h:155
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitFilteredKey
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitFilteredKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:206
FPGATrackSimLogicalHitsProcessAlg::m_FPGAOfflineTrackKey
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollection > m_FPGAOfflineTrackKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:212
MuonR4::to_string
std::string to_string(const SectorProjector proj)
Definition: MsTrackSeeder.cxx:66
FPGATrackSimLogicalHitsProcessAlg::m_doNNTrack
Gaudi::Property< bool > m_doNNTrack
Definition: FPGATrackSimLogicalHitsProcessAlg.h:136
FPGATrackSimTrack::setFPGATrackSimHit
void setFPGATrackSimHit(unsigned i, const FPGATrackSimHit &hit)
Definition: FPGATrackSimTrack.cxx:98
FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackKey
SG::WriteHandleKey< FPGATrackSimTrackCollection > m_FPGATrackKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:209
FPGATrackSimLogicalHitsProcessAlg::m_evt_truth
double m_evt_truth
Definition: FPGATrackSimLogicalHitsProcessAlg.h:180
dq_defect_bulk_create_defects.line
line
Definition: dq_defect_bulk_create_defects.py:27
FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksTot
unsigned long m_maxNTracksTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:187
FPGATrackSimLogicalHitsProcessAlg::m_monTool
ToolHandle< GenericMonitoringTool > m_monTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:101
FPGATrackSimLogicalEventOutputHeader::getDataFlowInfo
FPGATrackSimDataFlowInfo const & getDataFlowInfo() const
Definition: FPGATrackSimLogicalEventOutputHeader.h:47
AthenaPoolTestRead.sc
sc
Definition: AthenaPoolTestRead.py:27
SG::VarHandleKeyArray::setOwner
virtual void setOwner(IDataHandleHolder *o)=0
FPGATrackSimHit
Definition: FPGATrackSimHit.h:42
FPGATrackSimLogicalHitsProcessAlg::m_evt
double m_evt
Definition: FPGATrackSimLogicalHitsProcessAlg.h:174
IDTPMcnv.htype
htype
Definition: IDTPMcnv.py:29
FPGATrackSimLogicalHitsProcessAlg::m_trackScoreCut
Gaudi::Property< float > m_trackScoreCut
Definition: FPGATrackSimLogicalHitsProcessAlg.h:142
FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_post_chi2_monitor
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_post_chi2_monitor
Definition: FPGATrackSimLogicalHitsProcessAlg.h:119
FPGATrackSimLogicalHitsProcessAlg::m_doLRTHitFiltering
Gaudi::Property< bool > m_doLRTHitFiltering
Definition: FPGATrackSimLogicalHitsProcessAlg.h:140
FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool2
ToolHandle< IFPGATrackSimRoadFilterTool > m_roadFilterTool2
Definition: FPGATrackSimLogicalHitsProcessAlg.h:89
AthCommonDataStore::declareGaudiProperty
Gaudi::Details::PropertyBase & declareGaudiProperty(Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
specialization for handling Gaudi::Property<SG::VarHandleKey>
Definition: AthCommonDataStore.h:156
Hit
Definition: Simulation/ISF/ISF_FastCaloSim/ISF_FastCaloGpu/ISF_FastCaloGpu/Hit.h:16
FPGATrackSimEventInfo
Definition: FPGATrackSimEventInfo.h:14
python.utils.AtlRunQueryDQUtils.p
p
Definition: AtlRunQueryDQUtils.py:209
AthCommonDataStore
Definition: AthCommonDataStore.h:52
AthAlgorithm::sysInitialize
virtual StatusCode sysInitialize() override
Override sysInitialize.
Definition: AthAlgorithm.cxx:66
ATH_MSG_ERROR
#define ATH_MSG_ERROR(x)
Definition: AthMsgStreamMacros.h:33
FPGATrackSimLogicalEventOutputHeader::reserveFPGATrackSimTracks_1st
void reserveFPGATrackSimTracks_1st(size_t size)
Definition: FPGATrackSimLogicalEventOutputHeader.h:37
AthCommonDataStore< AthCommonMsg< Algorithm > >::outputHandles
virtual std::vector< Gaudi::DataHandle * > outputHandles() const override
Return this algorithm's output handles.
FPGATrackSimLogicalHitsProcessAlg::m_roadFinderTool
ToolHandle< FPGATrackSimRoadUnionTool > m_roadFinderTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:85
roadsToTrack
void roadsToTrack(std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads, std::vector< FPGATrackSimTrack > &track_cands, const FPGATrackSimPlaneMap *pmap)
Definition: FPGATrackSimHoughFunctions.cxx:674
FPGATrackSimLogicalHitsProcessAlg::m_SetTruthParametersForTracks
Gaudi::Property< int > m_SetTruthParametersForTracks
Definition: FPGATrackSimLogicalHitsProcessAlg.h:128
EL::StatusCode
::StatusCode StatusCode
StatusCode definition for legacy code.
Definition: PhysicsAnalysis/D3PDTools/EventLoop/EventLoop/StatusCode.h:22
FPGATrackSimLogicalEventOutputHeader::addFPGATrackSimRoads_1st
void addFPGATrackSimRoads_1st(const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads_1st)
Definition: FPGATrackSimLogicalEventOutputHeader.h:25
ATH_MSG_DEBUG
#define ATH_MSG_DEBUG(x)
Definition: AthMsgStreamMacros.h:29
AthCommonDataStore::declareProperty
Gaudi::Details::PropertyBase & declareProperty(Gaudi::Property< T, V, H > &t)
Definition: AthCommonDataStore.h:145
TRT::Hit::layer
@ layer
Definition: HitInfo.h:79
FPGATrackSimLogicalHitsProcessAlg::m_doOverlapRemoval
Gaudi::Property< bool > m_doOverlapRemoval
Definition: FPGATrackSimLogicalHitsProcessAlg.h:131
Amg::transform
Amg::Vector3D transform(Amg::Vector3D &v, Amg::Transform3D &tr)
Transform a point from a Trasformation3D.
Definition: GeoPrimitivesHelpers.h:156
FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranchPreSP
Gaudi::Property< std::string > m_sliceStripBranchPreSP
Definition: FPGATrackSimLogicalHitsProcessAlg.h:158
ATH_CHECK
#define ATH_CHECK
Definition: AthCheckMacros.h:40
FPGATrackSimLogicalHitsProcessAlg::m_writeInputBranches
Gaudi::Property< bool > m_writeInputBranches
Definition: FPGATrackSimLogicalHitsProcessAlg.h:149
FPGATrackSimLogicalHitsProcessAlg::m_outputRoadUnionTool
Gaudi::Property< bool > m_outputRoadUnionTool
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