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FPGATrackSimLogicalHitsProcessAlg Class Reference

#include <FPGATrackSimLogicalHitsProcessAlg.h>

Inheritance diagram for FPGATrackSimLogicalHitsProcessAlg:
Collaboration diagram for FPGATrackSimLogicalHitsProcessAlg:

Public Member Functions

 FPGATrackSimLogicalHitsProcessAlg (const std::string &name, ISvcLocator *pSvcLocator)
 
virtual ~FPGATrackSimLogicalHitsProcessAlg ()=default
 
virtual StatusCode initialize () override
 
virtual StatusCode execute () override
 
virtual StatusCode finalize () override
 
virtual StatusCode sysInitialize () override
 Override sysInitialize. More...
 
virtual const DataObjIDColl & extraOutputDeps () const override
 Return the list of extra output dependencies. More...
 
ServiceHandle< StoreGateSvc > & evtStore ()
 The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc. More...
 
const ServiceHandle< StoreGateSvc > & evtStore () const
 The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc. More...
 
const ServiceHandle< StoreGateSvc > & detStore () const
 The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc. More...
 
virtual StatusCode sysStart () override
 Handle START transition. More...
 
virtual std::vector< Gaudi::DataHandle * > inputHandles () const override
 Return this algorithm's input handles. More...
 
virtual std::vector< Gaudi::DataHandle * > outputHandles () const override
 Return this algorithm's output handles. More...
 
Gaudi::Details::PropertyBase & declareProperty (Gaudi::Property< T, V, H > &t)
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, SG::VarHandleKey &hndl, const std::string &doc, const SG::VarHandleKeyType &)
 Declare a new Gaudi property. More...
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, SG::VarHandleBase &hndl, const std::string &doc, const SG::VarHandleType &)
 Declare a new Gaudi property. More...
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, SG::VarHandleKeyArray &hndArr, const std::string &doc, const SG::VarHandleKeyArrayType &)
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, T &property, const std::string &doc, const SG::NotHandleType &)
 Declare a new Gaudi property. More...
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, T &property, const std::string &doc="none")
 Declare a new Gaudi property. More...
 
void updateVHKA (Gaudi::Details::PropertyBase &)
 
MsgStream & msg () const
 
MsgStream & msg (const MSG::Level lvl) const
 
bool msgLvl (const MSG::Level lvl) const
 

Protected Member Functions

void renounceArray (SG::VarHandleKeyArray &handlesArray)
 remove all handles from I/O resolution More...
 
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > renounce (T &h)
 
void extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
 Add StoreName to extra input/output deps as needed. More...
 

Private Types

typedef ServiceHandle< StoreGateSvc > StoreGateSvc_t
 

Private Member Functions

StatusCode writeOutputData (const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads_1st, std::vector< FPGATrackSimTrack > const &tracks_1st, FPGATrackSimDataFlowInfo const *dataFlowInfo)
 
void printHitSubregions (std::vector< FPGATrackSimHit > const &hits)
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
 specialization for handling Gaudi::Property<SG::VarHandleKey> More...
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyArrayType &)
 specialization for handling Gaudi::Property<SG::VarHandleKeyArray> More...
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleType &)
 specialization for handling Gaudi::Property<SG::VarHandleBase> More...
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &t, const SG::NotHandleType &)
 specialization for handling everything that's not a Gaudi::Property<SG::VarHandleKey> or a <SG::VarHandleKeyArray> More...
 

Private Attributes

std::string m_description
 
ToolHandle< FPGATrackSimSpacePointsToolI > m_spacepointsTool {this, "SpacePointTool", "FPGATrackSimSpacePointsTool/FPGATrackSimSpacePointsTool", "Space Points Tool"}
 
ToolHandle< FPGATrackSimRoadUnionTool > m_roadFinderTool {this, "RoadFinder", "FPGATrackSimPatternMatchTool", "Road Finder Tool"}
 
ToolHandle< FPGATrackSimLLPRoadFilterTool > m_LRTRoadFilterTool {this, "LRTRoadFilter", "FPGATrackSimLLPRoadFilterTool/FPGATrackSimLLPRoadFilterTool", "LRT Road Filter Tool"}
 
ToolHandle< IFPGATrackSimRoadFinderTool > m_LRTRoadFinderTool {this, "LRTRoadFinder", "FPGATrackSimHoughTransform_d0phi0_Tool/FPGATrackSimHoughTransform_d0phi0_Tool", "LRT Road Finder Tool"}
 
ToolHandle< IFPGATrackSimRoadFilterTool > m_roadFilterTool {this, "RoadFilter", "FPGATrackSimEtaPatternFilterTool", "Road Filter Tool"}
 
ToolHandle< IFPGATrackSimRoadFilterTool > m_roadFilterTool2 {this, "RoadFilter2", "FPGATrackSimPhiRoadFilterTool", "Road Filter2 Tool"}
 
ToolHandle< FPGATrackSimNNTrackTool > m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool", "NN Track Tool"}
 
ToolHandle< FPGATrackSimHoughRootOutputTool > m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
 
ToolHandle< FPGATrackSimTrackFitterTool > m_trackFitterTool_1st {this, "TrackFitter_1st", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_1st", "1st stage track fit tool"}
 
ToolHandle< FPGATrackSimOverlapRemovalTool > m_overlapRemovalTool_1st {this, "OverlapRemoval_1st", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_1st", "1st stage overlap removal tool"}
 
ToolHandle< FPGATrackSimOutputHeaderTool > m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
 
ToolHandle< FPGATrackSimSlicingEngineTool > m_slicingEngineTool {this, "SlicingEngineTool", "FPGATrackSimSlicingEngineTool/FPGATrackSimSlicingEngineTool", "Slicing engine tool"}
 
ServiceHandle< IFPGATrackSimMappingSvc > m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
 
ServiceHandle< IFPGATrackSimEventSelectionSvc > m_evtSel {this, "eventSelector", "", "Event selection Svc"}
 
ToolHandle< GenericMonitoringTool > m_monTool {this,"MonTool", "", "Monitoring tool"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_road_monitor {this, "FirstStageRoadMonitor", "FPGATrackSimTrackMonitor", "First Stage Road Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_road_post_filter_1_monitor {this, "FirstStageRoadPostFilter1Monitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Filter1 Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_road_post_OLR_monitor {this, "FirstStageRoadPostOverlapRemovalMonitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Overlap Removal Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_road_post_filter_2_monitor {this, "FirstStageRoadPostFilter2Monitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Filter2 Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_monitor {this, "FirstStageTrackMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_post_setTruth_monitor {this, "FirstStageTrackPostSetTruthMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Set to TruthTracks Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_post_chi2_monitor {this, "FirstStageTrackPostChi2Monitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Chi2 Monitor"}
 
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_post_OLR_monitor {this, "FirstStageTrackPostOverlapRemovalTrackMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Overlap Removal Monitor"}
 
ServiceHandle< IChronoStatSvc > m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
 
Gaudi::Property< int > m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
 
Gaudi::Property< bool > m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
 
Gaudi::Property< bool > m_doTracking {this, "tracking", false, "flag to enable the tracking"}
 
Gaudi::Property< bool > m_doOverlapRemoval {this, "doOverlapRemoval", true , "flag to enable the overlap removal"}
 
Gaudi::Property< bool > m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
 
Gaudi::Property< bool > m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
 
Gaudi::Property< bool > m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
 
Gaudi::Property< bool > m_doHoughRootOutput1st {this, "DoHoughRootOutput1st", false, "Dump output from the Hough Transform to flat ntuples"}
 
Gaudi::Property< bool > m_doNNTrack {this, "DoNNTrack_1st", false, "Run NN track filtering for 1st stage"}
 
Gaudi::Property< bool > m_doGNNTrack {this, "DoGNNTrack", false, "Run tracking algorithm for GNN" }
 
Gaudi::Property< bool > m_doGNNPixelSeeding {this, "DoGNNPixelSeeding", false, "Flag to configure for GNN Pixel Seeding" }
 
Gaudi::Property< bool > m_doLRT {this, "doLRT", false, "Enable Large Radius Tracking"}
 
Gaudi::Property< bool > m_doLRTHitFiltering {this, "LRTHitFiltering", false, "flag to enable hit/cluster filtering for LRT"}
 
Gaudi::Property< bool > m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
 
Gaudi::Property< float > m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
 
Gaudi::Property< bool > m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
 
Gaudi::Property< int > m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
 
Gaudi::Property< bool > m_passLowestChi2TrackOnly {this,"passLowestChi2TrackOnly", false, "case when passing only lowest chi2 track per road"}
 
Gaudi::Property< bool > m_secondStageStrips {this, "secondStageStrips", true, "If set to true, strip hits/SPs go to the second stage. Otherwise they go to the first." }
 
Gaudi::Property< bool > m_outputRoadUnionTool {this, "outputRoadUnionTool", false, "If set to true, create LogicalEventInputHeader in output ROOT file using road union tool."}
 
Gaudi::Property< int > m_region {this, "Region", 0, "Region ID to assign to tracks"}
 
Gaudi::Property< bool > m_writeInputBranches {this, "writeInputBranches", true, "If set to false, never write input branches"}
 
Gaudi::Property< std::string > m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for sliced hits in output ROOT file." }
 
Gaudi::Property< std::string > m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
 
Gaudi::Property< std::string > m_sliceFirstPixelBranch {this, "FirstPixelBranchName", "LogicalEventFirstPixelHeader", "Name of the branch for first stage pixel hits in output ROOT file"}
 
Gaudi::Property< std::string > m_sliceSecondPixelBranch {this, "SecondPixelBranchName", "LogicalEventSecondPixelHeader", "Name of the branch for second stage pixel hits in output ROOT file"}
 
Gaudi::Property< std::string > m_sliceStripBranch {this, "StripBranchName", "LogicalEventSpacepointHeader", "Name of the branch for (post-SP) strip hits in output ROOT file"}
 
Gaudi::Property< std::string > m_sliceStripBranchPreSP {this, "StripPreSPBranchName", "LogicalEventStripHeader", "Name of the branch for (pre-SP) strip hits in output ROOT file"}
 
FPGATrackSimLogicalEventInputHeader * m_slicedHitHeader = nullptr
 
FPGATrackSimLogicalEventInputHeader * m_slicedFirstPixelHeader = nullptr
 
FPGATrackSimLogicalEventInputHeader * m_slicedSecondPixelHeader = nullptr
 
FPGATrackSimLogicalEventInputHeader * m_slicedStripHeader = nullptr
 
FPGATrackSimLogicalEventInputHeader * m_slicedStripHeaderPreSP = nullptr
 
FPGATrackSimLogicalEventOutputHeader * m_logicEventOutputHeader = nullptr
 
std::vector< FPGATrackSimTrack > m_tracks_1st_guessedcheck
 
std::vector< FPGATrackSimTrack > m_tracks_1st_nomiss
 
std::vector< FPGATrackSimTrack > m_tracks_2nd_guessedcheck
 
std::vector< FPGATrackSimTrack > m_tracks_2nd_nomiss
 
std::vector< FPGATrackSimCluster > m_spacepoints {}
 
double m_evt = 0
 
long m_nRoadsTot = 0
 
long m_nTracksTot = 0
 
long m_nTracksChi2Tot = 0
 
long m_nTracksChi2OLRTot = 0
 
double m_evt_truth = 0
 
long m_nRoadsFound = 0
 
long m_nTracksFound = 0
 
long m_nTracksChi2Found = 0
 
long m_nTracksChi2OLRFound = 0
 
unsigned long m_maxNRoadsFound = 0
 
unsigned long m_maxNTracksTot = 0
 
unsigned long m_maxNTracksChi2Tot = 0
 
unsigned long m_maxNTracksChi2OLRTot = 0
 
SG::ReadHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey {this, "FPGATrackSimHitKey","FPGAHits", "FPGATrackSim hits key"}
 
SG::WriteHandleKey< FPGATrackSimClusterCollection > m_FPGASpacePointsKey {this, "FPGATrackSimSpacePoints1stKey","FPGASpacePoints_1st","FPGATrackSim SpacePoints key"}
 
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey_1st {this, "FPGATrackSimHitKey_1st","FPGAHits_1st","FPGATrackSim 1st stage hits key"}
 
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey_2nd {this, "FPGATrackSimHitKey_2nd","FPGAHits_2nd","FPGATrackSim 2nd stage hits key"}
 
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitFilteredKey {this, "FPGATrackSimHitFiltered1stKey","FPGAHitsFiltered_1st","FPGATrackSim Filtered Hits 1st stage key"}
 
SG::WriteHandleKey< FPGATrackSimHitContainer > m_FPGAHitInRoadsKey {this, "FPGATrackSimHitInRoads1stKey","FPGAHitsInRoads_1st","FPGATrackSim Hits in 1st stage roads key"}
 
SG::WriteHandleKey< FPGATrackSimRoadCollection > m_FPGARoadKey {this, "FPGATrackSimRoad1stKey","FPGARoads_1st","FPGATrackSim Roads 1st stage key"}
 
SG::WriteHandleKey< FPGATrackSimTrackCollection > m_FPGATrackKey {this, "FPGATrackSimTrack1stKey","FPGATracks_1st","FPGATrackSim Tracks 1st stage key"}
 
SG::ReadHandleKey< FPGATrackSimTruthTrackCollection > m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
 
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollection > m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
 
SG::ReadHandleKey< FPGATrackSimEventInfo > m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
 
DataObjIDColl m_extendedExtraObjects
 
StoreGateSvc_t m_evtStore
 Pointer to StoreGate (event store by default) More...
 
StoreGateSvc_t m_detStore
 Pointer to StoreGate (detector store by default) More...
 
std::vector< SG::VarHandleKeyArray * > m_vhka
 
bool m_varHandleArraysDeclared
 

Detailed Description

Definition at line 69 of file FPGATrackSimLogicalHitsProcessAlg.h.

Member Typedef Documentation

◆ StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< Algorithm > >::StoreGateSvc_t
privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

◆ FPGATrackSimLogicalHitsProcessAlg()

FPGATrackSimLogicalHitsProcessAlg::FPGATrackSimLogicalHitsProcessAlg ( const std::string &  name,
ISvcLocator *  pSvcLocator 
)

Definition at line 42 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

42  :
43  AthAlgorithm(name, pSvcLocator)
44 {
45 }

◆ ~FPGATrackSimLogicalHitsProcessAlg()

virtual FPGATrackSimLogicalHitsProcessAlg::~FPGATrackSimLogicalHitsProcessAlg ( )
virtualdefault

Member Function Documentation

◆ declareGaudiProperty() [1/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  hndl,
const SG::VarHandleKeyArrayType &   
)
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKeyArray>

Definition at line 170 of file AthCommonDataStore.h.

172  {
173  return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
174  hndl.value(),
175  hndl.documentation());
176 
177  }

◆ declareGaudiProperty() [2/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  hndl,
const SG::VarHandleKeyType &   
)
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

158  {
159  return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
160  hndl.value(),
161  hndl.documentation());
162 
163  }

◆ declareGaudiProperty() [3/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  hndl,
const SG::VarHandleType &   
)
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleBase>

Definition at line 184 of file AthCommonDataStore.h.

186  {
187  return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
188  hndl.value(),
189  hndl.documentation());
190  }

◆ declareGaudiProperty() [4/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  t,
const SG::NotHandleType &   
)
inlineprivateinherited

specialization for handling everything that's not a Gaudi::Property<SG::VarHandleKey> or a <SG::VarHandleKeyArray>

Definition at line 199 of file AthCommonDataStore.h.

200  {
201  return PBASE::declareProperty(t);
202  }

◆ declareProperty() [1/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
SG::VarHandleBase &  hndl,
const std::string &  doc,
const SG::VarHandleType &   
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
hndlObject holding the property value.
docDocumentation string for the property.

This is the version for types that derive from SG::VarHandleBase. The property value object is put on the input and output lists as appropriate; then we forward to the base class.

Definition at line 245 of file AthCommonDataStore.h.

249  {
250  this->declare(hndl.vhKey());
251  hndl.vhKey().setOwner(this);
252 
253  return PBASE::declareProperty(name,hndl,doc);
254  }

◆ declareProperty() [2/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
SG::VarHandleKey &  hndl,
const std::string &  doc,
const SG::VarHandleKeyType &   
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
hndlObject holding the property value.
docDocumentation string for the property.

This is the version for types that derive from SG::VarHandleKey. The property value object is put on the input and output lists as appropriate; then we forward to the base class.

Definition at line 221 of file AthCommonDataStore.h.

225  {
226  this->declare(hndl);
227  hndl.setOwner(this);
228 
229  return PBASE::declareProperty(name,hndl,doc);
230  }

◆ declareProperty() [3/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
SG::VarHandleKeyArray &  hndArr,
const std::string &  doc,
const SG::VarHandleKeyArrayType &   
)
inlineinherited

Definition at line 259 of file AthCommonDataStore.h.

263  {
264 
265  // std::ostringstream ost;
266  // ost << Algorithm::name() << " VHKA declareProp: " << name
267  // << " size: " << hndArr.keys().size()
268  // << " mode: " << hndArr.mode()
269  // << " vhka size: " << m_vhka.size()
270  // << "\n";
271  // debug() << ost.str() << endmsg;
272 
273  hndArr.setOwner(this);
274  m_vhka.push_back(&hndArr);
275 
276  Gaudi::Details::PropertyBase* p = PBASE::declareProperty(name, hndArr, doc);
277  if (p != 0) {
278  p->declareUpdateHandler(&AthCommonDataStore<PBASE>::updateVHKA, this);
279  } else {
280  ATH_MSG_ERROR("unable to call declareProperty on VarHandleKeyArray "
281  << name);
282  }
283 
284  return p;
285 
286  }

◆ declareProperty() [4/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
T &  property,
const std::string &  doc,
const SG::NotHandleType &   
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
propertyObject holding the property value.
docDocumentation string for the property.

This is the generic version, for types that do not derive from SG::VarHandleKey. It just forwards to the base class version of declareProperty.

Definition at line 333 of file AthCommonDataStore.h.

337  {
338  return PBASE::declareProperty(name, property, doc);
339  }

◆ declareProperty() [5/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
T &  property,
const std::string &  doc = "none" 
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
propertyObject holding the property value.
docDocumentation string for the property.

This dispatches to either the generic declareProperty or the one for VarHandle/Key/KeyArray.

Definition at line 352 of file AthCommonDataStore.h.

355  {
356  typedef typename SG::HandleClassifier<T>::type htype;
357  return declareProperty (name, property, doc, htype());
358  }

◆ declareProperty() [6/6]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( Gaudi::Property< T, V, H > &  t)
inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

145  {
146  typedef typename SG::HandleClassifier<T>::type htype;
147  return AthCommonDataStore<PBASE>::declareGaudiProperty(t, htype());
148  }

◆ detStore()

const ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::detStore ( ) const
inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

95 { return m_detStore; }

◆ evtStore() [1/2]

ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::evtStore ( )
inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

85 { return m_evtStore; }

◆ evtStore() [2/2]

const ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::evtStore ( ) const
inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 90 of file AthCommonDataStore.h.

90 { return m_evtStore; }

◆ execute()

StatusCode FPGATrackSimLogicalHitsProcessAlg::execute ( )
overridevirtual

(first track monitor, after getting tracks) create a vector of references from a vector of instances

(second track monitor, after set track parameters to truth) create a vector of references from a vector of instances

Definition at line 138 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

139 {
140  const EventContext& ctx = getContext();
141 
142  // Get reference to hits from StoreGate.
143  SG::ReadHandle<FPGATrackSimHitCollection> FPGAHits(m_FPGAHitKey, ctx);
144  if (!FPGAHits.isValid()) {
145  if (m_evt == 0) {
146  ATH_MSG_WARNING("Didn't receive " << FPGAHits.key() << " on first event; assuming no input events.");
147  }
148  SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
149  if (!appMgr) {
150  ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
151  return StatusCode::FAILURE;
152  }
153  return appMgr->stopRun();
154  }
155 
156  // Set up write handles.
157  SG::WriteHandle<FPGATrackSimHitCollection> FPGAHits_1st (m_FPGAHitKey_1st,ctx);
158  SG::WriteHandle<FPGATrackSimHitCollection> FPGAHits_2nd (m_FPGAHitKey_2nd,ctx);
159  SG::WriteHandle<FPGATrackSimRoadCollection> FPGARoads_1st (m_FPGARoadKey, ctx);
160  SG::WriteHandle<FPGATrackSimHitContainer> FPGAHitsInRoads_1st (m_FPGAHitInRoadsKey, ctx);
161 
162  ATH_CHECK( FPGAHits_1st.record (std::make_unique<FPGATrackSimHitCollection>()));
163  ATH_CHECK( FPGAHits_2nd.record (std::make_unique<FPGATrackSimHitCollection>()));
164  ATH_CHECK( FPGARoads_1st.record (std::make_unique<FPGATrackSimRoadCollection>()));
165  ATH_CHECK( FPGAHitsInRoads_1st.record (std::make_unique<FPGATrackSimHitContainer>()));
166 
167  SG::WriteHandle<FPGATrackSimTrackCollection> FPGATracks_1stHandle (m_FPGATrackKey, ctx);
168  ATH_CHECK(FPGATracks_1stHandle.record (std::make_unique<FPGATrackSimTrackCollection>()));
169 
170  SG::WriteHandle<FPGATrackSimHitCollection> FPGAHitsFiltered_1st (m_FPGAHitFilteredKey, ctx);
171  ATH_CHECK( FPGAHitsFiltered_1st.record (std::make_unique<FPGATrackSimHitCollection>()));
172 
173  SG::WriteHandle<FPGATrackSimClusterCollection> FPGASpacePoints (m_FPGASpacePointsKey, ctx);
174  ATH_CHECK( FPGASpacePoints.record (std::make_unique<FPGATrackSimClusterCollection>()));
175 
176  // Query the event selection service to make sure this event passed cuts.
177  if (!m_evtSel->getSelectedEvent()) {
178 
179  // Potentially write the output data, now it's empty and reset, but this keeps things synchronized over trees
180  if (m_writeOutputData) {
181  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roads_1st;
182  std::vector<FPGATrackSimTrack> tracks_1st;
183  auto dataFlowInfo = std::make_unique<FPGATrackSimDataFlowInfo>();
184  ATH_CHECK(writeOutputData(roads_1st, tracks_1st, dataFlowInfo.get()));
185  }
186 
187  return StatusCode::SUCCESS;
188  }
189  ATH_MSG_INFO("Event accepted by: " << m_evtSel->name());
190 
191  // Event passes cuts, count it. technically, DataPrep does this now.
192  m_evt++;
193 
194  // Read event info structure. all we need this for is to propagate to our event info structures.
195  SG::ReadHandle<FPGATrackSimEventInfo> FPGAEventInfo(m_FPGAEventInfoKey, ctx);
196  if (!FPGAEventInfo.isValid()) {
197  ATH_MSG_ERROR("Could not find FPGA Event Info with key " << FPGAEventInfo.key());
198  return StatusCode::FAILURE;
199  }
200  FPGATrackSimEventInfo eventInfo = *FPGAEventInfo.cptr();
201  m_slicedFirstPixelHeader->newEvent(eventInfo);
202  m_slicedSecondPixelHeader->newEvent(eventInfo);
203  m_slicedStripHeader->newEvent(eventInfo);
204  m_slicedStripHeaderPreSP->newEvent(eventInfo);
205 
206  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: Split hits to 1st and 2nd stage");
207 
208  std::vector<std::shared_ptr<const FPGATrackSimHit>> phits_output, phits_all, phits_1st, phits_2nd;
209  phits_1st.reserve(FPGAHits->size());
210  phits_2nd.reserve(FPGAHits->size());
211  ATH_MSG_DEBUG("Incoming Hits: " << FPGAHits->size());
212  for (const FPGATrackSimHit& hit : *(FPGAHits.cptr())) {
213  phits_all.emplace_back(&hit, [](const FPGATrackSimHit*){});
214  }
215 
216  // Use the slicing engine tool to do the stage-based separation. Does not use the pmap.
217  m_slicingEngineTool->sliceHits(phits_all, phits_1st, phits_2nd);
218  // record 1st stage hits in SG
219  for (auto& hit : phits_1st) {
220  FPGAHits_1st->push_back(*hit);
221  }
222 
223  if(m_writeOutputData) *m_slicedStripHeaderPreSP = *m_slicedStripHeader;
224 
225  // The slicing engine puts strip hits into a logical event input header. That header now needs to go
226  // to the spacepoint tool if it's turned on. Those hits then get added to phits_1st or phits_2nd as appropriate.
227  if (m_doSpacepoints) {
228  m_spacepoints.clear();
229  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: SP fornmation");
230  ATH_CHECK(m_spacepointsTool->DoSpacePoints(*m_slicedStripHeader, m_spacepoints));
231  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: SP fornmation");
232  for (const FPGATrackSimCluster& cluster : m_spacepoints) FPGASpacePoints->push_back(cluster);
233  }
234 
235  // Use a property to control whether the strips/SPs go to 1st or second stage.
236  for (const FPGATrackSimHit& hit : m_slicedStripHeader->towers().at(0).hits()) {
237  (m_secondStageStrips ? phits_2nd : phits_1st).emplace_back(&hit, [](const FPGATrackSimHit*){});
238  }
239  for (auto& hit : phits_2nd) {
240  FPGAHits_2nd->push_back(*hit);
241  }
242 
243  // Add all hits including SPs to this for the HoughRootOutputTool
244  for (const FPGATrackSimHit& hit : *(FPGAHits_2nd.cptr())) {
245  phits_output.emplace_back(&hit, [](const FPGATrackSimHit*){});
246  }
247 
248  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: Split hits to 1st and 2nd stage");
249  ATH_MSG_DEBUG("1st stage hits: " << phits_1st.size() << " 2nd stage hits: " << phits_2nd.size() );
250  if (phits_1st.empty()) return StatusCode::SUCCESS;
251  // Get truth tracks from DataPrep as well.
252  SG::ReadHandle<FPGATrackSimTruthTrackCollection> FPGATruthTracks(m_FPGATruthTrackKey, ctx);
253  if (!FPGATruthTracks.isValid()) {
254  ATH_MSG_ERROR("Could not find FPGA Truth Track Collection with key " << FPGATruthTracks.key());
255  return StatusCode::FAILURE;
256  }
257 
258  // Same for offline tracks.
259  SG::ReadHandle<FPGATrackSimOfflineTrackCollection> FPGAOfflineTracks(m_FPGAOfflineTrackKey, ctx);
260  if (!FPGAOfflineTracks.isValid()) {
261  ATH_MSG_ERROR("Could not find FPGA Offline Track Collection with key " << FPGAOfflineTracks.key());
262  return StatusCode::FAILURE;
263  }
264 
265 
267  // roads //
269 
271  const std::vector<FPGATrackSimTruthTrack>& truthtracks = *FPGATruthTracks;
273  auto nLogicalLayers = m_FPGATrackSimMapping->PlaneMap_1st(0)->getNLogiLayers();
276  auto monitorRoads = [&](auto& monitor, const auto& roads) {
277  if (!monitor.empty()) {
278  monitor->fillRoad(roads, truthtracks, nLogicalLayers);
279  }
280  };
281 
282 
283  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: GetRoads");
284  // get roads
285  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roads_1st;
286  ATH_CHECK(m_roadFinderTool->getRoads(phits_1st, roads_1st, *(FPGATruthTracks.cptr())));
287  monitorRoads(m_1st_stage_road_monitor, roads_1st);
288  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: GetRoads");
289 
290 
291 
292  // Standard road Filter
293  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: RoadFiltering");
294  std::vector<std::shared_ptr<const FPGATrackSimRoad>> postfilter_roads;
295  if (m_filterRoads) {
296  ATH_CHECK(m_roadFilterTool->filterRoads(roads_1st, postfilter_roads));
297  roads_1st = std::move(postfilter_roads);
298  }
300  monitorRoads(m_1st_stage_road_post_filter_1_monitor, roads_1st);
301  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: RoadFiltering");
302 
303 
304  // overlap removal
305  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: OverlapRemoval");
306  if (m_doOverlapRemoval) ATH_CHECK(m_overlapRemovalTool_1st->runOverlapRemoval(roads_1st));
308  monitorRoads(m_1st_stage_road_post_OLR_monitor, roads_1st);
309  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: OverlapRemoval");
310 
311 
312  // Road Filter2
313  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: RoadFiltering2");
314  std::vector<std::shared_ptr<const FPGATrackSimRoad>> postfilter2_roads;
315  if (m_filterRoads2) {
316  ATH_CHECK(m_roadFilterTool2->filterRoads(roads_1st, postfilter2_roads));
317  roads_1st = std::move(postfilter2_roads);
318  }
320  monitorRoads(m_1st_stage_road_post_filter_2_monitor, roads_1st);
321  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: RoadFiltering2");
322 
323 
325  // tracks //
327 
329  auto monitorTracks = [&](auto& monitor, const auto& tracks) {
330  if (monitor.empty()) return;
331  // prepare vector<const FPGATrackSimTrack*> regardless of input type
332  std::vector<const FPGATrackSimTrack*> track_ptrs;
333  track_ptrs.reserve(tracks.size());
334  // transform tracks into a vector of pointers
335  if constexpr (std::is_pointer_v<typename std::decay_t<decltype(tracks)>::value_type>) {
336  // tracks is std::vector<const FPGATrackSimTrack*>
337  track_ptrs.insert(track_ptrs.end(), tracks.begin(), tracks.end());
338  } else {
339  // tracks is std::vector<FPGATrackSimTrack>
340  std::transform(tracks.begin(), tracks.end(), std::back_inserter(track_ptrs), [](const auto& t) { return &t; });
341  }
342  // monitor using track pointers
343  monitor->fillTrack(track_ptrs, truthtracks, 1.e15);
344  };
345 
346  // Get tracks
347  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: Getting Tracks");
348  std::vector<FPGATrackSimTrack> tracks_1st;
349  if (m_doTracking) {
350  if (m_doNNTrack) {
351  ATH_MSG_DEBUG("Performing NN tracking");
352  ATH_CHECK(m_NNTrackTool->getTracks_1st(roads_1st, tracks_1st));
353  if (m_doGNNTrack) {
354  ATH_MSG_DEBUG("Performing track parameter estimation");
355  ATH_CHECK(m_NNTrackTool->setTrackParameters(tracks_1st,true,m_evtSel->getMin(), m_evtSel->getMax()));
356  }
357  } else {
358  ATH_MSG_DEBUG("Performing Linear tracking");
359  if (m_passLowestChi2TrackOnly) { // Pass only the lowest chi2 track per road
360  // Loop over roads and keep only the best track for each road
361  for (const auto& road : roads_1st) {
362  std::vector<FPGATrackSimTrack> tracksForCurrentRoad;
363 
364  // Collect tracks for this road
365  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roadVec = {road};
366  ATH_CHECK(m_trackFitterTool_1st->getTracks(roadVec, tracksForCurrentRoad, m_evtSel->getMin(), m_evtSel->getMax()));
367 
368  // Find the best track for this road
369  if (!tracksForCurrentRoad.empty()) {
370  auto bestTrackIter = std::min_element(
371  tracksForCurrentRoad.begin(), tracksForCurrentRoad.end(),
372  [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
373  return a.getChi2ndof() < b.getChi2ndof();
374  });
375 
376  if (bestTrackIter != tracksForCurrentRoad.end() && bestTrackIter->getChi2ndof() < 1.e15) {
377  tracks_1st.push_back(*bestTrackIter);
378  }
379  }
380  }
381  } else { // Pass all tracks with chi2 < 1e15
382  ATH_CHECK(m_trackFitterTool_1st->getTracks(roads_1st, tracks_1st, m_evtSel->getMin(), m_evtSel->getMax()));
383  }
384  }
385  } else { // No tracking;
386  ATH_MSG_DEBUG("No tracking. Just running dummy road2track algorith");
387  if(m_doGNNPixelSeeding) { //For GNNPixelSeeding, convert the roads to a track in the simplest form
388  for (const std::shared_ptr<const FPGATrackSimRoad>& road : roads_1st) {
389  std::vector<std::shared_ptr<const FPGATrackSimHit>> track_hits;
390  for (unsigned layer = 0; layer < road->getNLayers(); ++layer) {
391  track_hits.insert(track_hits.end(), road->getHits(layer).begin(), road->getHits(layer).end());
392  }
393 
394  FPGATrackSimTrack track_cand;
395  track_cand.setNLayers(track_hits.size());
396  for (size_t ihit = 0; ihit < track_hits.size(); ++ihit) {
397  track_cand.setFPGATrackSimHit(ihit, *(track_hits[ihit]));
398  }
399  tracks_1st.push_back(track_cand);
400  }
401  }
402  else { roadsToTrack(roads_1st, tracks_1st, m_FPGATrackSimMapping->PlaneMap_1st(0)); }
403  }
404 
407  monitorTracks(m_1st_stage_track_monitor, tracks_1st);
408  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: Getting Tracks");
409 
410 
411  // set track parameters to truth
412  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: Set Track Parameters to Truth");
413  //Loop over tracks and set the region for all of them, also optionally set track parameters to truth
414  for (FPGATrackSimTrack& track : tracks_1st) {
415  track.setRegion(m_region);
416  if (m_SetTruthParametersForTracks >= 0 && truthtracks.size() > 0) {
417  if (m_SetTruthParametersForTracks != 0)
418  track.setQOverPt(truthtracks.front().getQOverPt());
419  else if (m_SetTruthParametersForTracks != 1)
420  track.setD0(truthtracks.front().getD0());
421  else if (m_SetTruthParametersForTracks != 2)
422  track.setPhi(truthtracks.front().getPhi());
423  else if (m_SetTruthParametersForTracks != 3)
424  track.setZ0(truthtracks.front().getZ0());
425  else if (m_SetTruthParametersForTracks != 4)
426  track.setEta(truthtracks.front().getEta());
427  }
428  }
431  monitorTracks(m_1st_stage_track_post_setTruth_monitor, tracks_1st);
432  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: Set Track Parameters to Truth");
433 
434  // Loop over roads and store them in SG (after track finding to also copy the sector information)
435  for (auto const& road : roads_1st) {
436  std::vector<FPGATrackSimHit> road_hits;
437  ATH_MSG_DEBUG("Hough Road X Y: " << road->getX() << " " << road->getY());
438  for (size_t l = 0; l < road->getNLayers(); ++l) {
439  for (const auto& layerH : road->getHits(l)) {
440  road_hits.push_back(*layerH);
441  }
442  }
443  FPGAHitsInRoads_1st->push_back(std::move(road_hits));
444  FPGARoads_1st->push_back(*road);
445  }
446 
447  // overlap removal
448  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: OverlapRemoval");
449  if (m_doOverlapRemoval) ATH_CHECK(m_overlapRemovalTool_1st->runOverlapRemoval(tracks_1st));
450  // monitor variables (vectors of pointers)
451  std::vector<const FPGATrackSimTrack*> tracks_1st_after_chi2;
452  std::vector<const FPGATrackSimTrack*> tracks_1st_after_overlap;
453  for (const FPGATrackSimTrack& track : tracks_1st) {
454  if (track.getChi2ndof() < m_trackScoreCut.value()) {
455  m_nTracksChi2Tot++;
456  tracks_1st_after_chi2.push_back(&track);
457  if (track.passedOR()) {
458  tracks_1st_after_overlap.push_back(&track);
459  m_nTracksChi2OLRTot++;
460  }
461  }
462  }
464  monitorTracks(m_1st_stage_track_post_chi2_monitor, tracks_1st_after_chi2);
466  monitorTracks(m_1st_stage_track_post_OLR_monitor, tracks_1st_after_overlap);
467  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: OverlapRemoval");
468 
469  m_nRoadsTot += roads_1st.size();
470  m_nTracksTot += tracks_1st.size();
471 
472  // Do some simple monitoring of efficiencies. okay, we need truth tracks here.
473  if (truthtracks.size() > 0) {
474  m_evt_truth++;
475  if (roads_1st.size() > 0) m_nRoadsFound++;
476  if (roads_1st.size() > m_maxNRoadsFound) m_maxNRoadsFound = roads_1st.size();
477 
478  unsigned npasschi2(0);
479  unsigned npasschi2OLR(0);
480  if (tracks_1st.size() > 0) {
481  m_nTracksFound++;
482  if (tracks_1st.size() > m_maxNTracksTot) m_maxNTracksTot = tracks_1st.size();
483  for (const auto& track : tracks_1st) {
484  if (track.getChi2ndof() < m_trackScoreCut.value()) {
485  npasschi2++;
486  if (track.passedOR()) {
487  npasschi2OLR++;
488  }
489  }
490  }
491  }
492  if (npasschi2 > m_maxNTracksChi2Tot) m_maxNTracksChi2Tot = npasschi2;
493  if (npasschi2OLR > m_maxNTracksChi2OLRTot) m_maxNTracksChi2OLRTot = npasschi2OLR;
494  if (npasschi2 > 0) m_nTracksChi2Found++;
495  if (npasschi2OLR > 0) m_nTracksChi2OLRFound++;
496  }
497 
498  for (const FPGATrackSimTrack& track : tracks_1st) FPGATracks_1stHandle->push_back(track);
499 
500  // Now, we may want to do large-radius tracking on the hits not used by the first stage tracking.
501  // This follows overlap removal.
502  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roadsLRT;
503  std::vector<FPGATrackSimTrack> tracksLRT; // currently empty
504  if (m_doLRT) {
505  // Filter out hits that are on successful first-stage tracks
506  std::vector<std::shared_ptr<const FPGATrackSimHit>> remainingHits;
507 
508  if (m_doLRTHitFiltering) {
509  ATH_MSG_DEBUG("Doing hit filtering based on prompt tracks.");
510  ATH_CHECK(m_LRTRoadFilterTool->filterUsedHits(tracks_1st, phits_1st, remainingHits));
511 
512  for (const auto &Hit : remainingHits) FPGAHitsFiltered_1st->push_back(*Hit);
513 
514  } else {
515  ATH_MSG_DEBUG("No hit filtering requested; using all hits for LRT.");
516  remainingHits = std::move(phits_1st);
517  }
518 
519  // Get LRT roads with remaining hits
520  ATH_MSG_DEBUG("Finding LRT roads");
521  ATH_CHECK(m_LRTRoadFinderTool->getRoads( remainingHits, roadsLRT ));
522  }
523 
524  auto dataFlowInfo = std::make_unique<FPGATrackSimDataFlowInfo>();
525 
526  // Write the output and reset
527  if (m_writeOutputData) {
528  ATH_CHECK(writeOutputData(roads_1st, tracks_1st, dataFlowInfo.get()));
529  }
530 
531  // This one we can do-- by passing in truth and offline tracks via storegate above (*FPGAOfflineTracks).
532  if (m_doHoughRootOutput1st) {
533  ATH_MSG_DEBUG("Running HoughRootOutputTool in 1st stage.");
534 
535  SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
536  if (!appMgr) {
537  ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
538  return StatusCode::FAILURE;
539  }
540 
541  // Create output ROOT file
542  ATH_CHECK(m_houghRootOutputTool->fillTree(roads_1st, truthtracks, *FPGAOfflineTracks, phits_output, m_writeOutNonSPStripHits, m_trackScoreCut.value(), m_NumOfHitPerGrouping, false));
543  }
544 
545  // Reset data pointers
546  if (m_outputRoadUnionTool) m_slicedHitHeader->reset();
547  m_logicEventOutputHeader->reset();
548 
549  return StatusCode::SUCCESS;
550 }

◆ extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase &  ExtraDeps)
protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

◆ extraOutputDeps()

const DataObjIDColl & AthAlgorithm::extraOutputDeps ( ) const
overridevirtualinherited

Return the list of extra output dependencies.

This list is extended to include symlinks implied by inheritance relations.

Definition at line 50 of file AthAlgorithm.cxx.

51 {
52  // If we didn't find any symlinks to add, just return the collection
53  // from the base class. Otherwise, return the extended collection.
54  if (!m_extendedExtraObjects.empty()) {
55  return m_extendedExtraObjects;
56  }
57  return Algorithm::extraOutputDeps();
58 }

◆ finalize()

StatusCode FPGATrackSimLogicalHitsProcessAlg::finalize ( )
overridevirtual

Definition at line 588 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

589 {
590  ATH_MSG_INFO("PRINTING FPGATRACKSIM SIMPLE STATS");
591  ATH_MSG_INFO("========================================================================================");
592  ATH_MSG_INFO("Ran on events = " << m_evt);
593  ATH_MSG_INFO("Inclusive efficiency to find a road = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nRoadsFound/(float)m_evt_truth)));
594  ATH_MSG_INFO("Inclusive efficiency to find a track = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksFound/(float)m_evt_truth)));
595  ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2Found/(float)m_evt_truth)));
596  ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 and OLR = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRFound/(float)m_evt_truth)));
597 
598 
599  ATH_MSG_INFO("Number of 1st stage roads/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nRoadsTot/(float)m_evt)));
600  ATH_MSG_INFO("Number of 1st stage track combinations/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksTot/(float)m_evt)));
601  ATH_MSG_INFO("Number of 1st stage tracks passing chi2/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2Tot/(float)m_evt)));
602  ATH_MSG_INFO("Number of 1st stage tracks passing chi2 and OLR/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRTot/(float)m_evt)));
603  ATH_MSG_INFO("========================================================================================");
604 
605  ATH_MSG_INFO("Max number of 1st stage roads in an event = " << m_maxNRoadsFound);
606  ATH_MSG_INFO("Max number of 1st stage track combinations in an event = " << m_maxNTracksTot);
607  ATH_MSG_INFO("Max number of 1st stage tracks passing chi2 in an event = " << m_maxNTracksChi2Tot);
608  ATH_MSG_INFO("Max number of 1st stage tracks passing chi2 and OLR in an event = " << m_maxNTracksChi2OLRTot);
609  ATH_MSG_INFO("========================================================================================");
610 
611  return StatusCode::SUCCESS;
612 }

◆ initialize()

StatusCode FPGATrackSimLogicalHitsProcessAlg::initialize ( )
overridevirtual

Definition at line 48 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

49 {
50  std::stringstream ss(m_description);
51  std::string line;
52  ATH_MSG_INFO("Tag config:");
53  if (!m_description.empty()) {
54  while (std::getline(ss, line, '\n')) {
55  ATH_MSG_INFO('\t' << line);
56  }
57  }
58  ATH_CHECK(m_roadFinderTool.retrieve());
59  ATH_CHECK(m_LRTRoadFilterTool.retrieve(EnableTool{m_doLRT}));
60  ATH_CHECK(m_LRTRoadFinderTool.retrieve(EnableTool{m_doLRT}));
61  ATH_CHECK(m_houghRootOutputTool.retrieve(EnableTool{m_doHoughRootOutput1st}));
62  ATH_CHECK(m_NNTrackTool.retrieve(EnableTool{m_doNNTrack}));
63  ATH_CHECK(m_roadFilterTool.retrieve(EnableTool{m_filterRoads}));
64  ATH_CHECK(m_roadFilterTool2.retrieve(EnableTool{m_filterRoads2}));
65 
66  ATH_CHECK(m_spacepointsTool.retrieve(EnableTool{m_doSpacepoints}));
67 
68  ATH_CHECK(m_trackFitterTool_1st.retrieve(EnableTool{m_doTracking}));
69  ATH_CHECK(m_overlapRemovalTool_1st.retrieve());
70  ATH_CHECK(m_writeOutputTool.retrieve());
71  ATH_CHECK(m_FPGATrackSimMapping.retrieve());
72  ATH_CHECK(m_slicingEngineTool.retrieve());
73 
74 
79  ATH_CHECK(m_1st_stage_road_monitor.retrieve());
80  ATH_CHECK(m_1st_stage_road_post_filter_1_monitor.retrieve());
81  ATH_CHECK(m_1st_stage_road_post_OLR_monitor.retrieve());
82  ATH_CHECK(m_1st_stage_road_post_filter_2_monitor.retrieve());
84  ATH_CHECK(m_1st_stage_track_monitor.retrieve());
85  ATH_CHECK(m_1st_stage_track_post_setTruth_monitor.retrieve());
86  ATH_CHECK(m_1st_stage_track_post_chi2_monitor.retrieve());
87  ATH_CHECK(m_1st_stage_track_post_OLR_monitor.retrieve());
88 
89 
90 
91  ATH_MSG_DEBUG("initialize() Instantiating root objects");
92 
93  // ROOT branches created for test vectors.
94  m_logicEventOutputHeader = m_writeOutputTool->addOutputBranch(m_outputBranch.value(), true);
95 
96  if (m_outputRoadUnionTool) m_slicedHitHeader = m_writeOutputTool->addInputBranch(m_sliceBranch.value(), m_writeInputBranches);
97 
98  // Updated slicing engine test vectors will have three streams.
99  m_slicedFirstPixelHeader = m_writeOutputTool->addInputBranch(m_sliceFirstPixelBranch.value(), m_writeInputBranches);
100  m_slicedSecondPixelHeader = m_writeOutputTool->addInputBranch(m_sliceSecondPixelBranch.value(), m_writeInputBranches);
101  m_slicedStripHeader = m_writeOutputTool->addInputBranch(m_sliceStripBranch.value(), m_writeInputBranches);
102 
103  // We also need a pre- and post- SP copy of the SPs.
104  m_slicedStripHeaderPreSP = m_writeOutputTool->addInputBranch(m_sliceStripBranchPreSP.value(), m_writeInputBranches);
105 
106  // Connect the slicing tools accordingly. We probably no longer need to hook up the roadfinder here.
107  if (m_outputRoadUnionTool) m_roadFinderTool->setupSlices(m_slicedHitHeader);
108  m_slicingEngineTool->setupSlices(m_slicedFirstPixelHeader, m_slicedSecondPixelHeader, m_slicedStripHeader);
109 
110  ATH_MSG_DEBUG("initialize() Setting branch");
111 
112  if (!m_monTool.empty())
113  ATH_CHECK(m_monTool.retrieve());
114 
115  ATH_CHECK( m_FPGASpacePointsKey.initialize() );
116  ATH_CHECK( m_FPGAHitInRoadsKey.initialize() );
117  ATH_CHECK( m_FPGAHitFilteredKey.initialize() );
118  ATH_CHECK( m_FPGARoadKey.initialize() );
119  ATH_CHECK( m_FPGATrackKey.initialize() );
120  ATH_CHECK( m_FPGAHitKey.initialize() );
121  ATH_CHECK( m_FPGAHitKey_1st.initialize() );
122  ATH_CHECK( m_FPGAHitKey_2nd.initialize() );
123  ATH_CHECK( m_FPGATruthTrackKey.initialize() );
124  ATH_CHECK( m_FPGAOfflineTrackKey.initialize() );
125  ATH_CHECK( m_FPGAEventInfoKey.initialize() );
126 
127  ATH_CHECK( m_chrono.retrieve() );
128  ATH_MSG_DEBUG("initialize() Finished");
129 
130  return StatusCode::SUCCESS;
131 }

◆ inputHandles()

virtual std::vector<Gaudi::DataHandle*> AthCommonDataStore< AthCommonMsg< Algorithm > >::inputHandles ( ) const
overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ msg() [1/2]

MsgStream& AthCommonMsg< Algorithm >::msg ( ) const
inlineinherited

Definition at line 24 of file AthCommonMsg.h.

24  {
25  return this->msgStream();
26  }

◆ msg() [2/2]

MsgStream& AthCommonMsg< Algorithm >::msg ( const MSG::Level  lvl) const
inlineinherited

Definition at line 27 of file AthCommonMsg.h.

27  {
28  return this->msgStream(lvl);
29  }

◆ msgLvl()

bool AthCommonMsg< Algorithm >::msgLvl ( const MSG::Level  lvl) const
inlineinherited

Definition at line 30 of file AthCommonMsg.h.

30  {
31  return this->msgLevel(lvl);
32  }

◆ outputHandles()

virtual std::vector<Gaudi::DataHandle*> AthCommonDataStore< AthCommonMsg< Algorithm > >::outputHandles ( ) const
overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ printHitSubregions()

void FPGATrackSimLogicalHitsProcessAlg::printHitSubregions ( std::vector< FPGATrackSimHit > const &  hits)
private

Definition at line 618 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

619 {
620  ATH_MSG_WARNING("Hit regions:");
621  for (const auto& hit : hits)
622  {
623  std::vector<uint32_t> regions = m_FPGATrackSimMapping->SubRegionMap()->getRegions(hit);
624  std::stringstream ss;
625  for (auto r : regions)
626  ss << r << ",";
627  ATH_MSG_WARNING("\t[" << ss.str() << "]");
628  }
629 }

◆ renounce()

std::enable_if_t<std::is_void_v<std::result_of_t<decltype(&T::renounce)(T)> > && !std::is_base_of_v<SG::VarHandleKeyArray, T> && std::is_base_of_v<Gaudi::DataHandle, T>, void> AthCommonDataStore< AthCommonMsg< Algorithm > >::renounce ( T &  h)
inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

381  {
382  h.renounce();
383  PBASE::renounce (h);
384  }

◆ renounceArray()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::renounceArray ( SG::VarHandleKeyArray &  handlesArray)
inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

364  {
365  handlesArray.renounce();
366  }

◆ sysInitialize()

StatusCode AthAlgorithm::sysInitialize ( )
overridevirtualinherited

Override sysInitialize.

Override sysInitialize from the base class.

Loop through all output handles, and if they're WriteCondHandles, automatically register them and this Algorithm with the CondSvc

Scan through all outputHandles, and if they're WriteCondHandles, register them with the CondSvc

Reimplemented from AthCommonDataStore< AthCommonMsg< Algorithm > >.

Reimplemented in AthAnalysisAlgorithm, AthFilterAlgorithm, PyAthena::Alg, and AthHistogramAlgorithm.

Definition at line 66 of file AthAlgorithm.cxx.

66  {
67  StatusCode sc=AthCommonDataStore<AthCommonMsg<Algorithm>>::sysInitialize();
68 
69  if (sc.isFailure()) {
70  return sc;
71  }
72  ServiceHandle<ICondSvc> cs("CondSvc",name());
73  for (auto h : outputHandles()) {
74  if (h->isCondition() && h->mode() == Gaudi::DataHandle::Writer) {
75  // do this inside the loop so we don't create the CondSvc until needed
76  if ( cs.retrieve().isFailure() ) {
77  ATH_MSG_WARNING("no CondSvc found: won't autoreg WriteCondHandles");
78  return StatusCode::SUCCESS;
79  }
80  if (cs->regHandle(this,*h).isFailure()) {
81  sc = StatusCode::FAILURE;
82  ATH_MSG_ERROR("unable to register WriteCondHandle " << h->fullKey()
83  << " with CondSvc");
84  }
85  }
86  }
87  return sc;
88 }

◆ sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< Algorithm > >::sysStart ( )
overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

◆ updateVHKA()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::updateVHKA ( Gaudi::Details::PropertyBase &  )
inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

308  {
309  // debug() << "updateVHKA for property " << p.name() << " " << p.toString()
310  // << " size: " << m_vhka.size() << endmsg;
311  for (auto &a : m_vhka) {
312  std::vector<SG::VarHandleKey*> keys = a->keys();
313  for (auto k : keys) {
314  k->setOwner(this);
315  }
316  }
317  }

◆ writeOutputData()

StatusCode FPGATrackSimLogicalHitsProcessAlg::writeOutputData ( const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &  roads_1st,
std::vector< FPGATrackSimTrack > const &  tracks_1st,
FPGATrackSimDataFlowInfo const *  dataFlowInfo 
)
private

Definition at line 557 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

560 {
561  m_logicEventOutputHeader->reset();
562 
563  ATH_MSG_DEBUG("NFPGATrackSimRoads_1st = " << roads_1st.size() << ", NFPGATrackSimTracks_1st = " << tracks_1st.size());
564 
565  if (!m_writeOutputData) return StatusCode::SUCCESS;
566  m_logicEventOutputHeader->reserveFPGATrackSimRoads_1st(roads_1st.size());
567  m_logicEventOutputHeader->addFPGATrackSimRoads_1st(roads_1st);
568 
569  m_logicEventOutputHeader->reserveFPGATrackSimTracks_1st(tracks_1st.size());
570  m_logicEventOutputHeader->addFPGATrackSimTracks_1st(tracks_1st);
571 
572  m_logicEventOutputHeader->setDataFlowInfo(*dataFlowInfo);
573  ATH_MSG_DEBUG(m_logicEventOutputHeader->getDataFlowInfo());
574 
575  // It would be nice to rearrange this so both algorithms use one instance of this tool, I think.
576  // Which means that dataprep can't call writeData because that does Fill().
577  ATH_CHECK(m_writeOutputTool->writeData());
578 
579 
580 
581  return StatusCode::SUCCESS;
582 }

Member Data Documentation

◆ m_1st_stage_road_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_road_monitor {this, "FirstStageRoadMonitor", "FPGATrackSimTrackMonitor", "First Stage Road Monitor"}
private

Definition at line 106 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_road_post_filter_1_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_road_post_filter_1_monitor {this, "FirstStageRoadPostFilter1Monitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Filter1 Monitor"}
private

Definition at line 108 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_road_post_filter_2_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_road_post_filter_2_monitor {this, "FirstStageRoadPostFilter2Monitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Filter2 Monitor"}
private

Definition at line 112 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_road_post_OLR_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_road_post_OLR_monitor {this, "FirstStageRoadPostOverlapRemovalMonitor", "FPGATrackSimTrackMonitor", "First Stage Road Post Overlap Removal Monitor"}
private

Definition at line 110 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_track_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_monitor {this, "FirstStageTrackMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Monitor"}
private

Definition at line 115 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_track_post_chi2_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_post_chi2_monitor {this, "FirstStageTrackPostChi2Monitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Chi2 Monitor"}
private

Definition at line 119 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_track_post_OLR_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_post_OLR_monitor {this, "FirstStageTrackPostOverlapRemovalTrackMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Overlap Removal Monitor"}
private

Definition at line 121 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_1st_stage_track_post_setTruth_monitor

ToolHandle<FPGATrackSimTrackMonitor> FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_post_setTruth_monitor {this, "FirstStageTrackPostSetTruthMonitor", "FPGATrackSimTrackMonitor", "First Stage Track Post Set to TruthTracks Monitor"}
private

Definition at line 117 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_chrono

ServiceHandle<IChronoStatSvc> FPGATrackSimLogicalHitsProcessAlg::m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
private

Definition at line 125 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_description

std::string FPGATrackSimLogicalHitsProcessAlg::m_description
private

Definition at line 81 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_detStore
privateinherited

Pointer to StoreGate (detector store by default)

Definition at line 393 of file AthCommonDataStore.h.

◆ m_doGNNPixelSeeding

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doGNNPixelSeeding {this, "DoGNNPixelSeeding", false, "Flag to configure for GNN Pixel Seeding" }
private

Definition at line 138 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doGNNTrack

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doGNNTrack {this, "DoGNNTrack", false, "Run tracking algorithm for GNN" }
private

Definition at line 137 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doHoughRootOutput1st

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doHoughRootOutput1st {this, "DoHoughRootOutput1st", false, "Dump output from the Hough Transform to flat ntuples"}
private

Definition at line 135 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doLRT

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doLRT {this, "doLRT", false, "Enable Large Radius Tracking"}
private

Definition at line 139 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doLRTHitFiltering

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doLRTHitFiltering {this, "LRTHitFiltering", false, "flag to enable hit/cluster filtering for LRT"}
private

Definition at line 140 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doMissingHitsChecks

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
private

Definition at line 132 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doNNTrack

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doNNTrack {this, "DoNNTrack_1st", false, "Run NN track filtering for 1st stage"}
private

Definition at line 136 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doOverlapRemoval

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doOverlapRemoval {this, "doOverlapRemoval", true , "flag to enable the overlap removal"}
private

Definition at line 131 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doSpacepoints

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
private

Definition at line 129 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doTracking

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doTracking {this, "tracking", false, "flag to enable the tracking"}
private

Definition at line 130 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evt

double FPGATrackSimLogicalHitsProcessAlg::m_evt = 0
private

Definition at line 171 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evt_truth

double FPGATrackSimLogicalHitsProcessAlg::m_evt_truth = 0
private

Definition at line 177 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evtSel

ServiceHandle<IFPGATrackSimEventSelectionSvc> FPGATrackSimLogicalHitsProcessAlg::m_evtSel {this, "eventSelector", "", "Event selection Svc"}
private

Definition at line 97 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_evtStore
privateinherited

Pointer to StoreGate (event store by default)

Definition at line 390 of file AthCommonDataStore.h.

◆ m_extendedExtraObjects

DataObjIDColl AthAlgorithm::m_extendedExtraObjects
privateinherited

Definition at line 79 of file AthAlgorithm.h.

◆ m_filterRoads

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
private

Definition at line 133 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_filterRoads2

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
private

Definition at line 134 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAEventInfoKey

SG::ReadHandleKey<FPGATrackSimEventInfo> FPGATrackSimLogicalHitsProcessAlg::m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
private

Definition at line 210 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitFilteredKey

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitFilteredKey {this, "FPGATrackSimHitFiltered1stKey","FPGAHitsFiltered_1st","FPGATrackSim Filtered Hits 1st stage key"}
private

Definition at line 203 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitInRoadsKey

SG::WriteHandleKey<FPGATrackSimHitContainer> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitInRoadsKey {this, "FPGATrackSimHitInRoads1stKey","FPGAHitsInRoads_1st","FPGATrackSim Hits in 1st stage roads key"}
private

Definition at line 204 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey

SG::ReadHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey {this, "FPGATrackSimHitKey","FPGAHits", "FPGATrackSim hits key"}
private

Definition at line 195 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey_1st

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_1st {this, "FPGATrackSimHitKey_1st","FPGAHits_1st","FPGATrackSim 1st stage hits key"}
private

Definition at line 201 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey_2nd

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_2nd {this, "FPGATrackSimHitKey_2nd","FPGAHits_2nd","FPGATrackSim 2nd stage hits key"}
private

Definition at line 202 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAOfflineTrackKey

SG::ReadHandleKey<FPGATrackSimOfflineTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
private

Definition at line 209 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGARoadKey

SG::WriteHandleKey<FPGATrackSimRoadCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGARoadKey {this, "FPGATrackSimRoad1stKey","FPGARoads_1st","FPGATrackSim Roads 1st stage key"}
private

Definition at line 205 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGASpacePointsKey

SG::WriteHandleKey<FPGATrackSimClusterCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGASpacePointsKey {this, "FPGATrackSimSpacePoints1stKey","FPGASpacePoints_1st","FPGATrackSim SpacePoints key"}
private

Definition at line 198 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATrackKey

SG::WriteHandleKey<FPGATrackSimTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackKey {this, "FPGATrackSimTrack1stKey","FPGATracks_1st","FPGATrackSim Tracks 1st stage key"}
private

Definition at line 206 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATrackSimMapping

ServiceHandle<IFPGATrackSimMappingSvc> FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
private

Definition at line 96 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATruthTrackKey

SG::ReadHandleKey<FPGATrackSimTruthTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
private

Definition at line 208 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_houghRootOutputTool

ToolHandle<FPGATrackSimHoughRootOutputTool> FPGATrackSimLogicalHitsProcessAlg::m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
private

Definition at line 91 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_logicEventOutputHeader

FPGATrackSimLogicalEventOutputHeader* FPGATrackSimLogicalHitsProcessAlg::m_logicEventOutputHeader = nullptr
private

Definition at line 164 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_LRTRoadFilterTool

ToolHandle<FPGATrackSimLLPRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFilterTool {this, "LRTRoadFilter", "FPGATrackSimLLPRoadFilterTool/FPGATrackSimLLPRoadFilterTool", "LRT Road Filter Tool"}
private

Definition at line 86 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_LRTRoadFinderTool

ToolHandle<IFPGATrackSimRoadFinderTool> FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFinderTool {this, "LRTRoadFinder", "FPGATrackSimHoughTransform_d0phi0_Tool/FPGATrackSimHoughTransform_d0phi0_Tool", "LRT Road Finder Tool"}
private

Definition at line 87 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNRoadsFound

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNRoadsFound = 0
private

Definition at line 183 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksChi2OLRTot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2OLRTot = 0
private

Definition at line 186 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksChi2Tot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2Tot = 0
private

Definition at line 185 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksTot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksTot = 0
private

Definition at line 184 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_monTool

ToolHandle<GenericMonitoringTool> FPGATrackSimLogicalHitsProcessAlg::m_monTool {this,"MonTool", "", "Monitoring tool"}
private

Definition at line 101 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_NNTrackTool

ToolHandle<FPGATrackSimNNTrackTool> FPGATrackSimLogicalHitsProcessAlg::m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool", "NN Track Tool"}
private

Definition at line 90 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nRoadsFound

long FPGATrackSimLogicalHitsProcessAlg::m_nRoadsFound = 0
private

Definition at line 178 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nRoadsTot

long FPGATrackSimLogicalHitsProcessAlg::m_nRoadsTot = 0
private

Definition at line 172 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2Found

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Found = 0
private

Definition at line 180 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2OLRFound

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRFound = 0
private

Definition at line 181 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2OLRTot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRTot = 0
private

Definition at line 175 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2Tot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Tot = 0
private

Definition at line 174 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksFound

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksFound = 0
private

Definition at line 179 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksTot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksTot = 0
private

Definition at line 173 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_NumOfHitPerGrouping

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
private

Definition at line 144 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_outputBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
private

Definition at line 152 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_outputRoadUnionTool

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_outputRoadUnionTool {this, "outputRoadUnionTool", false, "If set to true, create LogicalEventInputHeader in output ROOT file using road union tool."}
private

Definition at line 147 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_overlapRemovalTool_1st

ToolHandle<FPGATrackSimOverlapRemovalTool> FPGATrackSimLogicalHitsProcessAlg::m_overlapRemovalTool_1st {this, "OverlapRemoval_1st", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_1st", "1st stage overlap removal tool"}
private

Definition at line 93 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_passLowestChi2TrackOnly

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_passLowestChi2TrackOnly {this,"passLowestChi2TrackOnly", false, "case when passing only lowest chi2 track per road"}
private

Definition at line 145 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_region

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_region {this, "Region", 0, "Region ID to assign to tracks"}
private

Definition at line 148 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFilterTool

ToolHandle<IFPGATrackSimRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool {this, "RoadFilter", "FPGATrackSimEtaPatternFilterTool", "Road Filter Tool"}
private

Definition at line 88 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFilterTool2

ToolHandle<IFPGATrackSimRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool2 {this, "RoadFilter2", "FPGATrackSimPhiRoadFilterTool", "Road Filter2 Tool"}
private

Definition at line 89 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFinderTool

ToolHandle<FPGATrackSimRoadUnionTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFinderTool {this, "RoadFinder", "FPGATrackSimPatternMatchTool", "Road Finder Tool"}
private

Definition at line 85 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_secondStageStrips

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_secondStageStrips {this, "secondStageStrips", true, "If set to true, strip hits/SPs go to the second stage. Otherwise they go to the first." }
private

Definition at line 146 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_SetTruthParametersForTracks

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
private

Definition at line 128 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for sliced hits in output ROOT file." }
private

Definition at line 151 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedFirstPixelHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedFirstPixelHeader = nullptr
private

Definition at line 160 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedHitHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedHitHeader = nullptr
private

Definition at line 159 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedSecondPixelHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedSecondPixelHeader = nullptr
private

Definition at line 161 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedStripHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedStripHeader = nullptr
private

Definition at line 162 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedStripHeaderPreSP

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedStripHeaderPreSP = nullptr
private

Definition at line 163 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceFirstPixelBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceFirstPixelBranch {this, "FirstPixelBranchName", "LogicalEventFirstPixelHeader", "Name of the branch for first stage pixel hits in output ROOT file"}
private

Definition at line 153 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceSecondPixelBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceSecondPixelBranch {this, "SecondPixelBranchName", "LogicalEventSecondPixelHeader", "Name of the branch for second stage pixel hits in output ROOT file"}
private

Definition at line 154 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceStripBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranch {this, "StripBranchName", "LogicalEventSpacepointHeader", "Name of the branch for (post-SP) strip hits in output ROOT file"}
private

Definition at line 155 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceStripBranchPreSP

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranchPreSP {this, "StripPreSPBranchName", "LogicalEventStripHeader", "Name of the branch for (pre-SP) strip hits in output ROOT file"}
private

Definition at line 156 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicingEngineTool

ToolHandle<FPGATrackSimSlicingEngineTool> FPGATrackSimLogicalHitsProcessAlg::m_slicingEngineTool {this, "SlicingEngineTool", "FPGATrackSimSlicingEngineTool/FPGATrackSimSlicingEngineTool", "Slicing engine tool"}
private

Definition at line 95 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_spacepoints

std::vector<FPGATrackSimCluster> FPGATrackSimLogicalHitsProcessAlg::m_spacepoints {}
private

Definition at line 168 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_spacepointsTool

ToolHandle<FPGATrackSimSpacePointsToolI> FPGATrackSimLogicalHitsProcessAlg::m_spacepointsTool {this, "SpacePointTool", "FPGATrackSimSpacePointsTool/FPGATrackSimSpacePointsTool", "Space Points Tool"}
private

Definition at line 84 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_trackFitterTool_1st

ToolHandle<FPGATrackSimTrackFitterTool> FPGATrackSimLogicalHitsProcessAlg::m_trackFitterTool_1st {this, "TrackFitter_1st", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_1st", "1st stage track fit tool"}
private

Definition at line 92 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_1st_guessedcheck

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_1st_guessedcheck
private

Definition at line 167 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_1st_nomiss

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_1st_nomiss
private

Definition at line 167 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_2nd_guessedcheck

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_2nd_guessedcheck
private

Definition at line 167 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_2nd_nomiss

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_2nd_nomiss
private

Definition at line 167 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_trackScoreCut

Gaudi::Property<float> FPGATrackSimLogicalHitsProcessAlg::m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
private

Definition at line 142 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< Algorithm > >::m_varHandleArraysDeclared
privateinherited

Definition at line 399 of file AthCommonDataStore.h.

◆ m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< Algorithm > >::m_vhka
privateinherited

Definition at line 398 of file AthCommonDataStore.h.

◆ m_writeInputBranches

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_writeInputBranches {this, "writeInputBranches", true, "If set to false, never write input branches"}
private

Definition at line 149 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeOutNonSPStripHits

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
private

Definition at line 143 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeOutputData

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
private

Definition at line 141 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeOutputTool

ToolHandle<FPGATrackSimOutputHeaderTool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
private

Definition at line 94 of file FPGATrackSimLogicalHitsProcessAlg.h.

The documentation for this class was generated from the following files:
FPGATrackSimLogicalHitsProcessAlg::m_passLowestChi2TrackOnly
Gaudi::Property< bool > m_passLowestChi2TrackOnly
Definition: FPGATrackSimLogicalHitsProcessAlg.h:145
FPGATrackSimLogicalHitsProcessAlg::m_doSpacepoints
Gaudi::Property< bool > m_doSpacepoints
Definition: FPGATrackSimLogicalHitsProcessAlg.h:129
FPGATrackSimLogicalHitsProcessAlg::m_filterRoads
Gaudi::Property< bool > m_filterRoads
Definition: FPGATrackSimLogicalHitsProcessAlg.h:133
beamspotman.r
def r
Definition: beamspotman.py:672
FPGATrackSimLogicalHitsProcessAlg::m_maxNRoadsFound
unsigned long m_maxNRoadsFound
Definition: FPGATrackSimLogicalHitsProcessAlg.h:183
FPGATrackSimLogicalHitsProcessAlg::m_slicedSecondPixelHeader
FPGATrackSimLogicalEventInputHeader * m_slicedSecondPixelHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:161
FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_post_OLR_monitor
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_post_OLR_monitor
Definition: FPGATrackSimLogicalHitsProcessAlg.h:121
FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_road_post_filter_2_monitor
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_road_post_filter_2_monitor
Definition: FPGATrackSimLogicalHitsProcessAlg.h:112
FPGATrackSimLogicalHitsProcessAlg::m_writeOutputTool
ToolHandle< FPGATrackSimOutputHeaderTool > m_writeOutputTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:94
FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFinderTool
ToolHandle< IFPGATrackSimRoadFinderTool > m_LRTRoadFinderTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:87
FPGATrackSimLogicalHitsProcessAlg::m_doHoughRootOutput1st
Gaudi::Property< bool > m_doHoughRootOutput1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:135
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_2nd
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey_2nd
Definition: FPGATrackSimLogicalHitsProcessAlg.h:202
TRTCalib_Extractor.hits
hits
Definition: TRTCalib_Extractor.py:35
FPGATrackSimLogicalHitsProcessAlg::m_spacepointsTool
ToolHandle< FPGATrackSimSpacePointsToolI > m_spacepointsTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:84
FPGATrackSimLogicalHitsProcessAlg::m_doGNNPixelSeeding
Gaudi::Property< bool > m_doGNNPixelSeeding
Definition: FPGATrackSimLogicalHitsProcessAlg.h:138
FPGATrackSimLogicalHitsProcessAlg::m_description
std::string m_description
Definition: FPGATrackSimLogicalHitsProcessAlg.h:81
PowhegControl_ttHplus_NLO.ss
ss
Definition: PowhegControl_ttHplus_NLO.py:83
FPGATrackSimLogicalHitsProcessAlg::m_logicEventOutputHeader
FPGATrackSimLogicalEventOutputHeader * m_logicEventOutputHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:164
FPGATrackSimLogicalHitsProcessAlg::m_FPGARoadKey
SG::WriteHandleKey< FPGATrackSimRoadCollection > m_FPGARoadKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:205
FPGATrackSimLogicalHitsProcessAlg::m_slicedHitHeader
FPGATrackSimLogicalEventInputHeader * m_slicedHitHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:159
ATH_MSG_INFO
#define ATH_MSG_INFO(x)
Definition: AthMsgStreamMacros.h:31
FPGATrackSimLogicalHitsProcessAlg::m_nTracksTot
long m_nTracksTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:173
FPGATrackSimCluster
Definition: FPGATrackSimCluster.h:24
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitInRoadsKey
SG::WriteHandleKey< FPGATrackSimHitContainer > m_FPGAHitInRoadsKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:204
FPGATrackSimTrack
Definition: FPGATrackSimTrack.h:18
FPGATrackSimLogicalHitsProcessAlg::m_region
Gaudi::Property< int > m_region
Definition: FPGATrackSimLogicalHitsProcessAlg.h:148
SG::ReadHandle
Definition: StoreGate/StoreGate/ReadHandle.h:67
FPGATrackSimLogicalEventOutputHeader::reserveFPGATrackSimRoads_1st
void reserveFPGATrackSimRoads_1st(size_t size)
Definition: FPGATrackSimLogicalEventOutputHeader.h:24
FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFilterTool
ToolHandle< FPGATrackSimLLPRoadFilterTool > m_LRTRoadFilterTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:86
FPGATrackSimLogicalHitsProcessAlg::m_doTracking
Gaudi::Property< bool > m_doTracking
Definition: FPGATrackSimLogicalHitsProcessAlg.h:130
FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_monitor
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_monitor
Definition: FPGATrackSimLogicalHitsProcessAlg.h:115
FPGATrackSimLogicalHitsProcessAlg::m_writeOutNonSPStripHits
Gaudi::Property< bool > m_writeOutNonSPStripHits
Definition: FPGATrackSimLogicalHitsProcessAlg.h:143
FPGATrackSimLogicalHitsProcessAlg::m_FPGATruthTrackKey
SG::ReadHandleKey< FPGATrackSimTruthTrackCollection > m_FPGATruthTrackKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:208
AthCommonDataStore< AthCommonMsg< Algorithm > >::m_evtStore
StoreGateSvc_t m_evtStore
Pointer to StoreGate (event store by default)
Definition: AthCommonDataStore.h:390
FPGATrackSimLogicalHitsProcessAlg::m_evtSel
ServiceHandle< IFPGATrackSimEventSelectionSvc > m_evtSel
Definition: FPGATrackSimLogicalHitsProcessAlg.h:97
AthCommonDataStore< AthCommonMsg< Algorithm > >::m_vhka
std::vector< SG::VarHandleKeyArray * > m_vhka
Definition: AthCommonDataStore.h:398
FPGATrackSimLogicalEventOutputHeader::reset
void reset()
Definition: FPGATrackSimLogicalEventOutputHeader.cxx:12
FPGATrackSimLogicalHitsProcessAlg::m_writeOutputData
Gaudi::Property< bool > m_writeOutputData
Definition: FPGATrackSimLogicalHitsProcessAlg.h:141
FPGATrackSimLogicalHitsProcessAlg::m_spacepoints
std::vector< FPGATrackSimCluster > m_spacepoints
Definition: FPGATrackSimLogicalHitsProcessAlg.h:168
FPGATrackSimLogicalHitsProcessAlg::m_FPGAEventInfoKey
SG::ReadHandleKey< FPGATrackSimEventInfo > m_FPGAEventInfoKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:210
UploadAMITag.l
list l
Definition: UploadAMITag.larcaf.py:157
FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2OLRTot
unsigned long m_maxNTracksChi2OLRTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:186
FPGATrackSimLogicalHitsProcessAlg::m_overlapRemovalTool_1st
ToolHandle< FPGATrackSimOverlapRemovalTool > m_overlapRemovalTool_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:93
read_hist_ntuple.t
t
Definition: read_hist_ntuple.py:5
FPGATrackSimLogicalHitsProcessAlg::m_sliceFirstPixelBranch
Gaudi::Property< std::string > m_sliceFirstPixelBranch
Definition: FPGATrackSimLogicalHitsProcessAlg.h:153
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitFilteredKey
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitFilteredKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:203
FPGATrackSimLogicalHitsProcessAlg::m_FPGAOfflineTrackKey
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollection > m_FPGAOfflineTrackKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:209
MuonR4::to_string
std::string to_string(const SectorProjector proj)
Definition: MsTrackSeeder.cxx:66
FPGATrackSimLogicalHitsProcessAlg::m_doNNTrack
Gaudi::Property< bool > m_doNNTrack
Definition: FPGATrackSimLogicalHitsProcessAlg.h:136
FPGATrackSimTrack::setFPGATrackSimHit
void setFPGATrackSimHit(unsigned i, const FPGATrackSimHit &hit)
Definition: FPGATrackSimTrack.cxx:98
FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackKey
SG::WriteHandleKey< FPGATrackSimTrackCollection > m_FPGATrackKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:206
FPGATrackSimLogicalHitsProcessAlg::m_evt_truth
double m_evt_truth
Definition: FPGATrackSimLogicalHitsProcessAlg.h:177
dq_defect_bulk_create_defects.line
line
Definition: dq_defect_bulk_create_defects.py:27
FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksTot
unsigned long m_maxNTracksTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:184
FPGATrackSimLogicalHitsProcessAlg::m_monTool
ToolHandle< GenericMonitoringTool > m_monTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:101
FPGATrackSimLogicalEventOutputHeader::getDataFlowInfo
FPGATrackSimDataFlowInfo const & getDataFlowInfo() const
Definition: FPGATrackSimLogicalEventOutputHeader.h:47
AthenaPoolTestRead.sc
sc
Definition: AthenaPoolTestRead.py:27
SG::VarHandleKeyArray::setOwner
virtual void setOwner(IDataHandleHolder *o)=0
FPGATrackSimHit
Definition: FPGATrackSimHit.h:41
FPGATrackSimLogicalHitsProcessAlg::m_evt
double m_evt
Definition: FPGATrackSimLogicalHitsProcessAlg.h:171
IDTPMcnv.htype
htype
Definition: IDTPMcnv.py:29
FPGATrackSimLogicalHitsProcessAlg::m_trackScoreCut
Gaudi::Property< float > m_trackScoreCut
Definition: FPGATrackSimLogicalHitsProcessAlg.h:142
FPGATrackSimLogicalHitsProcessAlg::m_1st_stage_track_post_chi2_monitor
ToolHandle< FPGATrackSimTrackMonitor > m_1st_stage_track_post_chi2_monitor
Definition: FPGATrackSimLogicalHitsProcessAlg.h:119
FPGATrackSimLogicalHitsProcessAlg::m_doLRTHitFiltering
Gaudi::Property< bool > m_doLRTHitFiltering
Definition: FPGATrackSimLogicalHitsProcessAlg.h:140
FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool2
ToolHandle< IFPGATrackSimRoadFilterTool > m_roadFilterTool2
Definition: FPGATrackSimLogicalHitsProcessAlg.h:89
AthCommonDataStore::declareGaudiProperty
Gaudi::Details::PropertyBase & declareGaudiProperty(Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
specialization for handling Gaudi::Property<SG::VarHandleKey>
Definition: AthCommonDataStore.h:156
Hit
Definition: Simulation/ISF/ISF_FastCaloSim/ISF_FastCaloGpu/ISF_FastCaloGpu/Hit.h:16
FPGATrackSimEventInfo
Definition: FPGATrackSimEventInfo.h:14
python.utils.AtlRunQueryDQUtils.p
p
Definition: AtlRunQueryDQUtils.py:209
AthCommonDataStore
Definition: AthCommonDataStore.h:52
AthAlgorithm::sysInitialize
virtual StatusCode sysInitialize() override
Override sysInitialize.
Definition: AthAlgorithm.cxx:66
ATH_MSG_ERROR
#define ATH_MSG_ERROR(x)
Definition: AthMsgStreamMacros.h:33
FPGATrackSimLogicalEventOutputHeader::reserveFPGATrackSimTracks_1st
void reserveFPGATrackSimTracks_1st(size_t size)
Definition: FPGATrackSimLogicalEventOutputHeader.h:37
AthCommonDataStore< AthCommonMsg< Algorithm > >::outputHandles
virtual std::vector< Gaudi::DataHandle * > outputHandles() const override
Return this algorithm's output handles.
FPGATrackSimLogicalHitsProcessAlg::m_roadFinderTool
ToolHandle< FPGATrackSimRoadUnionTool > m_roadFinderTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:85
roadsToTrack
void roadsToTrack(std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads, std::vector< FPGATrackSimTrack > &track_cands, const FPGATrackSimPlaneMap *pmap)
Definition: FPGATrackSimHoughFunctions.cxx:674
FPGATrackSimLogicalHitsProcessAlg::m_SetTruthParametersForTracks
Gaudi::Property< int > m_SetTruthParametersForTracks
Definition: FPGATrackSimLogicalHitsProcessAlg.h:128
EL::StatusCode
::StatusCode StatusCode
StatusCode definition for legacy code.
Definition: PhysicsAnalysis/D3PDTools/EventLoop/EventLoop/StatusCode.h:22
FPGATrackSimLogicalEventOutputHeader::addFPGATrackSimRoads_1st
void addFPGATrackSimRoads_1st(const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads_1st)
Definition: FPGATrackSimLogicalEventOutputHeader.h:25
ATH_MSG_DEBUG
#define ATH_MSG_DEBUG(x)
Definition: AthMsgStreamMacros.h:29
AthCommonDataStore::declareProperty
Gaudi::Details::PropertyBase & declareProperty(Gaudi::Property< T, V, H > &t)
Definition: AthCommonDataStore.h:145
TRT::Hit::layer
@ layer
Definition: HitInfo.h:79
FPGATrackSimLogicalHitsProcessAlg::m_doOverlapRemoval
Gaudi::Property< bool > m_doOverlapRemoval
Definition: FPGATrackSimLogicalHitsProcessAlg.h:131
Amg::transform
Amg::Vector3D transform(Amg::Vector3D &v, Amg::Transform3D &tr)
Transform a point from a Trasformation3D.
Definition: GeoPrimitivesHelpers.h:156
FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranchPreSP
Gaudi::Property< std::string > m_sliceStripBranchPreSP
Definition: FPGATrackSimLogicalHitsProcessAlg.h:156
ATH_CHECK
#define ATH_CHECK
Definition: AthCheckMacros.h:40
FPGATrackSimLogicalHitsProcessAlg::m_writeInputBranches
Gaudi::Property< bool > m_writeInputBranches
Definition: FPGATrackSimLogicalHitsProcessAlg.h:149
FPGATrackSimLogicalHitsProcessAlg::m_outputRoadUnionTool
Gaudi::Property< bool > m_outputRoadUnionTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:147
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_1st
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:201
AthCommonDataStore< AthCommonMsg< Algorithm > >::m_detStore
StoreGateSvc_t m_detStore
Pointer to StoreGate (detector store by default)
Definition: AthCommonDataStore.h:393
FPGATrackSimLogicalHitsProcessAlg::writeOutputData
StatusCode writeOutputData(const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads_1st, std::vector< FPGATrackSimTrack > const &tracks_1st, FPGATrackSimDataFlowInfo const *dataFlowInfo)
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:557
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey
SG::ReadHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:195
FPGATrackSimLogicalEventInputHeader::newEvent
void newEvent(FPGATrackSimEventInfo &event)
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