#include <FPGATrackSimLogicalHitsProcessAlg.h>

Inheritance diagram for FPGATrackSimLogicalHitsProcessAlg:

Collaboration diagram for FPGATrackSimLogicalHitsProcessAlg:

Public Member Functions
	FPGATrackSimLogicalHitsProcessAlg (const std::string &name, ISvcLocator *pSvcLocator)

virtual	~FPGATrackSimLogicalHitsProcessAlg ()=default

virtual StatusCode	initialize () override

virtual StatusCode	execute () override

virtual StatusCode	finalize () override

virtual StatusCode	sysInitialize () override
	Override sysInitialize. More...

virtual const DataObjIDColl &	extraOutputDeps () const override
	Return the list of extra output dependencies. More...

ServiceHandle< StoreGateSvc > &	evtStore ()
	The standard `StoreGateSvc` (event store) Returns (kind of) a pointer to the `StoreGateSvc`. More...

const ServiceHandle< StoreGateSvc > &	evtStore () const
	The standard `StoreGateSvc` (event store) Returns (kind of) a pointer to the `StoreGateSvc`. More...

const ServiceHandle< StoreGateSvc > &	detStore () const
	The standard `StoreGateSvc/DetectorStore` Returns (kind of) a pointer to the `StoreGateSvc`. More...

virtual StatusCode	sysStart () override
	Handle START transition. More...

virtual std::vector< Gaudi::DataHandle * >	inputHandles () const override
	Return this algorithm's input handles. More...

virtual std::vector< Gaudi::DataHandle * >	outputHandles () const override
	Return this algorithm's output handles. More...

Gaudi::Details::PropertyBase &	declareProperty (Gaudi::Property< T, V, H > &t)

Gaudi::Details::PropertyBase *	declareProperty (const std::string &name, SG::VarHandleKey &hndl, const std::string &doc, const SG::VarHandleKeyType &)
	Declare a new Gaudi property. More...

Gaudi::Details::PropertyBase *	declareProperty (const std::string &name, SG::VarHandleBase &hndl, const std::string &doc, const SG::VarHandleType &)
	Declare a new Gaudi property. More...

Gaudi::Details::PropertyBase *	declareProperty (const std::string &name, SG::VarHandleKeyArray &hndArr, const std::string &doc, const SG::VarHandleKeyArrayType &)

Gaudi::Details::PropertyBase *	declareProperty (const std::string &name, T &property, const std::string &doc, const SG::NotHandleType &)
	Declare a new Gaudi property. More...

Gaudi::Details::PropertyBase *	declareProperty (const std::string &name, T &property, const std::string &doc="none")
	Declare a new Gaudi property. More...

void	updateVHKA (Gaudi::Details::PropertyBase &)

MsgStream &	msg () const

MsgStream &	msg (const MSG::Level lvl) const

bool	msgLvl (const MSG::Level lvl) const

Protected Member Functions
void	renounceArray (SG::VarHandleKeyArray &handlesArray)
	remove all handles from I/O resolution More...

std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void >	renounce (T &h)

void	extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
	Add StoreName to extra input/output deps as needed. More...

Private Types
typedef ServiceHandle< StoreGateSvc >	StoreGateSvc_t

Private Member Functions
StatusCode	writeOutputData (const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads_1st, std::vector< FPGATrackSimTrack > const &tracks_1st, FPGATrackSimDataFlowInfo const *dataFlowInfo)

void	printHitSubregions (std::vector< FPGATrackSimHit > const &hits)

Gaudi::Details::PropertyBase &	declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
	specialization for handling Gaudi::Property<SG::VarHandleKey> More...

Gaudi::Details::PropertyBase &	declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyArrayType &)
	specialization for handling Gaudi::Property<SG::VarHandleKeyArray> More...

Gaudi::Details::PropertyBase &	declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleType &)
	specialization for handling Gaudi::Property<SG::VarHandleBase> More...

Gaudi::Details::PropertyBase &	declareGaudiProperty (Gaudi::Property< T, V, H > &t, const SG::NotHandleType &)
	specialization for handling everything that's not a Gaudi::Property<SG::VarHandleKey> or a <SG::VarHandleKeyArray> More...

Private Attributes
std::string	m_description

ToolHandle< FPGATrackSimSpacePointsToolI >	m_spacepointsTool {this, "SpacePointTool", "FPGATrackSimSpacePointsTool/FPGATrackSimSpacePointsTool", "Space Points Tool"}

ToolHandle< FPGATrackSimRoadUnionTool >	m_roadFinderTool {this, "RoadFinder", "FPGATrackSimPatternMatchTool", "Road Finder Tool"}

ToolHandle< FPGATrackSimLLPRoadFilterTool >	m_LRTRoadFilterTool {this, "LRTRoadFilter", "FPGATrackSimLLPRoadFilterTool/FPGATrackSimLLPRoadFilterTool", "LRT Road Filter Tool"}

ToolHandle< IFPGATrackSimRoadFinderTool >	m_LRTRoadFinderTool {this, "LRTRoadFinder", "FPGATrackSimHoughTransform_d0phi0_Tool/FPGATrackSimHoughTransform_d0phi0_Tool", "LRT Road Finder Tool"}

ToolHandle< IFPGATrackSimRoadFilterTool >	m_roadFilterTool {this, "RoadFilter", "FPGATrackSimEtaPatternFilterTool", "Road Filter Tool"}

ToolHandle< IFPGATrackSimRoadFilterTool >	m_roadFilterTool2 {this, "RoadFilter2", "FPGATrackSimPhiRoadFilterTool", "Road Filter2 Tool"}

ToolHandle< FPGATrackSimNNTrackTool >	m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool", "NN Track Tool"}

ToolHandle< FPGATrackSimHoughRootOutputTool >	m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}

ToolHandle< FPGATrackSimTrackFitterTool >	m_trackFitterTool_1st {this, "TrackFitter_1st", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_1st", "1st stage track fit tool"}

ToolHandle< FPGATrackSimOverlapRemovalTool >	m_overlapRemovalTool_1st {this, "OverlapRemoval_1st", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_1st", "1st stage overlap removal tool"}

ToolHandle< FPGATrackSimOutputHeaderTool >	m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}

ToolHandle< FPGATrackSimSlicingEngineTool >	m_slicingEngineTool {this, "SlicingEngineTool", "FPGATrackSimSlicingEngineTool/FPGATrackSimSlicingEngineTool", "Slicing engine tool"}

ServiceHandle< IFPGATrackSimMappingSvc >	m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}

ServiceHandle< IFPGATrackSimEventSelectionSvc >	m_evtSel {this, "eventSelector", "", "Event selection Svc"}

ServiceHandle< IChronoStatSvc >	m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}

Gaudi::Property< int >	m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}

Gaudi::Property< bool >	m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}

Gaudi::Property< bool >	m_doTracking {this, "tracking", false, "flag to enable the tracking"}

Gaudi::Property< bool >	m_doOverlapRemoval {this, "doOverlapRemoval", true , "flag to enable the overlap removal"}

Gaudi::Property< bool >	m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}

Gaudi::Property< bool >	m_filterRoads {this, "FilterRoads", false, "enable first road filter"}

Gaudi::Property< bool >	m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}

Gaudi::Property< bool >	m_doHoughRootOutput1st {this, "DoHoughRootOutput1st", false, "Dump output from the Hough Transform to flat ntuples"}

Gaudi::Property< bool >	m_doNNTrack {this, "DoNNTrack_1st", false, "Run NN track filtering for 1st stage"}

Gaudi::Property< bool >	m_doLRT {this, "doLRT", false, "Enable Large Radius Tracking"}

Gaudi::Property< bool >	m_doLRTHitFiltering {this, "LRTHitFiltering", false, "flag to enable hit/cluster filtering for LRT"}

Gaudi::Property< bool >	m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}

Gaudi::Property< float >	m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }

Gaudi::Property< bool >	m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}

Gaudi::Property< int >	m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}

Gaudi::Property< bool >	m_passLowestChi2TrackOnly {this,"passLowestChi2TrackOnly", false, "case when passing only lowest chi2 track per road"}

Gaudi::Property< bool >	m_secondStageStrips {this, "secondStageStrips", true, "If set to true, strip hits/SPs go to the second stage. Otherwise they go to the first." }

Gaudi::Property< bool >	m_outputRoadUnionTool {this, "outputRoadUnionTool", false, "If set to true, create LogicalEventInputHeader in output ROOT file using road union tool."}

Gaudi::Property< int >	m_region {this, "Region", 0, "Region ID to assign to tracks"}

Gaudi::Property< std::string >	m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for sliced hits in output ROOT file." }

Gaudi::Property< std::string >	m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }

Gaudi::Property< std::string >	m_sliceFirstPixelBranch {this, "FirstPixelBranchName", "LogicalEventFirstPixelHeader", "Name of the branch for first stage pixel hits in output ROOT file"}

Gaudi::Property< std::string >	m_sliceSecondPixelBranch {this, "SecondPixelBranchName", "LogicalEventSecondPixelHeader", "Name of the branch for second stage pixel hits in output ROOT file"}

Gaudi::Property< std::string >	m_sliceStripBranch {this, "StripBranchName", "LogicalEventSpacepointHeader", "Name of the branch for (post-SP) strip hits in output ROOT file"}

Gaudi::Property< std::string >	m_sliceStripBranchPreSP {this, "StripPreSPBranchName", "LogicalEventStripHeader", "Name of the branch for (pre-SP) strip hits in output ROOT file"}

FPGATrackSimLogicalEventInputHeader *	m_slicedHitHeader = nullptr

FPGATrackSimLogicalEventInputHeader *	m_slicedFirstPixelHeader = nullptr

FPGATrackSimLogicalEventInputHeader *	m_slicedSecondPixelHeader = nullptr

FPGATrackSimLogicalEventInputHeader *	m_slicedStripHeader = nullptr

FPGATrackSimLogicalEventInputHeader *	m_slicedStripHeaderPreSP = nullptr

FPGATrackSimLogicalEventOutputHeader *	m_logicEventOutputHeader = nullptr

std::vector< FPGATrackSimTrack >	m_tracks_1st_guessedcheck

std::vector< FPGATrackSimTrack >	m_tracks_1st_nomiss

std::vector< FPGATrackSimTrack >	m_tracks_2nd_guessedcheck

std::vector< FPGATrackSimTrack >	m_tracks_2nd_nomiss

std::vector< FPGATrackSimCluster >	m_spacepoints {}

double	m_evt = 0

long	m_nRoadsTot = 0

long	m_nTracksTot = 0

long	m_nTracksChi2Tot = 0

long	m_nTracksChi2OLRTot = 0

double	m_evt_truth = 0

long	m_nRoadsFound = 0

long	m_nTracksFound = 0

long	m_nTracksChi2Found = 0

long	m_nTracksChi2OLRFound = 0

unsigned long	m_maxNRoadsFound = 0

unsigned long	m_maxNTracksTot = 0

unsigned long	m_maxNTracksChi2Tot = 0

unsigned long	m_maxNTracksChi2OLRTot = 0

ToolHandle< GenericMonitoringTool >	m_monTool {this,"MonTool", "", "Monitoring tool"}

SG::ReadHandleKey< FPGATrackSimHitCollection >	m_FPGAHitKey {this, "FPGATrackSimHitKey","FPGAHits", "FPGATrackSim hits key"}

SG::WriteHandleKey< FPGATrackSimClusterCollection >	m_FPGASpacePointsKey {this, "FPGATrackSimSpacePoints1stKey","FPGASpacePoints_1st","FPGATrackSim SpacePoints key"}

SG::WriteHandleKey< FPGATrackSimHitCollection >	m_FPGAHitKey_2nd {this, "FPGATrackSimHitKey_2nd","FPGAHits_2nd","FPGATrackSim 2nd stage hits key"}

SG::WriteHandleKey< FPGATrackSimHitCollection >	m_FPGAHitFilteredKey {this, "FPGATrackSimHitFiltered1stKey","FPGAHitsFiltered_1st","FPGATrackSim Filtered Hits 1st stage key"}

SG::WriteHandleKey< FPGATrackSimHitContainer >	m_FPGAHitInRoadsKey {this, "FPGATrackSimHitInRoads1stKey","FPGAHitsInRoads_1st","FPGATrackSim Hits in 1st stage roads key"}

SG::WriteHandleKey< FPGATrackSimRoadCollection >	m_FPGARoadKey {this, "FPGATrackSimRoad1stKey","FPGARoads_1st","FPGATrackSim Roads 1st stage key"}

SG::WriteHandleKey< FPGATrackSimTrackCollection >	m_FPGATrackKey {this, "FPGATrackSimTrack1stKey","FPGATracks_1st","FPGATrackSim Tracks 1st stage key"}

SG::ReadHandleKey< FPGATrackSimTruthTrackCollection >	m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}

SG::ReadHandleKey< FPGATrackSimOfflineTrackCollection >	m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}

SG::ReadHandleKey< FPGATrackSimEventInfo >	m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}

DataObjIDColl	m_extendedExtraObjects

StoreGateSvc_t	m_evtStore
	Pointer to StoreGate (event store by default) More...

StoreGateSvc_t	m_detStore
	Pointer to StoreGate (detector store by default) More...

std::vector< SG::VarHandleKeyArray * >	m_vhka

bool	m_varHandleArraysDeclared

Detailed Description

Definition at line 68 of file FPGATrackSimLogicalHitsProcessAlg.h.

Member Typedef Documentation

◆ StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< Algorithm > >::StoreGateSvc_t

privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

◆ FPGATrackSimLogicalHitsProcessAlg()

FPGATrackSimLogicalHitsProcessAlg::FPGATrackSimLogicalHitsProcessAlg	(	const std::string &	name,
		ISvcLocator *	pSvcLocator
	)

Definition at line 37 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

                                                                                                                      :
     AthAlgorithm(name, pSvcLocator)
 {
 }

◆ ~FPGATrackSimLogicalHitsProcessAlg()

virtual FPGATrackSimLogicalHitsProcessAlg::~FPGATrackSimLogicalHitsProcessAlg ( )

virtualdefault

Member Function Documentation

◆ declareGaudiProperty() [1/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty	(	Gaudi::Property< T, V, H > &	hndl,
		const SG::VarHandleKeyArrayType &
	)

inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKeyArray>

Definition at line 170 of file AthCommonDataStore.h.

   {
     return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
                                                        hndl.value(), 
                                                        hndl.documentation());
  
   }

◆ declareGaudiProperty() [2/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty	(	Gaudi::Property< T, V, H > &	hndl,
		const SG::VarHandleKeyType &
	)

inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

   {
     return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
                                                        hndl.value(), 
                                                        hndl.documentation());
  
   }

◆ declareGaudiProperty() [3/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty	(	Gaudi::Property< T, V, H > &	hndl,
		const SG::VarHandleType &
	)

inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleBase>

Definition at line 184 of file AthCommonDataStore.h.

   {
     return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
                                                        hndl.value(), 
                                                        hndl.documentation());
   }

◆ declareGaudiProperty() [4/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty	(	Gaudi::Property< T, V, H > &	t,
		const SG::NotHandleType &
	)

inlineprivateinherited

specialization for handling everything that's not a Gaudi::Property<SG::VarHandleKey> or a <SG::VarHandleKeyArray>

Definition at line 199 of file AthCommonDataStore.h.

   {
     return PBASE::declareProperty(t);
   }

◆ declareProperty() [1/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty	(	const std::string &	name,
		SG::VarHandleBase &	hndl,
		const std::string &	doc,
		const SG::VarHandleType &
	)

inlineinherited

Declare a new Gaudi property.

Parameters

name	Name of the property.
hndl	Object holding the property value.
doc	Documentation string for the property.

This is the version for types that derive from SG::VarHandleBase. The property value object is put on the input and output lists as appropriate; then we forward to the base class.

Definition at line 245 of file AthCommonDataStore.h.

   {
     this->declare(hndl.vhKey());
     hndl.vhKey().setOwner(this);
  
     return PBASE::declareProperty(name,hndl,doc);
   }

◆ declareProperty() [2/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty	(	const std::string &	name,
		SG::VarHandleKey &	hndl,
		const std::string &	doc,
		const SG::VarHandleKeyType &
	)

inlineinherited

Declare a new Gaudi property.

Parameters

name	Name of the property.
hndl	Object holding the property value.
doc	Documentation string for the property.

This is the version for types that derive from SG::VarHandleKey. The property value object is put on the input and output lists as appropriate; then we forward to the base class.

Definition at line 221 of file AthCommonDataStore.h.

   {
     this->declare(hndl);
     hndl.setOwner(this);
  
     return PBASE::declareProperty(name,hndl,doc);
   }

◆ declareProperty() [3/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty	(	const std::string &	name,
		SG::VarHandleKeyArray &	hndArr,
		const std::string &	doc,
		const SG::VarHandleKeyArrayType &
	)

inlineinherited

Definition at line 259 of file AthCommonDataStore.h.

   {
  
     // std::ostringstream ost;
     // ost << Algorithm::name() << " VHKA declareProp: " << name 
     //     << " size: " << hndArr.keys().size() 
     //     << " mode: " << hndArr.mode() 
     //     << "  vhka size: " << m_vhka.size()
     //     << "\n";
     // debug() << ost.str() << endmsg;
  
     hndArr.setOwner(this);
     m_vhka.push_back(&hndArr);
  
     Gaudi::Details::PropertyBase* p =  PBASE::declareProperty(name, hndArr, doc);
     if (p != 0) {
       p->declareUpdateHandler(&AthCommonDataStore<PBASE>::updateVHKA, this);
     } else {
       ATH_MSG_ERROR("unable to call declareProperty on VarHandleKeyArray " 
                     << name);
     }
  
     return p;
  
   }

◆ declareProperty() [4/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty	(	const std::string &	name,
		T &	property,
		const std::string &	doc,
		const SG::NotHandleType &
	)

inlineinherited

Declare a new Gaudi property.

Parameters

name	Name of the property.
property	Object holding the property value.
doc	Documentation string for the property.

This is the generic version, for types that do not derive from SG::VarHandleKey. It just forwards to the base class version of declareProperty.

Definition at line 333 of file AthCommonDataStore.h.

   {
     return PBASE::declareProperty(name, property, doc);
   }

◆ declareProperty() [5/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty	(	const std::string &	name,
		T &	property,
		const std::string &	doc = `"none"`
	)

inlineinherited

Declare a new Gaudi property.

Parameters

name	Name of the property.
property	Object holding the property value.
doc	Documentation string for the property.

This dispatches to either the generic declareProperty or the one for VarHandle/Key/KeyArray.

Definition at line 352 of file AthCommonDataStore.h.

   {
     typedef typename SG::HandleClassifier<T>::type htype;
     return declareProperty (name, property, doc, htype());
   }

◆ declareProperty() [6/6]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( Gaudi::Property< T, V, H > & t )

inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

                                                                      {
     typedef typename SG::HandleClassifier<T>::type htype;
     return AthCommonDataStore<PBASE>::declareGaudiProperty(t, htype());
   }

◆ detStore()

const ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::detStore ( ) const

inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

95 { return m_detStore; }

◆ evtStore() [1/2]

ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::evtStore ( )

inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

85 { return m_evtStore; }

◆ evtStore() [2/2]

const ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::evtStore ( ) const

inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 90 of file AthCommonDataStore.h.

90 { return m_evtStore; }

◆ execute()

StatusCode FPGATrackSimLogicalHitsProcessAlg::execute ( )

overridevirtual

Definition at line 114 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

 {
     const EventContext& ctx = getContext();
  
     // Get reference to hits from StoreGate.
     SG::ReadHandle<FPGATrackSimHitCollection> FPGAHits(m_FPGAHitKey, ctx);
     if (!FPGAHits.isValid()) {
         if (m_evt == 0) {
             ATH_MSG_WARNING("Didn't receive " << FPGAHits.key() << " on first event; assuming no input events.");
         }
         SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
         if (!appMgr) {
             ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
             return StatusCode::FAILURE;
         }
         return appMgr->stopRun();
     }
  
     // Set up write handles.
     SG::WriteHandle<FPGATrackSimHitCollection> FPGAHits_2nd (m_FPGAHitKey_2nd,ctx);
     SG::WriteHandle<FPGATrackSimRoadCollection> FPGARoads_1st (m_FPGARoadKey, ctx);
     SG::WriteHandle<FPGATrackSimHitContainer> FPGAHitsInRoads_1st (m_FPGAHitInRoadsKey, ctx);
  
     ATH_CHECK( FPGAHits_2nd.record (std::make_unique<FPGATrackSimHitCollection>()));
     ATH_CHECK( FPGARoads_1st.record (std::make_unique<FPGATrackSimRoadCollection>()));
     ATH_CHECK( FPGAHitsInRoads_1st.record (std::make_unique<FPGATrackSimHitContainer>()));
  
     SG::WriteHandle<FPGATrackSimTrackCollection> FPGATracks_1stHandle (m_FPGATrackKey, ctx);
     ATH_CHECK(FPGATracks_1stHandle.record (std::make_unique<FPGATrackSimTrackCollection>()));
  
     SG::WriteHandle<FPGATrackSimHitCollection> FPGAHitsFiltered_1st (m_FPGAHitFilteredKey, ctx);
     ATH_CHECK( FPGAHitsFiltered_1st.record (std::make_unique<FPGATrackSimHitCollection>()));
  
     SG::WriteHandle<FPGATrackSimClusterCollection> FPGASpacePoints (m_FPGASpacePointsKey, ctx);
     ATH_CHECK( FPGASpacePoints.record (std::make_unique<FPGATrackSimClusterCollection>()));
  
     // Query the event selection service to make sure this event passed cuts.
     if (!m_evtSel->getSelectedEvent()) {
         return StatusCode::SUCCESS;
     }
     ATH_MSG_INFO("Event accepted by: " << m_evtSel->name());
  
     // Event passes cuts, count it. technically, DataPrep does this now.
     m_evt++;
  
     // Read event info structure. all we need this for is to propagate to our event info structures.
     SG::ReadHandle<FPGATrackSimEventInfo> FPGAEventInfo(m_FPGAEventInfoKey, ctx);
     if (!FPGAEventInfo.isValid()) {
         ATH_MSG_ERROR("Could not find FPGA Event Info with key " << FPGAEventInfo.key());
         return StatusCode::FAILURE;
     }
     FPGATrackSimEventInfo eventInfo = *FPGAEventInfo.cptr();
     m_slicedFirstPixelHeader->newEvent(eventInfo);
     m_slicedSecondPixelHeader->newEvent(eventInfo);
     m_slicedStripHeader->newEvent(eventInfo);
     m_slicedStripHeaderPreSP->newEvent(eventInfo);
  
     if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: Split hits to 1st and 2nd stage");
  
     std::vector<std::shared_ptr<const FPGATrackSimHit>> phits_output, phits_all, phits_1st, phits_2nd;
     phits_1st.reserve(FPGAHits->size());
     phits_2nd.reserve(FPGAHits->size());
     ATH_MSG_DEBUG("Incoming Hits: " << FPGAHits->size());
     for (const FPGATrackSimHit& hit : *(FPGAHits.cptr())) {
         phits_all.emplace_back(&hit, [](const FPGATrackSimHit*){});
     }
  
     // Use the slicing engine tool to do the stage-based separation. Does not use the pmap.
     m_slicingEngineTool->sliceHits(phits_all, phits_1st, phits_2nd);
     if(m_writeOutputData) *m_slicedStripHeaderPreSP = *m_slicedStripHeader;
  
     // The slicing engine puts strip hits into a logical event input header. That header now needs to go
     // to the spacepoint tool if it's turned on. Those hits then get added to phits_1st or phits_2nd as appropriate.
     if (m_doSpacepoints) {
         m_spacepoints.clear();
         if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: SP fornmation");
         ATH_CHECK(m_spacepointsTool->DoSpacePoints(*m_slicedStripHeader, m_spacepoints));
         if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: SP fornmation");
         for (const FPGATrackSimCluster& cluster : m_spacepoints) FPGASpacePoints->push_back(cluster);
     }
  
     // Use a property to control whether the strips/SPs go to 1st or second stage.
     for (const FPGATrackSimHit& hit : m_slicedStripHeader->towers().at(0).hits()) {
         (m_secondStageStrips ? phits_2nd : phits_1st).emplace_back(&hit, [](const FPGATrackSimHit*){});
     }
     for (auto& hit : phits_2nd) {
         FPGAHits_2nd->push_back(*hit);
     }
  
     // Add all hits including SPs to this for the HoughRootOutputTool
     for (const FPGATrackSimHit& hit : *(FPGAHits_2nd.cptr())) {
         phits_output.emplace_back(&hit, [](const FPGATrackSimHit*){});
     }
  
     if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: Split hits to 1st and 2nd stage");
     ATH_MSG_DEBUG("1st stage hits: " << phits_1st.size() << "          2nd stage hits: " << phits_2nd.size() );
     if (phits_1st.empty()) return StatusCode::SUCCESS;
     // Get truth tracks from DataPrep as well.
     SG::ReadHandle<FPGATrackSimTruthTrackCollection> FPGATruthTracks(m_FPGATruthTrackKey, ctx);
     if (!FPGATruthTracks.isValid()) {
         ATH_MSG_ERROR("Could not find FPGA Truth Track Collection with key " << FPGATruthTracks.key());
         return StatusCode::FAILURE;
     }
  
     // Same for offline tracks.
     SG::ReadHandle<FPGATrackSimOfflineTrackCollection> FPGAOfflineTracks(m_FPGAOfflineTrackKey, ctx);
     if (!FPGAOfflineTracks.isValid()) {
         ATH_MSG_ERROR("Could not find FPGA Offline Track Collection with key " << FPGAOfflineTracks.key());
         return StatusCode::FAILURE;
     }
  
     if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: GetRoads");
     // Get roads
     std::vector<std::shared_ptr<const FPGATrackSimRoad>> roads_1st;
     ATH_CHECK(m_roadFinderTool->getRoads(phits_1st, roads_1st, *(FPGATruthTracks.cptr())));
  
     ATH_MSG_DEBUG("Looping over " << roads_1st.size() << " roads");
     auto mon_nroads_1st = Monitored::Scalar<unsigned>("nroads_1st", roads_1st.size());
     for (auto const &road : roads_1st) {
       unsigned bitmask = road->getHitLayers();
       for (size_t l = 0; l < m_FPGATrackSimMapping->PlaneMap_1st(0)->getNLogiLayers(); l++) {
         if (bitmask & (1 << l)) {
             auto mon_layerIDs_1st = Monitored::Scalar<unsigned>("layerIDs_1st",l);
             Monitored::Group(m_monTool,mon_layerIDs_1st);
         }
       }
     }
     Monitored::Group(m_monTool, mon_nroads_1st);
     if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: GetRoads");
     
     // Standard road Filter
     if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: RoadFiltering");
     std::vector<std::shared_ptr<const FPGATrackSimRoad>> postfilter_roads;
     if (m_filterRoads)
     {
         ATH_CHECK(m_roadFilterTool->filterRoads(roads_1st, postfilter_roads));
         roads_1st = std::move(postfilter_roads);
     }
     if (m_doOverlapRemoval) ATH_CHECK(m_overlapRemovalTool_1st->runOverlapRemoval(roads_1st));
     // Road Filter2
     std::vector<std::shared_ptr<const FPGATrackSimRoad>> postfilter2_roads;
     if (m_filterRoads2) {
         ATH_CHECK(m_roadFilterTool2->filterRoads(roads_1st, postfilter2_roads));
         roads_1st = std::move(postfilter2_roads);
     }
  
     auto mon_nroads_1st_postfilter = Monitored::Scalar<unsigned>("nroads_1st_postfilter", roads_1st.size());
     Monitored::Group(m_monTool, mon_nroads_1st_postfilter);
     if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: RoadFiltering");
     if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: Tracking");
  
     // Get tracks
     std::vector<FPGATrackSimTrack> tracks_1st;
     if (m_doTracking) {
         if (m_doNNTrack) {
             ATH_MSG_DEBUG("Performing NN tracking");
             ATH_CHECK(m_NNTrackTool->getTracks_1st(roads_1st, tracks_1st));
         } else {
             ATH_MSG_DEBUG("Performing Linear tracking");
             if (m_passLowestChi2TrackOnly) { // Pass only the lowest chi2 track per road
                 // Loop over roads and keep only the best track for each road
                 for (const auto& road : roads_1st) {
                     std::vector<FPGATrackSimTrack> tracksForCurrentRoad;
  
                     // Collect tracks for this road
                     std::vector<std::shared_ptr<const FPGATrackSimRoad>> roadVec = {road};
                     ATH_CHECK(m_trackFitterTool_1st->getTracks(roadVec, tracksForCurrentRoad, m_evtSel->getMin(), m_evtSel->getMax()));
  
                     // Find the best track for this road
                     if (!tracksForCurrentRoad.empty()) {
                         auto bestTrackIter = std::min_element(
                             tracksForCurrentRoad.begin(), tracksForCurrentRoad.end(),
                             [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
                                 return a.getChi2ndof() < b.getChi2ndof();
                             });
  
                         if (bestTrackIter != tracksForCurrentRoad.end() && bestTrackIter->getChi2ndof() < 1.e15) {
                             tracks_1st.push_back(*bestTrackIter);
  
                             // Monitor chi2 of the best track
                             auto mon_chi2_1st = Monitored::Scalar<float>("chi2_1st_all", bestTrackIter->getChi2ndof());
                             Monitored::Group(m_monTool, mon_chi2_1st);
                         }
                     }
                 }
                 // Monitor the best chi2 (from all tracks across all roads)
                 if (!tracks_1st.empty()) {
                     float bestChi2Overall = std::min_element(
                         tracks_1st.begin(), tracks_1st.end(),
                         [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
                             return a.getChi2ndof() < b.getChi2ndof();
                         })->getChi2ndof();
  
                     auto mon_best_chi2_1st = Monitored::Scalar<float>("best_chi2_1st", bestChi2Overall);
                     Monitored::Group(m_monTool, mon_best_chi2_1st);
                 }
             } else { // Pass all tracks with chi2 < 1e15
           ATH_CHECK(m_trackFitterTool_1st->getTracks(roads_1st, tracks_1st, m_evtSel->getMin(), m_evtSel->getMax()));
                 float bestchi2 = 1.e15;
                 for (const FPGATrackSimTrack& track : tracks_1st) {
                     float chi2 = track.getChi2ndof();
                     if (chi2 < bestchi2) bestchi2 = chi2;
                     auto mon_chi2_1st = Monitored::Scalar<float>("chi2_1st_all", chi2);
                     Monitored::Group(m_monTool, mon_chi2_1st);
                 }
                 auto mon_best_chi2_1st = Monitored::Scalar<float>("best_chi2_1st", bestchi2);
                 Monitored::Group(m_monTool, mon_best_chi2_1st);
             }
         }
     } else { // No tracking; 
       ATH_MSG_DEBUG("No tracking. Just running dummy road2track algorith");
       roadsToTrack(roads_1st, tracks_1st, m_FPGATrackSimMapping->PlaneMap_1st(0));
     }
  
     std::vector<FPGATrackSimTruthTrack> truthtracks = *FPGATruthTracks;
     std::vector<FPGATrackSimOfflineTrack> offlineTracks = *FPGAOfflineTracks;
     //Loop over tracks and set the region for all of them, also optionally set track parameters to truth
     for (FPGATrackSimTrack& track : tracks_1st) {
         track.setRegion(m_region);
     if (m_SetTruthParametersForTracks >= 0 && truthtracks.size() > 0) {
       if (m_SetTruthParametersForTracks != 0)
         track.setQOverPt(truthtracks.front().getQOverPt());
       else if   (m_SetTruthParametersForTracks != 1)
         track.setD0(truthtracks.front().getD0());
       else if (m_SetTruthParametersForTracks != 2)
         track.setPhi(truthtracks.front().getPhi());
       else if (m_SetTruthParametersForTracks != 3)
         track.setZ0(truthtracks.front().getZ0());
       else if (m_SetTruthParametersForTracks != 4)
         track.setEta(truthtracks.front().getEta());
     }
     }
     // Loop over roads and store them in SG (after track finding to also copy the sector information)
     for (auto const& road : roads_1st) {
         std::vector<FPGATrackSimHit> road_hits;
         ATH_MSG_DEBUG("Hough Road X Y: " << road->getX() << " " << road->getY());
         for (size_t l = 0; l < road->getNLayers(); ++l) {
             for (const auto& layerH : road->getHits(l)) {
                 road_hits.push_back(*layerH);
             }
         }
         FPGAHitsInRoads_1st->push_back(road_hits);
         FPGARoads_1st->push_back(*road);
     }
     if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: Tracking");
  
     // Monitor the number of tracks
     auto mon_ntracks_1st = Monitored::Scalar<unsigned>("ntrack_1st", tracks_1st.size());
     Monitored::Group(m_monTool, mon_ntracks_1st);
     if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: OverlapRemoval");
     // Overlap removal
     if (m_doOverlapRemoval)  ATH_CHECK(m_overlapRemovalTool_1st->runOverlapRemoval(tracks_1st));
  
     unsigned ntrackOLRChi2 = 0;
     for (const FPGATrackSimTrack& track : tracks_1st) {
       if (track.getChi2ndof() < m_trackScoreCut.value()) {
             m_nTracksChi2Tot++;
             if (track.passedOR()) {
                 ntrackOLRChi2++;
                 m_nTracksChi2OLRTot++;
  
                 // For tracks passing overlap removal-- record the chi2 so we can figure out the right cut.
                 float chi2olr = track.getChi2ndof();
                 auto mon_chi2_1st_or = Monitored::Scalar<float>("chi2_1st_afterOLR", chi2olr);
                 Monitored::Group(m_monTool, mon_chi2_1st_or);
             }
         }
     }
     if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: OverlapRemoval");
     auto mon_ntracks_1st_olr = Monitored::Scalar<unsigned>("ntrack_1st_afterOLR", ntrackOLRChi2);
     Monitored::Group(m_monTool,mon_ntracks_1st_olr);
  
     m_nRoadsTot += roads_1st.size();
     m_nTracksTot += tracks_1st.size();
  
     // Do some simple monitoring of efficiencies. okay, we need truth tracks here.
     if (truthtracks.size() > 0) {
         m_evt_truth++;
         auto passroad = Monitored::Scalar<bool>("eff_road",(roads_1st.size() > 0));
         auto passtrack = Monitored::Scalar<bool>("eff_track",(tracks_1st.size() > 0));
         auto truthpT_zoom = Monitored::Scalar<float>("pT_zoom",truthtracks.front().getPt()*0.001);
         auto truthpT = Monitored::Scalar<float>("pT",truthtracks.front().getPt()*0.001);
         auto trutheta = Monitored::Scalar<float>("eta",truthtracks.front().getEta());
         auto truthphi= Monitored::Scalar<float>("phi",truthtracks.front().getPhi());
         auto truthd0= Monitored::Scalar<float>("d0",truthtracks.front().getD0());
         auto truthz0= Monitored::Scalar<float>("z0",truthtracks.front().getZ0());
         if (roads_1st.size() > 0) m_nRoadsFound++;
     if (roads_1st.size() > m_maxNRoadsFound) m_maxNRoadsFound = roads_1st.size();
  
         unsigned npasschi2(0);
         unsigned npasschi2OLR(0);
         if (tracks_1st.size() > 0) {
             m_nTracksFound++;
         if (tracks_1st.size() > m_maxNTracksTot) m_maxNTracksTot = tracks_1st.size();
             for (const auto& track : tracks_1st) {
           if (track.getChi2ndof() < m_trackScoreCut.value()) {
           npasschi2++;
                     if (track.passedOR()) {
               npasschi2OLR++;
                     }
                 }
             }
         }
     if (npasschi2 > m_maxNTracksChi2Tot) m_maxNTracksChi2Tot = npasschi2;
     if (npasschi2OLR > m_maxNTracksChi2OLRTot) m_maxNTracksChi2OLRTot = npasschi2OLR;
         if (npasschi2 > 0) m_nTracksChi2Found++;
         if (npasschi2OLR > 0) m_nTracksChi2OLRFound++;
         auto passtrackchi2 = Monitored::Scalar<bool>("eff_track_chi2",(npasschi2 > 0));
         Monitored::Group(m_monTool,passroad,passtrack,truthpT_zoom,truthpT,trutheta,truthphi,truthd0,truthz0,passtrackchi2);
     }
  
     for (const FPGATrackSimTrack& track : tracks_1st) FPGATracks_1stHandle->push_back(track);
  
     // Now, we may want to do large-radius tracking on the hits not used by the first stage tracking.
     // This follows overlap removal.
     std::vector<std::shared_ptr<const FPGATrackSimRoad>> roadsLRT;
     std::vector<FPGATrackSimTrack> tracksLRT; // currently empty
     if (m_doLRT) {
         // Filter out hits that are on successful first-stage tracks
         std::vector<std::shared_ptr<const FPGATrackSimHit>> remainingHits;
  
         if (m_doLRTHitFiltering) {
             ATH_MSG_DEBUG("Doing hit filtering based on prompt tracks.");
             ATH_CHECK(m_LRTRoadFilterTool->filterUsedHits(tracks_1st, phits_1st, remainingHits));
  
             for (const auto &Hit : remainingHits) FPGAHitsFiltered_1st->push_back(*Hit);
  
         } else {
             ATH_MSG_DEBUG("No hit filtering requested; using all hits for LRT.");
             remainingHits = phits_1st;
         }
  
         // Get LRT roads with remaining hits
         ATH_MSG_DEBUG("Finding LRT roads");
         ATH_CHECK(m_LRTRoadFinderTool->getRoads( remainingHits, roadsLRT ));
     }
  
     auto dataFlowInfo = std::make_unique<FPGATrackSimDataFlowInfo>();
  
     // Write the output and reset
     if (m_writeOutputData)  {
         ATH_CHECK(writeOutputData(roads_1st, tracks_1st, dataFlowInfo.get()));
     }
  
     // This one we can do-- by passing in truth and offline tracks via storegate above.
     if (m_doHoughRootOutput1st) {
         ATH_MSG_DEBUG("Running HoughRootOutputTool in 1st stage.");
  
         SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
         if (!appMgr) {
             ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
             return StatusCode::FAILURE;
         }
  
         // Create output ROOT file
         ATH_CHECK(m_houghRootOutputTool->fillTree(roads_1st, truthtracks, offlineTracks, phits_output, m_writeOutNonSPStripHits, m_trackScoreCut.value(), m_NumOfHitPerGrouping, false));
     }
  
     // Reset data pointers
     if (m_outputRoadUnionTool) m_slicedHitHeader->reset();
     m_logicEventOutputHeader->reset();
  
     return StatusCode::SUCCESS;
 }

◆ extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase & ExtraDeps )

protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

◆ extraOutputDeps()

const DataObjIDColl & AthAlgorithm::extraOutputDeps ( ) const

overridevirtualinherited

Return the list of extra output dependencies.

This list is extended to include symlinks implied by inheritance relations.

Definition at line 50 of file AthAlgorithm.cxx.

 {
   // If we didn't find any symlinks to add, just return the collection
   // from the base class.  Otherwise, return the extended collection.
   if (!m_extendedExtraObjects.empty()) {
     return m_extendedExtraObjects;
   }
   return Algorithm::extraOutputDeps();
 }

◆ finalize()

StatusCode FPGATrackSimLogicalHitsProcessAlg::finalize ( )

overridevirtual

Definition at line 517 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

 {
     ATH_MSG_INFO("PRINTING FPGATRACKSIM SIMPLE STATS");
     ATH_MSG_INFO("========================================================================================");
     ATH_MSG_INFO("Ran on events = " << m_evt);
     ATH_MSG_INFO("Inclusive efficiency to find a road = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nRoadsFound/(float)m_evt_truth)));
     ATH_MSG_INFO("Inclusive efficiency to find a track = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksFound/(float)m_evt_truth)));
     ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2Found/(float)m_evt_truth)));
     ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 and OLR = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRFound/(float)m_evt_truth)));
  
  
     ATH_MSG_INFO("Number of 1st stage roads/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nRoadsTot/(float)m_evt)));
     ATH_MSG_INFO("Number of 1st stage track combinations/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksTot/(float)m_evt)));
     ATH_MSG_INFO("Number of 1st stage tracks passing chi2/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2Tot/(float)m_evt)));
     ATH_MSG_INFO("Number of 1st stage tracks passing chi2 and OLR/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRTot/(float)m_evt)));
     ATH_MSG_INFO("========================================================================================");
  
     ATH_MSG_INFO("Max number of 1st stage roads in an event = " << m_maxNRoadsFound);
     ATH_MSG_INFO("Max number of 1st stage track combinations in an event = " << m_maxNTracksTot);
     ATH_MSG_INFO("Max number of 1st stage tracks passing chi2 in an event = " << m_maxNTracksChi2Tot);
     ATH_MSG_INFO("Max number of 1st stage tracks passing chi2 and OLR in an event = " << m_maxNTracksChi2OLRTot);
     ATH_MSG_INFO("========================================================================================");
  
     return StatusCode::SUCCESS;
 }

◆ initialize()

StatusCode FPGATrackSimLogicalHitsProcessAlg::initialize ( )

overridevirtual

Definition at line 43 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

 {
     std::stringstream ss(m_description);
     std::string line;
     ATH_MSG_INFO("Tag config:");
     if (!m_description.empty()) {
         while (std::getline(ss, line, '\n')) {
             ATH_MSG_INFO('\t' << line);
         }
     }
     ATH_CHECK(m_roadFinderTool.retrieve());
     ATH_CHECK(m_LRTRoadFilterTool.retrieve(EnableTool{m_doLRT}));
     ATH_CHECK(m_LRTRoadFinderTool.retrieve(EnableTool{m_doLRT}));
     ATH_CHECK(m_houghRootOutputTool.retrieve(EnableTool{m_doHoughRootOutput1st}));
     ATH_CHECK(m_NNTrackTool.retrieve(EnableTool{m_doNNTrack}));
     ATH_CHECK(m_roadFilterTool.retrieve(EnableTool{m_filterRoads}));
     ATH_CHECK(m_roadFilterTool2.retrieve(EnableTool{m_filterRoads2}));
  
     ATH_CHECK(m_spacepointsTool.retrieve(EnableTool{m_doSpacepoints}));
  
     ATH_CHECK(m_trackFitterTool_1st.retrieve(EnableTool{m_doTracking}));
     ATH_CHECK(m_overlapRemovalTool_1st.retrieve());
     ATH_CHECK(m_writeOutputTool.retrieve());
     ATH_CHECK(m_FPGATrackSimMapping.retrieve());
     ATH_CHECK(m_slicingEngineTool.retrieve());
  
     ATH_MSG_DEBUG("initialize() Instantiating root objects");
  
     // ROOT branches created for test vectors.
     if (m_outputRoadUnionTool) m_slicedHitHeader = m_writeOutputTool->addInputBranch(m_sliceBranch.value(), true);
     m_logicEventOutputHeader = m_writeOutputTool->addOutputBranch(m_outputBranch.value(), true);
  
     // Updated slicing engine test vectors will have three streams.
     m_slicedFirstPixelHeader = m_writeOutputTool->addInputBranch(m_sliceFirstPixelBranch.value(), true);
     m_slicedSecondPixelHeader = m_writeOutputTool->addInputBranch(m_sliceSecondPixelBranch.value(), true);
     m_slicedStripHeader = m_writeOutputTool->addInputBranch(m_sliceStripBranch.value(), true);
  
     // We also need a pre- and post- SP copy of the SPs.
     m_slicedStripHeaderPreSP = m_writeOutputTool->addInputBranch(m_sliceStripBranchPreSP.value(), true);
  
     // Connect the slicing tools accordingly. We probably no longer need to hook up the roadfinder here.
     if (m_outputRoadUnionTool) m_roadFinderTool->setupSlices(m_slicedHitHeader);
     m_slicingEngineTool->setupSlices(m_slicedFirstPixelHeader, m_slicedSecondPixelHeader, m_slicedStripHeader);
  
     ATH_MSG_DEBUG("initialize() Setting branch");
  
     if (!m_monTool.empty())
         ATH_CHECK(m_monTool.retrieve());
  
     ATH_CHECK( m_FPGASpacePointsKey.initialize() );
     ATH_CHECK( m_FPGAHitInRoadsKey.initialize() );
     ATH_CHECK( m_FPGAHitFilteredKey.initialize() );
     ATH_CHECK( m_FPGARoadKey.initialize() );
     ATH_CHECK( m_FPGATrackKey.initialize() );
     ATH_CHECK( m_FPGAHitKey.initialize() );
     ATH_CHECK( m_FPGAHitKey_2nd.initialize() );
     ATH_CHECK( m_FPGATruthTrackKey.initialize() );
     ATH_CHECK( m_FPGAOfflineTrackKey.initialize() );
     ATH_CHECK( m_FPGAEventInfoKey.initialize() );
  
     ATH_CHECK( m_chrono.retrieve() );
     ATH_MSG_DEBUG("initialize() Finished");
  
     return StatusCode::SUCCESS;
 }

◆ inputHandles()

virtual std::vector<Gaudi::DataHandle*> AthCommonDataStore< AthCommonMsg< Algorithm > >::inputHandles ( ) const

overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ msg() [1/2]

MsgStream& AthCommonMsg< Algorithm >::msg ( ) const

inlineinherited

Definition at line 24 of file AthCommonMsg.h.

                                 {
     return this->msgStream();
   }

◆ msg() [2/2]

MsgStream& AthCommonMsg< Algorithm >::msg ( const MSG::Level lvl ) const

inlineinherited

Definition at line 27 of file AthCommonMsg.h.

                                                   {
     return this->msgStream(lvl);
   }

◆ msgLvl()

bool AthCommonMsg< Algorithm >::msgLvl ( const MSG::Level lvl ) const

inlineinherited

Definition at line 30 of file AthCommonMsg.h.

                                                {
     return this->msgLevel(lvl);
   }

◆ outputHandles()

virtual std::vector<Gaudi::DataHandle*> AthCommonDataStore< AthCommonMsg< Algorithm > >::outputHandles ( ) const

overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ printHitSubregions()

void FPGATrackSimLogicalHitsProcessAlg::printHitSubregions ( std::vector< FPGATrackSimHit > const & hits )

private

Definition at line 547 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

 {
     ATH_MSG_WARNING("Hit regions:");
     for (const auto& hit : hits)
     {
         std::vector<uint32_t> regions = m_FPGATrackSimMapping->SubRegionMap()->getRegions(hit);
         std::stringstream ss;
         for (auto r : regions)
             ss << r << ",";
         ATH_MSG_WARNING("\t[" << ss.str() << "]");
     }
 }

◆ renounce()

std::enable_if_t<std::is_void_v<std::result_of_t<decltype(&T::renounce)(T)> > && !std::is_base_of_v<SG::VarHandleKeyArray, T> && std::is_base_of_v<Gaudi::DataHandle, T>, void> AthCommonDataStore< AthCommonMsg< Algorithm > >::renounce ( T & h )

inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

   {
     h.renounce();
     PBASE::renounce (h);
   }

◆ renounceArray()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::renounceArray ( SG::VarHandleKeyArray & handlesArray )

inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

                                                           {
     handlesArray.renounce();
   }

◆ sysInitialize()

StatusCode AthAlgorithm::sysInitialize ( )

overridevirtualinherited

Override sysInitialize.

Override sysInitialize from the base class.

Loop through all output handles, and if they're WriteCondHandles, automatically register them and this Algorithm with the CondSvc

Scan through all outputHandles, and if they're WriteCondHandles, register them with the CondSvc

Reimplemented from AthCommonDataStore< AthCommonMsg< Algorithm > >.

Reimplemented in AthAnalysisAlgorithm, AthFilterAlgorithm, PyAthena::Alg, and AthHistogramAlgorithm.

Definition at line 66 of file AthAlgorithm.cxx.

                                        {
   StatusCode sc=AthCommonDataStore<AthCommonMsg<Algorithm>>::sysInitialize();
  
   if (sc.isFailure()) {
     return sc;
   }
   ServiceHandle<ICondSvc> cs("CondSvc",name());
   for (auto h : outputHandles()) {
     if (h->isCondition() && h->mode() == Gaudi::DataHandle::Writer) {
       // do this inside the loop so we don't create the CondSvc until needed
       if ( cs.retrieve().isFailure() ) {
         ATH_MSG_WARNING("no CondSvc found: won't autoreg WriteCondHandles");
         return StatusCode::SUCCESS;
       }
       if (cs->regHandle(this,*h).isFailure()) {
         sc = StatusCode::FAILURE;
         ATH_MSG_ERROR("unable to register WriteCondHandle " << h->fullKey()
                       << " with CondSvc");
       }
     }
   }
   return sc;
 }

◆ sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< Algorithm > >::sysStart ( )

overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

◆ updateVHKA()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::updateVHKA ( Gaudi::Details::PropertyBase & )

inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

                                                {
     // debug() << "updateVHKA for property " << p.name() << " " << p.toString() 
     //         << "  size: " << m_vhka.size() << endmsg;
     for (auto &a : m_vhka) {
       std::vector<SG::VarHandleKey*> keys = a->keys();
       for (auto k : keys) {
         k->setOwner(this);
       }
     }
   }

◆ writeOutputData()

StatusCode FPGATrackSimLogicalHitsProcessAlg::writeOutputData	(	const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &	roads_1st,
		std::vector< FPGATrackSimTrack > const &	tracks_1st,
		FPGATrackSimDataFlowInfo const *	dataFlowInfo
	)

private

Definition at line 484 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

 {
   m_logicEventOutputHeader->reset();
  
   ATH_MSG_DEBUG("NFPGATrackSimRoads_1st = " << roads_1st.size() << ", NFPGATrackSimTracks_1st = " << tracks_1st.size());
  
   if (!m_writeOutputData) return StatusCode::SUCCESS;
     m_logicEventOutputHeader->reserveFPGATrackSimRoads_1st(roads_1st.size());
     m_logicEventOutputHeader->addFPGATrackSimRoads_1st(roads_1st);
   if (m_doTracking) {
     m_logicEventOutputHeader->reserveFPGATrackSimTracks_1st(tracks_1st.size());
     m_logicEventOutputHeader->addFPGATrackSimTracks_1st(tracks_1st);
   }
  
  
   m_logicEventOutputHeader->setDataFlowInfo(*dataFlowInfo);
   ATH_MSG_DEBUG(m_logicEventOutputHeader->getDataFlowInfo());
  
   // It would be nice to rearrange this so both algorithms use one instance of this tool, I think.
   // Which means that dataprep can't call writeData because that does Fill().
   ATH_CHECK(m_writeOutputTool->writeData());
  
  
  
   return StatusCode::SUCCESS;
 }

Member Data Documentation

◆ m_chrono

ServiceHandle<IChronoStatSvc> FPGATrackSimLogicalHitsProcessAlg::m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}

private

Definition at line 98 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_description

std::string FPGATrackSimLogicalHitsProcessAlg::m_description

private

Definition at line 80 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_detStore

privateinherited

Pointer to StoreGate (detector store by default)

Definition at line 393 of file AthCommonDataStore.h.

◆ m_doHoughRootOutput1st

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doHoughRootOutput1st {this, "DoHoughRootOutput1st", false, "Dump output from the Hough Transform to flat ntuples"}

private

Definition at line 108 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doLRT

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doLRT {this, "doLRT", false, "Enable Large Radius Tracking"}

private

Definition at line 110 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doLRTHitFiltering

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doLRTHitFiltering {this, "LRTHitFiltering", false, "flag to enable hit/cluster filtering for LRT"}

private

Definition at line 111 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doMissingHitsChecks

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}

private

Definition at line 105 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doNNTrack

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doNNTrack {this, "DoNNTrack_1st", false, "Run NN track filtering for 1st stage"}

private

Definition at line 109 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doOverlapRemoval

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doOverlapRemoval {this, "doOverlapRemoval", true , "flag to enable the overlap removal"}

private

Definition at line 104 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doSpacepoints

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}

private

Definition at line 102 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doTracking

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doTracking {this, "tracking", false, "flag to enable the tracking"}

private

Definition at line 103 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evt

double FPGATrackSimLogicalHitsProcessAlg::m_evt = 0

private

Definition at line 142 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evt_truth

double FPGATrackSimLogicalHitsProcessAlg::m_evt_truth = 0

private

Definition at line 148 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evtSel

ServiceHandle<IFPGATrackSimEventSelectionSvc> FPGATrackSimLogicalHitsProcessAlg::m_evtSel {this, "eventSelector", "", "Event selection Svc"}

private

Definition at line 96 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_evtStore

privateinherited

Pointer to StoreGate (event store by default)

Definition at line 390 of file AthCommonDataStore.h.

◆ m_extendedExtraObjects

DataObjIDColl AthAlgorithm::m_extendedExtraObjects

privateinherited

Definition at line 79 of file AthAlgorithm.h.

◆ m_filterRoads

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_filterRoads {this, "FilterRoads", false, "enable first road filter"}

private

Definition at line 106 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_filterRoads2

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}

private

Definition at line 107 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAEventInfoKey

SG::ReadHandleKey<FPGATrackSimEventInfo> FPGATrackSimLogicalHitsProcessAlg::m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}

private

Definition at line 182 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitFilteredKey

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitFilteredKey {this, "FPGATrackSimHitFiltered1stKey","FPGAHitsFiltered_1st","FPGATrackSim Filtered Hits 1st stage key"}

private

Definition at line 175 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitInRoadsKey

SG::WriteHandleKey<FPGATrackSimHitContainer> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitInRoadsKey {this, "FPGATrackSimHitInRoads1stKey","FPGAHitsInRoads_1st","FPGATrackSim Hits in 1st stage roads key"}

private

Definition at line 176 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey

SG::ReadHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey {this, "FPGATrackSimHitKey","FPGAHits", "FPGATrackSim hits key"}

private

Definition at line 168 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey_2nd

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_2nd {this, "FPGATrackSimHitKey_2nd","FPGAHits_2nd","FPGATrackSim 2nd stage hits key"}

private

Definition at line 174 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAOfflineTrackKey

SG::ReadHandleKey<FPGATrackSimOfflineTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}

private

Definition at line 181 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGARoadKey

SG::WriteHandleKey<FPGATrackSimRoadCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGARoadKey {this, "FPGATrackSimRoad1stKey","FPGARoads_1st","FPGATrackSim Roads 1st stage key"}

private

Definition at line 177 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGASpacePointsKey

SG::WriteHandleKey<FPGATrackSimClusterCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGASpacePointsKey {this, "FPGATrackSimSpacePoints1stKey","FPGASpacePoints_1st","FPGATrackSim SpacePoints key"}

private

Definition at line 171 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATrackKey

SG::WriteHandleKey<FPGATrackSimTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackKey {this, "FPGATrackSimTrack1stKey","FPGATracks_1st","FPGATrackSim Tracks 1st stage key"}

private

Definition at line 178 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATrackSimMapping

ServiceHandle<IFPGATrackSimMappingSvc> FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}

private

Definition at line 95 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATruthTrackKey

SG::ReadHandleKey<FPGATrackSimTruthTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}

private

Definition at line 180 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_houghRootOutputTool

ToolHandle<FPGATrackSimHoughRootOutputTool> FPGATrackSimLogicalHitsProcessAlg::m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}

private

Definition at line 90 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_logicEventOutputHeader

FPGATrackSimLogicalEventOutputHeader* FPGATrackSimLogicalHitsProcessAlg::m_logicEventOutputHeader = nullptr

private

Definition at line 135 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_LRTRoadFilterTool

ToolHandle<FPGATrackSimLLPRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFilterTool {this, "LRTRoadFilter", "FPGATrackSimLLPRoadFilterTool/FPGATrackSimLLPRoadFilterTool", "LRT Road Filter Tool"}

private

Definition at line 85 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_LRTRoadFinderTool

ToolHandle<IFPGATrackSimRoadFinderTool> FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFinderTool {this, "LRTRoadFinder", "FPGATrackSimHoughTransform_d0phi0_Tool/FPGATrackSimHoughTransform_d0phi0_Tool", "LRT Road Finder Tool"}

private

Definition at line 86 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNRoadsFound

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNRoadsFound = 0

private

Definition at line 154 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksChi2OLRTot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2OLRTot = 0

private

Definition at line 157 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksChi2Tot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2Tot = 0

private

Definition at line 156 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksTot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksTot = 0

private

Definition at line 155 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_monTool

ToolHandle<GenericMonitoringTool> FPGATrackSimLogicalHitsProcessAlg::m_monTool {this,"MonTool", "", "Monitoring tool"}

private

Definition at line 165 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_NNTrackTool

ToolHandle<FPGATrackSimNNTrackTool> FPGATrackSimLogicalHitsProcessAlg::m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool", "NN Track Tool"}

private

Definition at line 89 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nRoadsFound

long FPGATrackSimLogicalHitsProcessAlg::m_nRoadsFound = 0

private

Definition at line 149 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nRoadsTot

long FPGATrackSimLogicalHitsProcessAlg::m_nRoadsTot = 0

private

Definition at line 143 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2Found

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Found = 0

private

Definition at line 151 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2OLRFound

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRFound = 0

private

Definition at line 152 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2OLRTot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRTot = 0

private

Definition at line 146 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2Tot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Tot = 0

private

Definition at line 145 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksFound

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksFound = 0

private

Definition at line 150 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksTot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksTot = 0

private

Definition at line 144 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_NumOfHitPerGrouping

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}

private

Definition at line 115 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_outputBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }

private

Definition at line 123 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_outputRoadUnionTool

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_outputRoadUnionTool {this, "outputRoadUnionTool", false, "If set to true, create LogicalEventInputHeader in output ROOT file using road union tool."}

private

Definition at line 118 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_overlapRemovalTool_1st

ToolHandle<FPGATrackSimOverlapRemovalTool> FPGATrackSimLogicalHitsProcessAlg::m_overlapRemovalTool_1st {this, "OverlapRemoval_1st", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_1st", "1st stage overlap removal tool"}

private

Definition at line 92 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_passLowestChi2TrackOnly

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_passLowestChi2TrackOnly {this,"passLowestChi2TrackOnly", false, "case when passing only lowest chi2 track per road"}

private

Definition at line 116 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_region

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_region {this, "Region", 0, "Region ID to assign to tracks"}

private

Definition at line 119 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFilterTool

ToolHandle<IFPGATrackSimRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool {this, "RoadFilter", "FPGATrackSimEtaPatternFilterTool", "Road Filter Tool"}

private

Definition at line 87 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFilterTool2

ToolHandle<IFPGATrackSimRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool2 {this, "RoadFilter2", "FPGATrackSimPhiRoadFilterTool", "Road Filter2 Tool"}

private

Definition at line 88 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFinderTool

ToolHandle<FPGATrackSimRoadUnionTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFinderTool {this, "RoadFinder", "FPGATrackSimPatternMatchTool", "Road Finder Tool"}

private

Definition at line 84 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_secondStageStrips

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_secondStageStrips {this, "secondStageStrips", true, "If set to true, strip hits/SPs go to the second stage. Otherwise they go to the first." }

private

Definition at line 117 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_SetTruthParametersForTracks

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}

private

Definition at line 101 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for sliced hits in output ROOT file." }

private

Definition at line 122 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedFirstPixelHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedFirstPixelHeader = nullptr

private

Definition at line 131 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedHitHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedHitHeader = nullptr

private

Definition at line 130 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedSecondPixelHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedSecondPixelHeader = nullptr

private

Definition at line 132 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedStripHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedStripHeader = nullptr

private

Definition at line 133 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedStripHeaderPreSP

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedStripHeaderPreSP = nullptr

private

Definition at line 134 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceFirstPixelBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceFirstPixelBranch {this, "FirstPixelBranchName", "LogicalEventFirstPixelHeader", "Name of the branch for first stage pixel hits in output ROOT file"}

private

Definition at line 124 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceSecondPixelBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceSecondPixelBranch {this, "SecondPixelBranchName", "LogicalEventSecondPixelHeader", "Name of the branch for second stage pixel hits in output ROOT file"}

private

Definition at line 125 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceStripBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranch {this, "StripBranchName", "LogicalEventSpacepointHeader", "Name of the branch for (post-SP) strip hits in output ROOT file"}

private

Definition at line 126 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceStripBranchPreSP

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranchPreSP {this, "StripPreSPBranchName", "LogicalEventStripHeader", "Name of the branch for (pre-SP) strip hits in output ROOT file"}

private

Definition at line 127 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicingEngineTool

ToolHandle<FPGATrackSimSlicingEngineTool> FPGATrackSimLogicalHitsProcessAlg::m_slicingEngineTool {this, "SlicingEngineTool", "FPGATrackSimSlicingEngineTool/FPGATrackSimSlicingEngineTool", "Slicing engine tool"}

private

Definition at line 94 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_spacepoints

std::vector<FPGATrackSimCluster> FPGATrackSimLogicalHitsProcessAlg::m_spacepoints {}

private

Definition at line 139 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_spacepointsTool

ToolHandle<FPGATrackSimSpacePointsToolI> FPGATrackSimLogicalHitsProcessAlg::m_spacepointsTool {this, "SpacePointTool", "FPGATrackSimSpacePointsTool/FPGATrackSimSpacePointsTool", "Space Points Tool"}

private

Definition at line 83 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_trackFitterTool_1st

ToolHandle<FPGATrackSimTrackFitterTool> FPGATrackSimLogicalHitsProcessAlg::m_trackFitterTool_1st {this, "TrackFitter_1st", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_1st", "1st stage track fit tool"}

private

Definition at line 91 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_1st_guessedcheck

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_1st_guessedcheck

private

Definition at line 138 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_1st_nomiss

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_1st_nomiss

private

Definition at line 138 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_2nd_guessedcheck

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_2nd_guessedcheck

private

Definition at line 138 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_2nd_nomiss

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_2nd_nomiss

private

Definition at line 138 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_trackScoreCut

Gaudi::Property<float> FPGATrackSimLogicalHitsProcessAlg::m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }

private

Definition at line 113 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< Algorithm > >::m_varHandleArraysDeclared

privateinherited

Definition at line 399 of file AthCommonDataStore.h.

◆ m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< Algorithm > >::m_vhka

privateinherited

Definition at line 398 of file AthCommonDataStore.h.

◆ m_writeOutNonSPStripHits

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}

private

Definition at line 114 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeOutputData

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}

private

Definition at line 112 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeOutputTool

ToolHandle<FPGATrackSimOutputHeaderTool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}

private

Definition at line 93 of file FPGATrackSimLogicalHitsProcessAlg.h.

The documentation for this class was generated from the following files:

Public Member Functions

Protected Member Functions

Private Types

Private Member Functions

Private Attributes

Detailed Description

Member Typedef Documentation

◆ StoreGateSvc_t

Constructor & Destructor Documentation

◆ FPGATrackSimLogicalHitsProcessAlg()

◆ ~FPGATrackSimLogicalHitsProcessAlg()

Member Function Documentation

◆ declareGaudiProperty() [1/4]

◆ declareGaudiProperty() [2/4]

◆ declareGaudiProperty() [3/4]

◆ declareGaudiProperty() [4/4]

◆ declareProperty() [1/6]

◆ declareProperty() [2/6]

◆ declareProperty() [3/6]

◆ declareProperty() [4/6]

◆ declareProperty() [5/6]

◆ declareProperty() [6/6]

◆ detStore()

◆ evtStore() [1/2]

◆ evtStore() [2/2]

◆ execute()

◆ extraDeps_update_handler()

◆ extraOutputDeps()

◆ finalize()

◆ initialize()

◆ inputHandles()

◆ msg() [1/2]

◆ msg() [2/2]

◆ msgLvl()

◆ outputHandles()

◆ printHitSubregions()

◆ renounce()

◆ renounceArray()

◆ sysInitialize()

◆ sysStart()

◆ updateVHKA()

◆ writeOutputData()

Member Data Documentation

◆ m_chrono

◆ m_description

◆ m_detStore

◆ m_doHoughRootOutput1st

◆ m_doLRT

◆ m_doLRTHitFiltering

◆ m_doMissingHitsChecks

◆ m_doNNTrack

◆ m_doOverlapRemoval

◆ m_doSpacepoints

◆ m_doTracking

◆ m_evt

◆ m_evt_truth

◆ m_evtSel

◆ m_evtStore

◆ m_extendedExtraObjects

◆ m_filterRoads

◆ m_filterRoads2

◆ m_FPGAEventInfoKey

◆ m_FPGAHitFilteredKey

◆ m_FPGAHitInRoadsKey

◆ m_FPGAHitKey

◆ m_FPGAHitKey_2nd

◆ m_FPGAOfflineTrackKey

◆ m_FPGARoadKey

◆ m_FPGASpacePointsKey

◆ m_FPGATrackKey

◆ m_FPGATrackSimMapping

◆ m_FPGATruthTrackKey

◆ m_houghRootOutputTool

◆ m_logicEventOutputHeader

◆ m_LRTRoadFilterTool

◆ m_LRTRoadFinderTool

◆ m_maxNRoadsFound

◆ m_maxNTracksChi2OLRTot

◆ m_maxNTracksChi2Tot

◆ m_maxNTracksTot