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Public Member Functions | Protected Member Functions | Private Types | Private Member Functions | Private Attributes | List of all members
FPGATrackSimLogicalHitsProcessAlg Class Reference

#include <FPGATrackSimLogicalHitsProcessAlg.h>

Inheritance diagram for FPGATrackSimLogicalHitsProcessAlg:
Collaboration diagram for FPGATrackSimLogicalHitsProcessAlg:

Public Member Functions

 FPGATrackSimLogicalHitsProcessAlg (const std::string &name, ISvcLocator *pSvcLocator)
 
virtual ~FPGATrackSimLogicalHitsProcessAlg ()=default
 
virtual StatusCode initialize () override
 
virtual StatusCode execute () override
 
virtual StatusCode finalize () override
 
virtual StatusCode sysInitialize () override
 Override sysInitialize. More...
 
virtual const DataObjIDColl & extraOutputDeps () const override
 Return the list of extra output dependencies. More...
 
ServiceHandle< StoreGateSvc > & evtStore ()
 The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc. More...
 
const ServiceHandle< StoreGateSvc > & evtStore () const
 The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc. More...
 
const ServiceHandle< StoreGateSvc > & detStore () const
 The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc. More...
 
virtual StatusCode sysStart () override
 Handle START transition. More...
 
virtual std::vector< Gaudi::DataHandle * > inputHandles () const override
 Return this algorithm's input handles. More...
 
virtual std::vector< Gaudi::DataHandle * > outputHandles () const override
 Return this algorithm's output handles. More...
 
Gaudi::Details::PropertyBase & declareProperty (Gaudi::Property< T, V, H > &t)
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, SG::VarHandleKey &hndl, const std::string &doc, const SG::VarHandleKeyType &)
 Declare a new Gaudi property. More...
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, SG::VarHandleBase &hndl, const std::string &doc, const SG::VarHandleType &)
 Declare a new Gaudi property. More...
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, SG::VarHandleKeyArray &hndArr, const std::string &doc, const SG::VarHandleKeyArrayType &)
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, T &property, const std::string &doc, const SG::NotHandleType &)
 Declare a new Gaudi property. More...
 
Gaudi::Details::PropertyBase * declareProperty (const std::string &name, T &property, const std::string &doc="none")
 Declare a new Gaudi property. More...
 
void updateVHKA (Gaudi::Details::PropertyBase &)
 
MsgStream & msg () const
 
MsgStream & msg (const MSG::Level lvl) const
 
bool msgLvl (const MSG::Level lvl) const
 

Protected Member Functions

void renounceArray (SG::VarHandleKeyArray &handlesArray)
 remove all handles from I/O resolution More...
 
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > renounce (T &h)
 
void extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
 Add StoreName to extra input/output deps as needed. More...
 

Private Types

typedef ServiceHandle< StoreGateSvcStoreGateSvc_t
 

Private Member Functions

StatusCode writeOutputData (const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads_1st, std::vector< FPGATrackSimTrack > const &tracks_1st, FPGATrackSimDataFlowInfo const *dataFlowInfo)
 
void printHitSubregions (std::vector< FPGATrackSimHit > const &hits)
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
 specialization for handling Gaudi::Property<SG::VarHandleKey> More...
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyArrayType &)
 specialization for handling Gaudi::Property<SG::VarHandleKeyArray> More...
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleType &)
 specialization for handling Gaudi::Property<SG::VarHandleBase> More...
 
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &t, const SG::NotHandleType &)
 specialization for handling everything that's not a Gaudi::Property<SG::VarHandleKey> or a <SG::VarHandleKeyArray> More...
 

Private Attributes

std::string m_description
 
ToolHandle< FPGATrackSimSpacePointsToolIm_spacepointsTool {this, "SpacePointTool", "FPGATrackSimSpacePointsTool/FPGATrackSimSpacePointsTool", "Space Points Tool"}
 
ToolHandle< FPGATrackSimRoadUnionToolm_roadFinderTool {this, "RoadFinder", "FPGATrackSimPatternMatchTool", "Road Finder Tool"}
 
ToolHandle< FPGATrackSimLLPRoadFilterToolm_LRTRoadFilterTool {this, "LRTRoadFilter", "FPGATrackSimLLPRoadFilterTool/FPGATrackSimLLPRoadFilterTool", "LRT Road Filter Tool"}
 
ToolHandle< IFPGATrackSimRoadFinderToolm_LRTRoadFinderTool {this, "LRTRoadFinder", "FPGATrackSimHoughTransform_d0phi0_Tool/FPGATrackSimHoughTransform_d0phi0_Tool", "LRT Road Finder Tool"}
 
ToolHandle< IFPGATrackSimRoadFilterToolm_roadFilterTool {this, "RoadFilter", "FPGATrackSimEtaPatternFilterTool", "Road Filter Tool"}
 
ToolHandle< IFPGATrackSimRoadFilterToolm_roadFilterTool2 {this, "RoadFilter2", "FPGATrackSimPhiRoadFilterTool", "Road Filter2 Tool"}
 
ToolHandle< FPGATrackSimNNTrackToolm_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool", "NN Track Tool"}
 
ToolHandle< FPGATrackSimHoughRootOutputToolm_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
 
ToolHandle< FPGATrackSimTrackFitterToolm_trackFitterTool_1st {this, "TrackFitter_1st", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_1st", "1st stage track fit tool"}
 
ToolHandle< FPGATrackSimOverlapRemovalToolm_overlapRemovalTool_1st {this, "OverlapRemoval_1st", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_1st", "1st stage overlap removal tool"}
 
ToolHandle< FPGATrackSimOutputHeaderToolm_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
 
ToolHandle< FPGATrackSimSlicingEngineToolm_slicingEngineTool {this, "SlicingEngineTool", "FPGATrackSimSlicingEngineTool/FPGATrackSimSlicingEngineTool", "Slicing engine tool"}
 
ServiceHandle< IFPGATrackSimMappingSvcm_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
 
ServiceHandle< IFPGATrackSimEventSelectionSvcm_evtSel {this, "eventSelector", "", "Event selection Svc"}
 
ServiceHandle< IChronoStatSvc > m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
 
Gaudi::Property< int > m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
 
Gaudi::Property< bool > m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
 
Gaudi::Property< bool > m_doTracking {this, "tracking", false, "flag to enable the tracking"}
 
Gaudi::Property< bool > m_doOverlapRemoval {this, "doOverlapRemoval", true , "flag to enable the overlap removal"}
 
Gaudi::Property< bool > m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
 
Gaudi::Property< bool > m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
 
Gaudi::Property< bool > m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
 
Gaudi::Property< bool > m_doHoughRootOutput1st {this, "DoHoughRootOutput1st", false, "Dump output from the Hough Transform to flat ntuples"}
 
Gaudi::Property< bool > m_doNNTrack {this, "DoNNTrack_1st", false, "Run NN track filtering for 1st stage"}
 
Gaudi::Property< bool > m_doGNNTrack {this, "DoGNNTrack", false, "Run tracking algorithm for GNN" }
 
Gaudi::Property< bool > m_doGNNPixelSeeding {this, "DoGNNPixelSeeding", false, "Flag to configure for GNN Pixel Seeding" }
 
Gaudi::Property< bool > m_doLRT {this, "doLRT", false, "Enable Large Radius Tracking"}
 
Gaudi::Property< bool > m_doLRTHitFiltering {this, "LRTHitFiltering", false, "flag to enable hit/cluster filtering for LRT"}
 
Gaudi::Property< bool > m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
 
Gaudi::Property< float > m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
 
Gaudi::Property< bool > m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
 
Gaudi::Property< int > m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
 
Gaudi::Property< bool > m_passLowestChi2TrackOnly {this,"passLowestChi2TrackOnly", false, "case when passing only lowest chi2 track per road"}
 
Gaudi::Property< bool > m_secondStageStrips {this, "secondStageStrips", true, "If set to true, strip hits/SPs go to the second stage. Otherwise they go to the first." }
 
Gaudi::Property< bool > m_outputRoadUnionTool {this, "outputRoadUnionTool", false, "If set to true, create LogicalEventInputHeader in output ROOT file using road union tool."}
 
Gaudi::Property< int > m_region {this, "Region", 0, "Region ID to assign to tracks"}
 
Gaudi::Property< std::string > m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for sliced hits in output ROOT file." }
 
Gaudi::Property< std::string > m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
 
Gaudi::Property< std::string > m_sliceFirstPixelBranch {this, "FirstPixelBranchName", "LogicalEventFirstPixelHeader", "Name of the branch for first stage pixel hits in output ROOT file"}
 
Gaudi::Property< std::string > m_sliceSecondPixelBranch {this, "SecondPixelBranchName", "LogicalEventSecondPixelHeader", "Name of the branch for second stage pixel hits in output ROOT file"}
 
Gaudi::Property< std::string > m_sliceStripBranch {this, "StripBranchName", "LogicalEventSpacepointHeader", "Name of the branch for (post-SP) strip hits in output ROOT file"}
 
Gaudi::Property< std::string > m_sliceStripBranchPreSP {this, "StripPreSPBranchName", "LogicalEventStripHeader", "Name of the branch for (pre-SP) strip hits in output ROOT file"}
 
FPGATrackSimLogicalEventInputHeaderm_slicedHitHeader = nullptr
 
FPGATrackSimLogicalEventInputHeaderm_slicedFirstPixelHeader = nullptr
 
FPGATrackSimLogicalEventInputHeaderm_slicedSecondPixelHeader = nullptr
 
FPGATrackSimLogicalEventInputHeaderm_slicedStripHeader = nullptr
 
FPGATrackSimLogicalEventInputHeaderm_slicedStripHeaderPreSP = nullptr
 
FPGATrackSimLogicalEventOutputHeaderm_logicEventOutputHeader = nullptr
 
std::vector< FPGATrackSimTrackm_tracks_1st_guessedcheck
 
std::vector< FPGATrackSimTrackm_tracks_1st_nomiss
 
std::vector< FPGATrackSimTrackm_tracks_2nd_guessedcheck
 
std::vector< FPGATrackSimTrackm_tracks_2nd_nomiss
 
std::vector< FPGATrackSimClusterm_spacepoints {}
 
double m_evt = 0
 
long m_nRoadsTot = 0
 
long m_nTracksTot = 0
 
long m_nTracksChi2Tot = 0
 
long m_nTracksChi2OLRTot = 0
 
double m_evt_truth = 0
 
long m_nRoadsFound = 0
 
long m_nTracksFound = 0
 
long m_nTracksChi2Found = 0
 
long m_nTracksChi2OLRFound = 0
 
unsigned long m_maxNRoadsFound = 0
 
unsigned long m_maxNTracksTot = 0
 
unsigned long m_maxNTracksChi2Tot = 0
 
unsigned long m_maxNTracksChi2OLRTot = 0
 
ToolHandle< GenericMonitoringToolm_monTool {this,"MonTool", "", "Monitoring tool"}
 
SG::ReadHandleKey< FPGATrackSimHitCollectionm_FPGAHitKey {this, "FPGATrackSimHitKey","FPGAHits", "FPGATrackSim hits key"}
 
SG::WriteHandleKey< FPGATrackSimClusterCollectionm_FPGASpacePointsKey {this, "FPGATrackSimSpacePoints1stKey","FPGASpacePoints_1st","FPGATrackSim SpacePoints key"}
 
SG::WriteHandleKey< FPGATrackSimHitCollectionm_FPGAHitKey_1st {this, "FPGATrackSimHitKey_1st","FPGAHits_1st","FPGATrackSim 1st stage hits key"}
 
SG::WriteHandleKey< FPGATrackSimHitCollectionm_FPGAHitKey_2nd {this, "FPGATrackSimHitKey_2nd","FPGAHits_2nd","FPGATrackSim 2nd stage hits key"}
 
SG::WriteHandleKey< FPGATrackSimHitCollectionm_FPGAHitFilteredKey {this, "FPGATrackSimHitFiltered1stKey","FPGAHitsFiltered_1st","FPGATrackSim Filtered Hits 1st stage key"}
 
SG::WriteHandleKey< FPGATrackSimHitContainerm_FPGAHitInRoadsKey {this, "FPGATrackSimHitInRoads1stKey","FPGAHitsInRoads_1st","FPGATrackSim Hits in 1st stage roads key"}
 
SG::WriteHandleKey< FPGATrackSimRoadCollectionm_FPGARoadKey {this, "FPGATrackSimRoad1stKey","FPGARoads_1st","FPGATrackSim Roads 1st stage key"}
 
SG::WriteHandleKey< FPGATrackSimTrackCollectionm_FPGATrackKey {this, "FPGATrackSimTrack1stKey","FPGATracks_1st","FPGATrackSim Tracks 1st stage key"}
 
SG::ReadHandleKey< FPGATrackSimTruthTrackCollectionm_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
 
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollectionm_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
 
SG::ReadHandleKey< FPGATrackSimEventInfom_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
 
DataObjIDColl m_extendedExtraObjects
 
StoreGateSvc_t m_evtStore
 Pointer to StoreGate (event store by default) More...
 
StoreGateSvc_t m_detStore
 Pointer to StoreGate (detector store by default) More...
 
std::vector< SG::VarHandleKeyArray * > m_vhka
 
bool m_varHandleArraysDeclared
 

Detailed Description

Definition at line 68 of file FPGATrackSimLogicalHitsProcessAlg.h.

Member Typedef Documentation

◆ StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< Algorithm > >::StoreGateSvc_t
privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

◆ FPGATrackSimLogicalHitsProcessAlg()

FPGATrackSimLogicalHitsProcessAlg::FPGATrackSimLogicalHitsProcessAlg ( const std::string &  name,
ISvcLocator *  pSvcLocator 
)

Definition at line 37 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

37  :
38  AthAlgorithm(name, pSvcLocator)
39 {
40 }

◆ ~FPGATrackSimLogicalHitsProcessAlg()

virtual FPGATrackSimLogicalHitsProcessAlg::~FPGATrackSimLogicalHitsProcessAlg ( )
virtualdefault

Member Function Documentation

◆ declareGaudiProperty() [1/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  hndl,
const SG::VarHandleKeyArrayType  
)
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKeyArray>

Definition at line 170 of file AthCommonDataStore.h.

172  {
173  return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
174  hndl.value(),
175  hndl.documentation());
176 
177  }

◆ declareGaudiProperty() [2/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  hndl,
const SG::VarHandleKeyType  
)
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

158  {
159  return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
160  hndl.value(),
161  hndl.documentation());
162 
163  }

◆ declareGaudiProperty() [3/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  hndl,
const SG::VarHandleType  
)
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleBase>

Definition at line 184 of file AthCommonDataStore.h.

186  {
187  return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
188  hndl.value(),
189  hndl.documentation());
190  }

◆ declareGaudiProperty() [4/4]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > &  t,
const SG::NotHandleType  
)
inlineprivateinherited

specialization for handling everything that's not a Gaudi::Property<SG::VarHandleKey> or a <SG::VarHandleKeyArray>

Definition at line 199 of file AthCommonDataStore.h.

200  {
201  return PBASE::declareProperty(t);
202  }

◆ declareProperty() [1/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
SG::VarHandleBase hndl,
const std::string &  doc,
const SG::VarHandleType  
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
hndlObject holding the property value.
docDocumentation string for the property.

This is the version for types that derive from SG::VarHandleBase. The property value object is put on the input and output lists as appropriate; then we forward to the base class.

Definition at line 245 of file AthCommonDataStore.h.

249  {
250  this->declare(hndl.vhKey());
251  hndl.vhKey().setOwner(this);
252 
253  return PBASE::declareProperty(name,hndl,doc);
254  }

◆ declareProperty() [2/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
SG::VarHandleKey hndl,
const std::string &  doc,
const SG::VarHandleKeyType  
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
hndlObject holding the property value.
docDocumentation string for the property.

This is the version for types that derive from SG::VarHandleKey. The property value object is put on the input and output lists as appropriate; then we forward to the base class.

Definition at line 221 of file AthCommonDataStore.h.

225  {
226  this->declare(hndl);
227  hndl.setOwner(this);
228 
229  return PBASE::declareProperty(name,hndl,doc);
230  }

◆ declareProperty() [3/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
SG::VarHandleKeyArray hndArr,
const std::string &  doc,
const SG::VarHandleKeyArrayType  
)
inlineinherited

Definition at line 259 of file AthCommonDataStore.h.

263  {
264 
265  // std::ostringstream ost;
266  // ost << Algorithm::name() << " VHKA declareProp: " << name
267  // << " size: " << hndArr.keys().size()
268  // << " mode: " << hndArr.mode()
269  // << " vhka size: " << m_vhka.size()
270  // << "\n";
271  // debug() << ost.str() << endmsg;
272 
273  hndArr.setOwner(this);
274  m_vhka.push_back(&hndArr);
275 
276  Gaudi::Details::PropertyBase* p = PBASE::declareProperty(name, hndArr, doc);
277  if (p != 0) {
278  p->declareUpdateHandler(&AthCommonDataStore<PBASE>::updateVHKA, this);
279  } else {
280  ATH_MSG_ERROR("unable to call declareProperty on VarHandleKeyArray "
281  << name);
282  }
283 
284  return p;
285 
286  }

◆ declareProperty() [4/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
T &  property,
const std::string &  doc,
const SG::NotHandleType  
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
propertyObject holding the property value.
docDocumentation string for the property.

This is the generic version, for types that do not derive from SG::VarHandleKey. It just forwards to the base class version of declareProperty.

Definition at line 333 of file AthCommonDataStore.h.

337  {
338  return PBASE::declareProperty(name, property, doc);
339  }

◆ declareProperty() [5/6]

Gaudi::Details::PropertyBase* AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( const std::string &  name,
T &  property,
const std::string &  doc = "none" 
)
inlineinherited

Declare a new Gaudi property.

Parameters
nameName of the property.
propertyObject holding the property value.
docDocumentation string for the property.

This dispatches to either the generic declareProperty or the one for VarHandle/Key/KeyArray.

Definition at line 352 of file AthCommonDataStore.h.

355  {
356  typedef typename SG::HandleClassifier<T>::type htype;
357  return declareProperty (name, property, doc, htype());
358  }

◆ declareProperty() [6/6]

Gaudi::Details::PropertyBase& AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( Gaudi::Property< T, V, H > &  t)
inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

145  {
146  typedef typename SG::HandleClassifier<T>::type htype;
148  }

◆ detStore()

const ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::detStore ( ) const
inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

95 { return m_detStore; }

◆ evtStore() [1/2]

ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::evtStore ( )
inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

85 { return m_evtStore; }

◆ evtStore() [2/2]

const ServiceHandle<StoreGateSvc>& AthCommonDataStore< AthCommonMsg< Algorithm > >::evtStore ( ) const
inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 90 of file AthCommonDataStore.h.

90 { return m_evtStore; }

◆ execute()

StatusCode FPGATrackSimLogicalHitsProcessAlg::execute ( )
overridevirtual

Definition at line 115 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

116 {
117  const EventContext& ctx = getContext();
118 
119  // Get reference to hits from StoreGate.
121  if (!FPGAHits.isValid()) {
122  if (m_evt == 0) {
123  ATH_MSG_WARNING("Didn't receive " << FPGAHits.key() << " on first event; assuming no input events.");
124  }
125  SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
126  if (!appMgr) {
127  ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
128  return StatusCode::FAILURE;
129  }
130  return appMgr->stopRun();
131  }
132 
133  // Set up write handles.
138 
139  ATH_CHECK( FPGAHits_1st.record (std::make_unique<FPGATrackSimHitCollection>()));
140  ATH_CHECK( FPGAHits_2nd.record (std::make_unique<FPGATrackSimHitCollection>()));
141  ATH_CHECK( FPGARoads_1st.record (std::make_unique<FPGATrackSimRoadCollection>()));
142  ATH_CHECK( FPGAHitsInRoads_1st.record (std::make_unique<FPGATrackSimHitContainer>()));
143 
145  ATH_CHECK(FPGATracks_1stHandle.record (std::make_unique<FPGATrackSimTrackCollection>()));
146 
148  ATH_CHECK( FPGAHitsFiltered_1st.record (std::make_unique<FPGATrackSimHitCollection>()));
149 
151  ATH_CHECK( FPGASpacePoints.record (std::make_unique<FPGATrackSimClusterCollection>()));
152 
153  // Query the event selection service to make sure this event passed cuts.
154  if (!m_evtSel->getSelectedEvent()) {
155  return StatusCode::SUCCESS;
156  }
157  ATH_MSG_INFO("Event accepted by: " << m_evtSel->name());
158 
159  // Event passes cuts, count it. technically, DataPrep does this now.
160  m_evt++;
161 
162  // Read event info structure. all we need this for is to propagate to our event info structures.
164  if (!FPGAEventInfo.isValid()) {
165  ATH_MSG_ERROR("Could not find FPGA Event Info with key " << FPGAEventInfo.key());
166  return StatusCode::FAILURE;
167  }
168  FPGATrackSimEventInfo eventInfo = *FPGAEventInfo.cptr();
171  m_slicedStripHeader->newEvent(eventInfo);
173 
174  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: Split hits to 1st and 2nd stage");
175 
176  std::vector<std::shared_ptr<const FPGATrackSimHit>> phits_output, phits_all, phits_1st, phits_2nd;
177  phits_1st.reserve(FPGAHits->size());
178  phits_2nd.reserve(FPGAHits->size());
179  ATH_MSG_DEBUG("Incoming Hits: " << FPGAHits->size());
180  for (const FPGATrackSimHit& hit : *(FPGAHits.cptr())) {
181  phits_all.emplace_back(&hit, [](const FPGATrackSimHit*){});
182  }
183 
184  // Use the slicing engine tool to do the stage-based separation. Does not use the pmap.
185  m_slicingEngineTool->sliceHits(phits_all, phits_1st, phits_2nd);
186  // record 1st stage hits in SG
187  for (auto& hit : phits_1st) {
188  FPGAHits_1st->push_back(*hit);
189  }
190 
192 
193  // The slicing engine puts strip hits into a logical event input header. That header now needs to go
194  // to the spacepoint tool if it's turned on. Those hits then get added to phits_1st or phits_2nd as appropriate.
195  if (m_doSpacepoints) {
196  m_spacepoints.clear();
197  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: SP fornmation");
199  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: SP fornmation");
200  for (const FPGATrackSimCluster& cluster : m_spacepoints) FPGASpacePoints->push_back(cluster);
201  }
202 
203  // Use a property to control whether the strips/SPs go to 1st or second stage.
204  for (const FPGATrackSimHit& hit : m_slicedStripHeader->towers().at(0).hits()) {
205  (m_secondStageStrips ? phits_2nd : phits_1st).emplace_back(&hit, [](const FPGATrackSimHit*){});
206  }
207  for (auto& hit : phits_2nd) {
208  FPGAHits_2nd->push_back(*hit);
209  }
210 
211  // Add all hits including SPs to this for the HoughRootOutputTool
212  for (const FPGATrackSimHit& hit : *(FPGAHits_2nd.cptr())) {
213  phits_output.emplace_back(&hit, [](const FPGATrackSimHit*){});
214  }
215 
216  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: Split hits to 1st and 2nd stage");
217  ATH_MSG_DEBUG("1st stage hits: " << phits_1st.size() << " 2nd stage hits: " << phits_2nd.size() );
218  if (phits_1st.empty()) return StatusCode::SUCCESS;
219  // Get truth tracks from DataPrep as well.
221  if (!FPGATruthTracks.isValid()) {
222  ATH_MSG_ERROR("Could not find FPGA Truth Track Collection with key " << FPGATruthTracks.key());
223  return StatusCode::FAILURE;
224  }
225 
226  // Same for offline tracks.
228  if (!FPGAOfflineTracks.isValid()) {
229  ATH_MSG_ERROR("Could not find FPGA Offline Track Collection with key " << FPGAOfflineTracks.key());
230  return StatusCode::FAILURE;
231  }
232 
233  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: GetRoads");
234  // Get roads
235  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roads_1st;
236  ATH_CHECK(m_roadFinderTool->getRoads(phits_1st, roads_1st, *(FPGATruthTracks.cptr())));
237 
238  ATH_MSG_DEBUG("Looping over " << roads_1st.size() << " roads");
239  auto mon_nroads_1st = Monitored::Scalar<unsigned>("nroads_1st", roads_1st.size());
240  for (auto const &road : roads_1st) {
241  unsigned bitmask = road->getHitLayers();
242  for (size_t l = 0; l < m_FPGATrackSimMapping->PlaneMap_1st(0)->getNLogiLayers(); l++) {
243  if (bitmask & (1 << l)) {
244  auto mon_layerIDs_1st = Monitored::Scalar<unsigned>("layerIDs_1st",l);
245  Monitored::Group(m_monTool,mon_layerIDs_1st);
246  }
247  }
248  }
249  Monitored::Group(m_monTool, mon_nroads_1st);
250  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: GetRoads");
251 
252  // Standard road Filter
253  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: RoadFiltering");
254  std::vector<std::shared_ptr<const FPGATrackSimRoad>> postfilter_roads;
255  if (m_filterRoads)
256  {
257  ATH_CHECK(m_roadFilterTool->filterRoads(roads_1st, postfilter_roads));
258  roads_1st = std::move(postfilter_roads);
259  }
260  if (m_doOverlapRemoval) ATH_CHECK(m_overlapRemovalTool_1st->runOverlapRemoval(roads_1st));
261  // Road Filter2
262  std::vector<std::shared_ptr<const FPGATrackSimRoad>> postfilter2_roads;
263  if (m_filterRoads2) {
264  ATH_CHECK(m_roadFilterTool2->filterRoads(roads_1st, postfilter2_roads));
265  roads_1st = std::move(postfilter2_roads);
266  }
267 
268  auto mon_nroads_1st_postfilter = Monitored::Scalar<unsigned>("nroads_1st_postfilter", roads_1st.size());
269  Monitored::Group(m_monTool, mon_nroads_1st_postfilter);
270  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: RoadFiltering");
271  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: Tracking");
272 
273  // Get tracks
274  std::vector<FPGATrackSimTrack> tracks_1st;
275  if (m_doTracking) {
276  if (m_doNNTrack) {
277  ATH_MSG_DEBUG("Performing NN tracking");
278  ATH_CHECK(m_NNTrackTool->getTracks_1st(roads_1st, tracks_1st));
279  if (m_doGNNTrack) {
280  ATH_MSG_DEBUG("Performing track parameter estimation");
281  ATH_CHECK(m_NNTrackTool->setTrackParameters(tracks_1st,true,m_evtSel->getMin(), m_evtSel->getMax()));
282  }
283  } else {
284  ATH_MSG_DEBUG("Performing Linear tracking");
285  if (m_passLowestChi2TrackOnly) { // Pass only the lowest chi2 track per road
286  // Loop over roads and keep only the best track for each road
287  for (const auto& road : roads_1st) {
288  std::vector<FPGATrackSimTrack> tracksForCurrentRoad;
289 
290  // Collect tracks for this road
291  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roadVec = {road};
292  ATH_CHECK(m_trackFitterTool_1st->getTracks(roadVec, tracksForCurrentRoad, m_evtSel->getMin(), m_evtSel->getMax()));
293 
294  // Find the best track for this road
295  if (!tracksForCurrentRoad.empty()) {
296  auto bestTrackIter = std::min_element(
297  tracksForCurrentRoad.begin(), tracksForCurrentRoad.end(),
298  [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
299  return a.getChi2ndof() < b.getChi2ndof();
300  });
301 
302  if (bestTrackIter != tracksForCurrentRoad.end() && bestTrackIter->getChi2ndof() < 1.e15) {
303  tracks_1st.push_back(*bestTrackIter);
304 
305  // Monitor chi2 of the best track
306  auto mon_chi2_1st = Monitored::Scalar<float>("chi2_1st_all", bestTrackIter->getChi2ndof());
307  Monitored::Group(m_monTool, mon_chi2_1st);
308  }
309  }
310  }
311  // Monitor the best chi2 (from all tracks across all roads)
312  if (!tracks_1st.empty()) {
313  float bestChi2Overall = std::min_element(
314  tracks_1st.begin(), tracks_1st.end(),
315  [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
316  return a.getChi2ndof() < b.getChi2ndof();
317  })->getChi2ndof();
318 
319  auto mon_best_chi2_1st = Monitored::Scalar<float>("best_chi2_1st", bestChi2Overall);
320  Monitored::Group(m_monTool, mon_best_chi2_1st);
321  }
322  } else { // Pass all tracks with chi2 < 1e15
323  ATH_CHECK(m_trackFitterTool_1st->getTracks(roads_1st, tracks_1st, m_evtSel->getMin(), m_evtSel->getMax()));
324  float bestchi2 = 1.e15;
325  for (const FPGATrackSimTrack& track : tracks_1st) {
326  float chi2 = track.getChi2ndof();
327  if (chi2 < bestchi2) bestchi2 = chi2;
328  auto mon_chi2_1st = Monitored::Scalar<float>("chi2_1st_all", chi2);
329  Monitored::Group(m_monTool, mon_chi2_1st);
330  }
331  auto mon_best_chi2_1st = Monitored::Scalar<float>("best_chi2_1st", bestchi2);
332  Monitored::Group(m_monTool, mon_best_chi2_1st);
333  }
334  }
335  } else { // No tracking;
336  ATH_MSG_DEBUG("No tracking. Just running dummy road2track algorith");
337  if(m_doGNNPixelSeeding) { //For GNNPixelSeeding, convert the roads to a track in the simplest form
338  for (const std::shared_ptr<const FPGATrackSimRoad>& road : roads_1st) {
339  std::vector<std::shared_ptr<const FPGATrackSimHit>> track_hits;
340  for (unsigned layer = 0; layer < road->getNLayers(); ++layer) {
341  track_hits.insert(track_hits.end(), road->getHits(layer).begin(), road->getHits(layer).end());
342  }
343 
344  FPGATrackSimTrack track_cand;
345  track_cand.setNLayers(track_hits.size());
346  for (size_t ihit = 0; ihit < track_hits.size(); ++ihit) {
347  track_cand.setFPGATrackSimHit(ihit, *(track_hits[ihit]));
348  }
349  tracks_1st.push_back(track_cand);
350  }
351  }
352  else { roadsToTrack(roads_1st, tracks_1st, m_FPGATrackSimMapping->PlaneMap_1st(0)); }
353  }
354 
355  std::vector<FPGATrackSimTruthTrack> truthtracks = *FPGATruthTracks;
356  std::vector<FPGATrackSimOfflineTrack> offlineTracks = *FPGAOfflineTracks;
357  //Loop over tracks and set the region for all of them, also optionally set track parameters to truth
358  for (FPGATrackSimTrack& track : tracks_1st) {
359  track.setRegion(m_region);
360  if (m_SetTruthParametersForTracks >= 0 && truthtracks.size() > 0) {
362  track.setQOverPt(truthtracks.front().getQOverPt());
363  else if (m_SetTruthParametersForTracks != 1)
364  track.setD0(truthtracks.front().getD0());
365  else if (m_SetTruthParametersForTracks != 2)
366  track.setPhi(truthtracks.front().getPhi());
367  else if (m_SetTruthParametersForTracks != 3)
368  track.setZ0(truthtracks.front().getZ0());
369  else if (m_SetTruthParametersForTracks != 4)
370  track.setEta(truthtracks.front().getEta());
371  }
372  }
373  // Loop over roads and store them in SG (after track finding to also copy the sector information)
374  for (auto const& road : roads_1st) {
375  std::vector<FPGATrackSimHit> road_hits;
376  ATH_MSG_DEBUG("Hough Road X Y: " << road->getX() << " " << road->getY());
377  for (size_t l = 0; l < road->getNLayers(); ++l) {
378  for (const auto& layerH : road->getHits(l)) {
379  road_hits.push_back(*layerH);
380  }
381  }
382  FPGAHitsInRoads_1st->push_back(road_hits);
383  FPGARoads_1st->push_back(*road);
384  }
385  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: Tracking");
386 
387  // Monitor the number of tracks
388  auto mon_ntracks_1st = Monitored::Scalar<unsigned>("ntrack_1st", tracks_1st.size());
389  Monitored::Group(m_monTool, mon_ntracks_1st);
390  if constexpr (enableBenchmark) m_chrono->chronoStart("1st Stage: OverlapRemoval");
391  // Overlap removal
392  if (m_doOverlapRemoval) ATH_CHECK(m_overlapRemovalTool_1st->runOverlapRemoval(tracks_1st));
393 
394  unsigned ntrackOLRChi2 = 0;
395  for (const FPGATrackSimTrack& track : tracks_1st) {
396  if (track.getChi2ndof() < m_trackScoreCut.value()) {
398  if (track.passedOR()) {
399  ntrackOLRChi2++;
401 
402  // For tracks passing overlap removal-- record the chi2 so we can figure out the right cut.
403  float chi2olr = track.getChi2ndof();
404  auto mon_chi2_1st_or = Monitored::Scalar<float>("chi2_1st_afterOLR", chi2olr);
405  Monitored::Group(m_monTool, mon_chi2_1st_or);
406  }
407  }
408  }
409  if constexpr (enableBenchmark) m_chrono->chronoStop("1st Stage: OverlapRemoval");
410  auto mon_ntracks_1st_olr = Monitored::Scalar<unsigned>("ntrack_1st_afterOLR", ntrackOLRChi2);
411  Monitored::Group(m_monTool,mon_ntracks_1st_olr);
412 
413  m_nRoadsTot += roads_1st.size();
414  m_nTracksTot += tracks_1st.size();
415 
416  // Do some simple monitoring of efficiencies. okay, we need truth tracks here.
417  if (truthtracks.size() > 0) {
418  m_evt_truth++;
419  auto passroad = Monitored::Scalar<bool>("eff_road",(roads_1st.size() > 0));
420  auto passtrack = Monitored::Scalar<bool>("eff_track",(tracks_1st.size() > 0));
421  auto truthpT_zoom = Monitored::Scalar<float>("pT_zoom",truthtracks.front().getPt()*0.001);
422  auto truthpT = Monitored::Scalar<float>("pT",truthtracks.front().getPt()*0.001);
423  auto trutheta = Monitored::Scalar<float>("eta",truthtracks.front().getEta());
424  auto truthphi= Monitored::Scalar<float>("phi",truthtracks.front().getPhi());
425  auto truthd0= Monitored::Scalar<float>("d0",truthtracks.front().getD0());
426  auto truthz0= Monitored::Scalar<float>("z0",truthtracks.front().getZ0());
427  if (roads_1st.size() > 0) m_nRoadsFound++;
428  if (roads_1st.size() > m_maxNRoadsFound) m_maxNRoadsFound = roads_1st.size();
429 
430  unsigned npasschi2(0);
431  unsigned npasschi2OLR(0);
432  if (tracks_1st.size() > 0) {
433  m_nTracksFound++;
434  if (tracks_1st.size() > m_maxNTracksTot) m_maxNTracksTot = tracks_1st.size();
435  for (const auto& track : tracks_1st) {
436  if (track.getChi2ndof() < m_trackScoreCut.value()) {
437  npasschi2++;
438  if (track.passedOR()) {
439  npasschi2OLR++;
440  }
441  }
442  }
443  }
444  if (npasschi2 > m_maxNTracksChi2Tot) m_maxNTracksChi2Tot = npasschi2;
445  if (npasschi2OLR > m_maxNTracksChi2OLRTot) m_maxNTracksChi2OLRTot = npasschi2OLR;
446  if (npasschi2 > 0) m_nTracksChi2Found++;
447  if (npasschi2OLR > 0) m_nTracksChi2OLRFound++;
448  auto passtrackchi2 = Monitored::Scalar<bool>("eff_track_chi2",(npasschi2 > 0));
449  Monitored::Group(m_monTool,passroad,passtrack,truthpT_zoom,truthpT,trutheta,truthphi,truthd0,truthz0,passtrackchi2);
450  }
451 
452  for (const FPGATrackSimTrack& track : tracks_1st) FPGATracks_1stHandle->push_back(track);
453 
454  // Now, we may want to do large-radius tracking on the hits not used by the first stage tracking.
455  // This follows overlap removal.
456  std::vector<std::shared_ptr<const FPGATrackSimRoad>> roadsLRT;
457  std::vector<FPGATrackSimTrack> tracksLRT; // currently empty
458  if (m_doLRT) {
459  // Filter out hits that are on successful first-stage tracks
460  std::vector<std::shared_ptr<const FPGATrackSimHit>> remainingHits;
461 
462  if (m_doLRTHitFiltering) {
463  ATH_MSG_DEBUG("Doing hit filtering based on prompt tracks.");
464  ATH_CHECK(m_LRTRoadFilterTool->filterUsedHits(tracks_1st, phits_1st, remainingHits));
465 
466  for (const auto &Hit : remainingHits) FPGAHitsFiltered_1st->push_back(*Hit);
467 
468  } else {
469  ATH_MSG_DEBUG("No hit filtering requested; using all hits for LRT.");
470  remainingHits = phits_1st;
471  }
472 
473  // Get LRT roads with remaining hits
474  ATH_MSG_DEBUG("Finding LRT roads");
475  ATH_CHECK(m_LRTRoadFinderTool->getRoads( remainingHits, roadsLRT ));
476  }
477 
478  auto dataFlowInfo = std::make_unique<FPGATrackSimDataFlowInfo>();
479 
480  // Write the output and reset
481  if (m_writeOutputData) {
482  ATH_CHECK(writeOutputData(roads_1st, tracks_1st, dataFlowInfo.get()));
483  }
484 
485  // This one we can do-- by passing in truth and offline tracks via storegate above.
487  ATH_MSG_DEBUG("Running HoughRootOutputTool in 1st stage.");
488 
489  SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
490  if (!appMgr) {
491  ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
492  return StatusCode::FAILURE;
493  }
494 
495  // Create output ROOT file
496  ATH_CHECK(m_houghRootOutputTool->fillTree(roads_1st, truthtracks, offlineTracks, phits_output, m_writeOutNonSPStripHits, m_trackScoreCut.value(), m_NumOfHitPerGrouping, false));
497  }
498 
499  // Reset data pointers
502 
503  return StatusCode::SUCCESS;
504 }

◆ extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase &  ExtraDeps)
protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

◆ extraOutputDeps()

const DataObjIDColl & AthAlgorithm::extraOutputDeps ( ) const
overridevirtualinherited

Return the list of extra output dependencies.

This list is extended to include symlinks implied by inheritance relations.

Definition at line 50 of file AthAlgorithm.cxx.

51 {
52  // If we didn't find any symlinks to add, just return the collection
53  // from the base class. Otherwise, return the extended collection.
54  if (!m_extendedExtraObjects.empty()) {
56  }
57  return Algorithm::extraOutputDeps();
58 }

◆ finalize()

StatusCode FPGATrackSimLogicalHitsProcessAlg::finalize ( )
overridevirtual

Definition at line 542 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

543 {
544  ATH_MSG_INFO("PRINTING FPGATRACKSIM SIMPLE STATS");
545  ATH_MSG_INFO("========================================================================================");
546  ATH_MSG_INFO("Ran on events = " << m_evt);
547  ATH_MSG_INFO("Inclusive efficiency to find a road = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nRoadsFound/(float)m_evt_truth)));
548  ATH_MSG_INFO("Inclusive efficiency to find a track = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksFound/(float)m_evt_truth)));
549  ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2Found/(float)m_evt_truth)));
550  ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 and OLR = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRFound/(float)m_evt_truth)));
551 
552 
553  ATH_MSG_INFO("Number of 1st stage roads/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nRoadsTot/(float)m_evt)));
554  ATH_MSG_INFO("Number of 1st stage track combinations/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksTot/(float)m_evt)));
555  ATH_MSG_INFO("Number of 1st stage tracks passing chi2/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2Tot/(float)m_evt)));
556  ATH_MSG_INFO("Number of 1st stage tracks passing chi2 and OLR/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRTot/(float)m_evt)));
557  ATH_MSG_INFO("========================================================================================");
558 
559  ATH_MSG_INFO("Max number of 1st stage roads in an event = " << m_maxNRoadsFound);
560  ATH_MSG_INFO("Max number of 1st stage track combinations in an event = " << m_maxNTracksTot);
561  ATH_MSG_INFO("Max number of 1st stage tracks passing chi2 in an event = " << m_maxNTracksChi2Tot);
562  ATH_MSG_INFO("Max number of 1st stage tracks passing chi2 and OLR in an event = " << m_maxNTracksChi2OLRTot);
563  ATH_MSG_INFO("========================================================================================");
564 
565  return StatusCode::SUCCESS;
566 }

◆ initialize()

StatusCode FPGATrackSimLogicalHitsProcessAlg::initialize ( )
overridevirtual

Definition at line 43 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

44 {
45  std::stringstream ss(m_description);
46  std::string line;
47  ATH_MSG_INFO("Tag config:");
48  if (!m_description.empty()) {
49  while (std::getline(ss, line, '\n')) {
50  ATH_MSG_INFO('\t' << line);
51  }
52  }
53  ATH_CHECK(m_roadFinderTool.retrieve());
54  ATH_CHECK(m_LRTRoadFilterTool.retrieve(EnableTool{m_doLRT}));
55  ATH_CHECK(m_LRTRoadFinderTool.retrieve(EnableTool{m_doLRT}));
56  ATH_CHECK(m_houghRootOutputTool.retrieve(EnableTool{m_doHoughRootOutput1st}));
57  ATH_CHECK(m_NNTrackTool.retrieve(EnableTool{m_doNNTrack}));
58  ATH_CHECK(m_roadFilterTool.retrieve(EnableTool{m_filterRoads}));
59  ATH_CHECK(m_roadFilterTool2.retrieve(EnableTool{m_filterRoads2}));
60 
61  ATH_CHECK(m_spacepointsTool.retrieve(EnableTool{m_doSpacepoints}));
62 
63  ATH_CHECK(m_trackFitterTool_1st.retrieve(EnableTool{m_doTracking}));
65  ATH_CHECK(m_writeOutputTool.retrieve());
66  ATH_CHECK(m_FPGATrackSimMapping.retrieve());
67  ATH_CHECK(m_slicingEngineTool.retrieve());
68 
69  ATH_MSG_DEBUG("initialize() Instantiating root objects");
70 
71  // ROOT branches created for test vectors.
72  if (m_outputRoadUnionTool) m_slicedHitHeader = m_writeOutputTool->addInputBranch(m_sliceBranch.value(), true);
73  m_logicEventOutputHeader = m_writeOutputTool->addOutputBranch(m_outputBranch.value(), true);
74 
75  // Updated slicing engine test vectors will have three streams.
78  m_slicedStripHeader = m_writeOutputTool->addInputBranch(m_sliceStripBranch.value(), true);
79 
80  // We also need a pre- and post- SP copy of the SPs.
82 
83  // Connect the slicing tools accordingly. We probably no longer need to hook up the roadfinder here.
86 
87  ATH_MSG_DEBUG("initialize() Setting branch");
88 
89  if (!m_monTool.empty())
90  ATH_CHECK(m_monTool.retrieve());
91 
103 
104  ATH_CHECK( m_chrono.retrieve() );
105  ATH_MSG_DEBUG("initialize() Finished");
106 
107  return StatusCode::SUCCESS;
108 }

◆ inputHandles()

virtual std::vector<Gaudi::DataHandle*> AthCommonDataStore< AthCommonMsg< Algorithm > >::inputHandles ( ) const
overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ msg() [1/2]

MsgStream& AthCommonMsg< Algorithm >::msg ( ) const
inlineinherited

Definition at line 24 of file AthCommonMsg.h.

24  {
25  return this->msgStream();
26  }

◆ msg() [2/2]

MsgStream& AthCommonMsg< Algorithm >::msg ( const MSG::Level  lvl) const
inlineinherited

Definition at line 27 of file AthCommonMsg.h.

27  {
28  return this->msgStream(lvl);
29  }

◆ msgLvl()

bool AthCommonMsg< Algorithm >::msgLvl ( const MSG::Level  lvl) const
inlineinherited

Definition at line 30 of file AthCommonMsg.h.

30  {
31  return this->msgLevel(lvl);
32  }

◆ outputHandles()

virtual std::vector<Gaudi::DataHandle*> AthCommonDataStore< AthCommonMsg< Algorithm > >::outputHandles ( ) const
overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ printHitSubregions()

void FPGATrackSimLogicalHitsProcessAlg::printHitSubregions ( std::vector< FPGATrackSimHit > const hits)
private

Definition at line 572 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

573 {
574  ATH_MSG_WARNING("Hit regions:");
575  for (const auto& hit : hits)
576  {
577  std::vector<uint32_t> regions = m_FPGATrackSimMapping->SubRegionMap()->getRegions(hit);
578  std::stringstream ss;
579  for (auto r : regions)
580  ss << r << ",";
581  ATH_MSG_WARNING("\t[" << ss.str() << "]");
582  }
583 }

◆ renounce()

std::enable_if_t<std::is_void_v<std::result_of_t<decltype(&T::renounce)(T)> > && !std::is_base_of_v<SG::VarHandleKeyArray, T> && std::is_base_of_v<Gaudi::DataHandle, T>, void> AthCommonDataStore< AthCommonMsg< Algorithm > >::renounce ( T &  h)
inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

381  {
382  h.renounce();
383  PBASE::renounce (h);
384  }

◆ renounceArray()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::renounceArray ( SG::VarHandleKeyArray handlesArray)
inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

364  {
365  handlesArray.renounce();
366  }

◆ sysInitialize()

StatusCode AthAlgorithm::sysInitialize ( )
overridevirtualinherited

Override sysInitialize.

Override sysInitialize from the base class.

Loop through all output handles, and if they're WriteCondHandles, automatically register them and this Algorithm with the CondSvc

Scan through all outputHandles, and if they're WriteCondHandles, register them with the CondSvc

Reimplemented from AthCommonDataStore< AthCommonMsg< Algorithm > >.

Reimplemented in AthAnalysisAlgorithm, AthFilterAlgorithm, PyAthena::Alg, and AthHistogramAlgorithm.

Definition at line 66 of file AthAlgorithm.cxx.

66  {
68 
69  if (sc.isFailure()) {
70  return sc;
71  }
72  ServiceHandle<ICondSvc> cs("CondSvc",name());
73  for (auto h : outputHandles()) {
74  if (h->isCondition() && h->mode() == Gaudi::DataHandle::Writer) {
75  // do this inside the loop so we don't create the CondSvc until needed
76  if ( cs.retrieve().isFailure() ) {
77  ATH_MSG_WARNING("no CondSvc found: won't autoreg WriteCondHandles");
78  return StatusCode::SUCCESS;
79  }
80  if (cs->regHandle(this,*h).isFailure()) {
81  sc = StatusCode::FAILURE;
82  ATH_MSG_ERROR("unable to register WriteCondHandle " << h->fullKey()
83  << " with CondSvc");
84  }
85  }
86  }
87  return sc;
88 }

◆ sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< Algorithm > >::sysStart ( )
overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

◆ updateVHKA()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::updateVHKA ( Gaudi::Details::PropertyBase &  )
inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

308  {
309  // debug() << "updateVHKA for property " << p.name() << " " << p.toString()
310  // << " size: " << m_vhka.size() << endmsg;
311  for (auto &a : m_vhka) {
312  std::vector<SG::VarHandleKey*> keys = a->keys();
313  for (auto k : keys) {
314  k->setOwner(this);
315  }
316  }
317  }

◆ writeOutputData()

StatusCode FPGATrackSimLogicalHitsProcessAlg::writeOutputData ( const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &  roads_1st,
std::vector< FPGATrackSimTrack > const tracks_1st,
FPGATrackSimDataFlowInfo const dataFlowInfo 
)
private

Definition at line 511 of file FPGATrackSimLogicalHitsProcessAlg.cxx.

514 {
516 
517  ATH_MSG_DEBUG("NFPGATrackSimRoads_1st = " << roads_1st.size() << ", NFPGATrackSimTracks_1st = " << tracks_1st.size());
518 
519  if (!m_writeOutputData) return StatusCode::SUCCESS;
522 
525 
528 
529  // It would be nice to rearrange this so both algorithms use one instance of this tool, I think.
530  // Which means that dataprep can't call writeData because that does Fill().
531  ATH_CHECK(m_writeOutputTool->writeData());
532 
533 
534 
535  return StatusCode::SUCCESS;
536 }

Member Data Documentation

◆ m_chrono

ServiceHandle<IChronoStatSvc> FPGATrackSimLogicalHitsProcessAlg::m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
private

Definition at line 98 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_description

std::string FPGATrackSimLogicalHitsProcessAlg::m_description
private

Definition at line 80 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_detStore
privateinherited

Pointer to StoreGate (detector store by default)

Definition at line 393 of file AthCommonDataStore.h.

◆ m_doGNNPixelSeeding

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doGNNPixelSeeding {this, "DoGNNPixelSeeding", false, "Flag to configure for GNN Pixel Seeding" }
private

Definition at line 111 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doGNNTrack

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doGNNTrack {this, "DoGNNTrack", false, "Run tracking algorithm for GNN" }
private

Definition at line 110 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doHoughRootOutput1st

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doHoughRootOutput1st {this, "DoHoughRootOutput1st", false, "Dump output from the Hough Transform to flat ntuples"}
private

Definition at line 108 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doLRT

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doLRT {this, "doLRT", false, "Enable Large Radius Tracking"}
private

Definition at line 112 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doLRTHitFiltering

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doLRTHitFiltering {this, "LRTHitFiltering", false, "flag to enable hit/cluster filtering for LRT"}
private

Definition at line 113 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doMissingHitsChecks

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
private

Definition at line 105 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doNNTrack

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doNNTrack {this, "DoNNTrack_1st", false, "Run NN track filtering for 1st stage"}
private

Definition at line 109 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doOverlapRemoval

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doOverlapRemoval {this, "doOverlapRemoval", true , "flag to enable the overlap removal"}
private

Definition at line 104 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doSpacepoints

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
private

Definition at line 102 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_doTracking

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_doTracking {this, "tracking", false, "flag to enable the tracking"}
private

Definition at line 103 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evt

double FPGATrackSimLogicalHitsProcessAlg::m_evt = 0
private

Definition at line 144 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evt_truth

double FPGATrackSimLogicalHitsProcessAlg::m_evt_truth = 0
private

Definition at line 150 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evtSel

ServiceHandle<IFPGATrackSimEventSelectionSvc> FPGATrackSimLogicalHitsProcessAlg::m_evtSel {this, "eventSelector", "", "Event selection Svc"}
private

Definition at line 96 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_evtStore
privateinherited

Pointer to StoreGate (event store by default)

Definition at line 390 of file AthCommonDataStore.h.

◆ m_extendedExtraObjects

DataObjIDColl AthAlgorithm::m_extendedExtraObjects
privateinherited

Definition at line 79 of file AthAlgorithm.h.

◆ m_filterRoads

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
private

Definition at line 106 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_filterRoads2

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
private

Definition at line 107 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAEventInfoKey

SG::ReadHandleKey<FPGATrackSimEventInfo> FPGATrackSimLogicalHitsProcessAlg::m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
private

Definition at line 185 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitFilteredKey

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitFilteredKey {this, "FPGATrackSimHitFiltered1stKey","FPGAHitsFiltered_1st","FPGATrackSim Filtered Hits 1st stage key"}
private

Definition at line 178 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitInRoadsKey

SG::WriteHandleKey<FPGATrackSimHitContainer> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitInRoadsKey {this, "FPGATrackSimHitInRoads1stKey","FPGAHitsInRoads_1st","FPGATrackSim Hits in 1st stage roads key"}
private

Definition at line 179 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey

SG::ReadHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey {this, "FPGATrackSimHitKey","FPGAHits", "FPGATrackSim hits key"}
private

Definition at line 170 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey_1st

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_1st {this, "FPGATrackSimHitKey_1st","FPGAHits_1st","FPGATrackSim 1st stage hits key"}
private

Definition at line 176 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAHitKey_2nd

SG::WriteHandleKey<FPGATrackSimHitCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_2nd {this, "FPGATrackSimHitKey_2nd","FPGAHits_2nd","FPGATrackSim 2nd stage hits key"}
private

Definition at line 177 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGAOfflineTrackKey

SG::ReadHandleKey<FPGATrackSimOfflineTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
private

Definition at line 184 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGARoadKey

SG::WriteHandleKey<FPGATrackSimRoadCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGARoadKey {this, "FPGATrackSimRoad1stKey","FPGARoads_1st","FPGATrackSim Roads 1st stage key"}
private

Definition at line 180 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGASpacePointsKey

SG::WriteHandleKey<FPGATrackSimClusterCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGASpacePointsKey {this, "FPGATrackSimSpacePoints1stKey","FPGASpacePoints_1st","FPGATrackSim SpacePoints key"}
private

Definition at line 173 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATrackKey

SG::WriteHandleKey<FPGATrackSimTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackKey {this, "FPGATrackSimTrack1stKey","FPGATracks_1st","FPGATrackSim Tracks 1st stage key"}
private

Definition at line 181 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATrackSimMapping

ServiceHandle<IFPGATrackSimMappingSvc> FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
private

Definition at line 95 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_FPGATruthTrackKey

SG::ReadHandleKey<FPGATrackSimTruthTrackCollection> FPGATrackSimLogicalHitsProcessAlg::m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
private

Definition at line 183 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_houghRootOutputTool

ToolHandle<FPGATrackSimHoughRootOutputTool> FPGATrackSimLogicalHitsProcessAlg::m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
private

Definition at line 90 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_logicEventOutputHeader

FPGATrackSimLogicalEventOutputHeader* FPGATrackSimLogicalHitsProcessAlg::m_logicEventOutputHeader = nullptr
private

Definition at line 137 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_LRTRoadFilterTool

ToolHandle<FPGATrackSimLLPRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFilterTool {this, "LRTRoadFilter", "FPGATrackSimLLPRoadFilterTool/FPGATrackSimLLPRoadFilterTool", "LRT Road Filter Tool"}
private

Definition at line 85 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_LRTRoadFinderTool

ToolHandle<IFPGATrackSimRoadFinderTool> FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFinderTool {this, "LRTRoadFinder", "FPGATrackSimHoughTransform_d0phi0_Tool/FPGATrackSimHoughTransform_d0phi0_Tool", "LRT Road Finder Tool"}
private

Definition at line 86 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNRoadsFound

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNRoadsFound = 0
private

Definition at line 156 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksChi2OLRTot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2OLRTot = 0
private

Definition at line 159 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksChi2Tot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2Tot = 0
private

Definition at line 158 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_maxNTracksTot

unsigned long FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksTot = 0
private

Definition at line 157 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_monTool

ToolHandle<GenericMonitoringTool> FPGATrackSimLogicalHitsProcessAlg::m_monTool {this,"MonTool", "", "Monitoring tool"}
private

Definition at line 167 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_NNTrackTool

ToolHandle<FPGATrackSimNNTrackTool> FPGATrackSimLogicalHitsProcessAlg::m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool", "NN Track Tool"}
private

Definition at line 89 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nRoadsFound

long FPGATrackSimLogicalHitsProcessAlg::m_nRoadsFound = 0
private

Definition at line 151 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nRoadsTot

long FPGATrackSimLogicalHitsProcessAlg::m_nRoadsTot = 0
private

Definition at line 145 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2Found

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Found = 0
private

Definition at line 153 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2OLRFound

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRFound = 0
private

Definition at line 154 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2OLRTot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRTot = 0
private

Definition at line 148 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksChi2Tot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Tot = 0
private

Definition at line 147 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksFound

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksFound = 0
private

Definition at line 152 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_nTracksTot

long FPGATrackSimLogicalHitsProcessAlg::m_nTracksTot = 0
private

Definition at line 146 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_NumOfHitPerGrouping

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
private

Definition at line 117 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_outputBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
private

Definition at line 125 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_outputRoadUnionTool

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_outputRoadUnionTool {this, "outputRoadUnionTool", false, "If set to true, create LogicalEventInputHeader in output ROOT file using road union tool."}
private

Definition at line 120 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_overlapRemovalTool_1st

ToolHandle<FPGATrackSimOverlapRemovalTool> FPGATrackSimLogicalHitsProcessAlg::m_overlapRemovalTool_1st {this, "OverlapRemoval_1st", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_1st", "1st stage overlap removal tool"}
private

Definition at line 92 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_passLowestChi2TrackOnly

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_passLowestChi2TrackOnly {this,"passLowestChi2TrackOnly", false, "case when passing only lowest chi2 track per road"}
private

Definition at line 118 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_region

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_region {this, "Region", 0, "Region ID to assign to tracks"}
private

Definition at line 121 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFilterTool

ToolHandle<IFPGATrackSimRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool {this, "RoadFilter", "FPGATrackSimEtaPatternFilterTool", "Road Filter Tool"}
private

Definition at line 87 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFilterTool2

ToolHandle<IFPGATrackSimRoadFilterTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool2 {this, "RoadFilter2", "FPGATrackSimPhiRoadFilterTool", "Road Filter2 Tool"}
private

Definition at line 88 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_roadFinderTool

ToolHandle<FPGATrackSimRoadUnionTool> FPGATrackSimLogicalHitsProcessAlg::m_roadFinderTool {this, "RoadFinder", "FPGATrackSimPatternMatchTool", "Road Finder Tool"}
private

Definition at line 84 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_secondStageStrips

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_secondStageStrips {this, "secondStageStrips", true, "If set to true, strip hits/SPs go to the second stage. Otherwise they go to the first." }
private

Definition at line 119 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_SetTruthParametersForTracks

Gaudi::Property<int> FPGATrackSimLogicalHitsProcessAlg::m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
private

Definition at line 101 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for sliced hits in output ROOT file." }
private

Definition at line 124 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedFirstPixelHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedFirstPixelHeader = nullptr
private

Definition at line 133 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedHitHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedHitHeader = nullptr
private

Definition at line 132 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedSecondPixelHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedSecondPixelHeader = nullptr
private

Definition at line 134 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedStripHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedStripHeader = nullptr
private

Definition at line 135 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicedStripHeaderPreSP

FPGATrackSimLogicalEventInputHeader* FPGATrackSimLogicalHitsProcessAlg::m_slicedStripHeaderPreSP = nullptr
private

Definition at line 136 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceFirstPixelBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceFirstPixelBranch {this, "FirstPixelBranchName", "LogicalEventFirstPixelHeader", "Name of the branch for first stage pixel hits in output ROOT file"}
private

Definition at line 126 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceSecondPixelBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceSecondPixelBranch {this, "SecondPixelBranchName", "LogicalEventSecondPixelHeader", "Name of the branch for second stage pixel hits in output ROOT file"}
private

Definition at line 127 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceStripBranch

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranch {this, "StripBranchName", "LogicalEventSpacepointHeader", "Name of the branch for (post-SP) strip hits in output ROOT file"}
private

Definition at line 128 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_sliceStripBranchPreSP

Gaudi::Property<std::string> FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranchPreSP {this, "StripPreSPBranchName", "LogicalEventStripHeader", "Name of the branch for (pre-SP) strip hits in output ROOT file"}
private

Definition at line 129 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_slicingEngineTool

ToolHandle<FPGATrackSimSlicingEngineTool> FPGATrackSimLogicalHitsProcessAlg::m_slicingEngineTool {this, "SlicingEngineTool", "FPGATrackSimSlicingEngineTool/FPGATrackSimSlicingEngineTool", "Slicing engine tool"}
private

Definition at line 94 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_spacepoints

std::vector<FPGATrackSimCluster> FPGATrackSimLogicalHitsProcessAlg::m_spacepoints {}
private

Definition at line 141 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_spacepointsTool

ToolHandle<FPGATrackSimSpacePointsToolI> FPGATrackSimLogicalHitsProcessAlg::m_spacepointsTool {this, "SpacePointTool", "FPGATrackSimSpacePointsTool/FPGATrackSimSpacePointsTool", "Space Points Tool"}
private

Definition at line 83 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_trackFitterTool_1st

ToolHandle<FPGATrackSimTrackFitterTool> FPGATrackSimLogicalHitsProcessAlg::m_trackFitterTool_1st {this, "TrackFitter_1st", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_1st", "1st stage track fit tool"}
private

Definition at line 91 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_1st_guessedcheck

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_1st_guessedcheck
private

Definition at line 140 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_1st_nomiss

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_1st_nomiss
private

Definition at line 140 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_2nd_guessedcheck

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_2nd_guessedcheck
private

Definition at line 140 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_tracks_2nd_nomiss

std::vector<FPGATrackSimTrack> FPGATrackSimLogicalHitsProcessAlg::m_tracks_2nd_nomiss
private

Definition at line 140 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_trackScoreCut

Gaudi::Property<float> FPGATrackSimLogicalHitsProcessAlg::m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
private

Definition at line 115 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< Algorithm > >::m_varHandleArraysDeclared
privateinherited

Definition at line 399 of file AthCommonDataStore.h.

◆ m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< Algorithm > >::m_vhka
privateinherited

Definition at line 398 of file AthCommonDataStore.h.

◆ m_writeOutNonSPStripHits

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
private

Definition at line 116 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeOutputData

Gaudi::Property<bool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
private

Definition at line 114 of file FPGATrackSimLogicalHitsProcessAlg.h.

◆ m_writeOutputTool

ToolHandle<FPGATrackSimOutputHeaderTool> FPGATrackSimLogicalHitsProcessAlg::m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
private

Definition at line 93 of file FPGATrackSimLogicalHitsProcessAlg.h.


The documentation for this class was generated from the following files:
FPGATrackSimLogicalHitsProcessAlg::m_passLowestChi2TrackOnly
Gaudi::Property< bool > m_passLowestChi2TrackOnly
Definition: FPGATrackSimLogicalHitsProcessAlg.h:118
FPGATrackSimLogicalHitsProcessAlg::m_doSpacepoints
Gaudi::Property< bool > m_doSpacepoints
Definition: FPGATrackSimLogicalHitsProcessAlg.h:102
FPGATrackSimLogicalHitsProcessAlg::m_filterRoads
Gaudi::Property< bool > m_filterRoads
Definition: FPGATrackSimLogicalHitsProcessAlg.h:106
beamspotman.r
def r
Definition: beamspotman.py:672
FPGATrackSimLogicalHitsProcessAlg::m_maxNRoadsFound
unsigned long m_maxNRoadsFound
Definition: FPGATrackSimLogicalHitsProcessAlg.h:156
FPGATrackSimLogicalHitsProcessAlg::m_slicedSecondPixelHeader
FPGATrackSimLogicalEventInputHeader * m_slicedSecondPixelHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:134
FPGATrackSimLogicalHitsProcessAlg::m_writeOutputTool
ToolHandle< FPGATrackSimOutputHeaderTool > m_writeOutputTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:93
TrigDefs::Group
Group
Properties of a chain group.
Definition: GroupProperties.h:13
FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFinderTool
ToolHandle< IFPGATrackSimRoadFinderTool > m_LRTRoadFinderTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:86
FPGATrackSimLogicalHitsProcessAlg::m_doHoughRootOutput1st
Gaudi::Property< bool > m_doHoughRootOutput1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:108
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_2nd
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey_2nd
Definition: FPGATrackSimLogicalHitsProcessAlg.h:177
TRTCalib_Extractor.hits
hits
Definition: TRTCalib_Extractor.py:35
FPGATrackSimLogicalHitsProcessAlg::m_spacepointsTool
ToolHandle< FPGATrackSimSpacePointsToolI > m_spacepointsTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:83
FPGATrackSimLogicalHitsProcessAlg::m_doGNNPixelSeeding
Gaudi::Property< bool > m_doGNNPixelSeeding
Definition: FPGATrackSimLogicalHitsProcessAlg.h:111
FPGATrackSimLogicalHitsProcessAlg::m_description
std::string m_description
Definition: FPGATrackSimLogicalHitsProcessAlg.h:80
PowhegControl_ttHplus_NLO.ss
ss
Definition: PowhegControl_ttHplus_NLO.py:83
FPGATrackSimLogicalHitsProcessAlg::m_logicEventOutputHeader
FPGATrackSimLogicalEventOutputHeader * m_logicEventOutputHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:137
FPGATrackSimLogicalHitsProcessAlg::m_FPGARoadKey
SG::WriteHandleKey< FPGATrackSimRoadCollection > m_FPGARoadKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:180
FPGATrackSimLogicalHitsProcessAlg::m_slicedHitHeader
FPGATrackSimLogicalEventInputHeader * m_slicedHitHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:132
ATH_MSG_INFO
#define ATH_MSG_INFO(x)
Definition: AthMsgStreamMacros.h:31
FPGATrackSimLogicalHitsProcessAlg::m_nTracksTot
long m_nTracksTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:146
FPGATrackSimCluster
Definition: FPGATrackSimCluster.h:24
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitInRoadsKey
SG::WriteHandleKey< FPGATrackSimHitContainer > m_FPGAHitInRoadsKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:179
FPGATrackSimTrack
Definition: FPGATrackSimTrack.h:18
FPGATrackSimLogicalHitsProcessAlg::m_region
Gaudi::Property< int > m_region
Definition: FPGATrackSimLogicalHitsProcessAlg.h:121
SG::ReadHandle
Definition: StoreGate/StoreGate/ReadHandle.h:67
FPGATrackSimLogicalEventOutputHeader::reserveFPGATrackSimRoads_1st
void reserveFPGATrackSimRoads_1st(size_t size)
Definition: FPGATrackSimLogicalEventOutputHeader.h:24
FPGATrackSimLogicalHitsProcessAlg::m_LRTRoadFilterTool
ToolHandle< FPGATrackSimLLPRoadFilterTool > m_LRTRoadFilterTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:85
FPGATrackSimLogicalHitsProcessAlg::m_doTracking
Gaudi::Property< bool > m_doTracking
Definition: FPGATrackSimLogicalHitsProcessAlg.h:103
FPGATrackSimLogicalHitsProcessAlg::m_writeOutNonSPStripHits
Gaudi::Property< bool > m_writeOutNonSPStripHits
Definition: FPGATrackSimLogicalHitsProcessAlg.h:116
FPGATrackSimLogicalHitsProcessAlg::m_FPGATruthTrackKey
SG::ReadHandleKey< FPGATrackSimTruthTrackCollection > m_FPGATruthTrackKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:183
AthCommonDataStore< AthCommonMsg< Algorithm > >::m_evtStore
StoreGateSvc_t m_evtStore
Pointer to StoreGate (event store by default)
Definition: AthCommonDataStore.h:390
FPGATrackSimLogicalHitsProcessAlg::m_evtSel
ServiceHandle< IFPGATrackSimEventSelectionSvc > m_evtSel
Definition: FPGATrackSimLogicalHitsProcessAlg.h:96
AthCommonDataStore< AthCommonMsg< Algorithm > >::m_vhka
std::vector< SG::VarHandleKeyArray * > m_vhka
Definition: AthCommonDataStore.h:398
FPGATrackSimLogicalEventOutputHeader::reset
void reset()
Definition: FPGATrackSimLogicalEventOutputHeader.cxx:12
FPGATrackSimLogicalHitsProcessAlg::m_writeOutputData
Gaudi::Property< bool > m_writeOutputData
Definition: FPGATrackSimLogicalHitsProcessAlg.h:114
FPGATrackSimLogicalHitsProcessAlg::m_spacepoints
std::vector< FPGATrackSimCluster > m_spacepoints
Definition: FPGATrackSimLogicalHitsProcessAlg.h:141
FPGATrackSimLogicalHitsProcessAlg::m_FPGAEventInfoKey
SG::ReadHandleKey< FPGATrackSimEventInfo > m_FPGAEventInfoKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:185
UploadAMITag.l
list l
Definition: UploadAMITag.larcaf.py:157
FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2OLRTot
unsigned long m_maxNTracksChi2OLRTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:159
FPGATrackSimLogicalHitsProcessAlg::m_overlapRemovalTool_1st
ToolHandle< FPGATrackSimOverlapRemovalTool > m_overlapRemovalTool_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:92
read_hist_ntuple.t
t
Definition: read_hist_ntuple.py:5
FPGATrackSimLogicalHitsProcessAlg::m_sliceFirstPixelBranch
Gaudi::Property< std::string > m_sliceFirstPixelBranch
Definition: FPGATrackSimLogicalHitsProcessAlg.h:126
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitFilteredKey
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitFilteredKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:178
FPGATrackSimLogicalHitsProcessAlg::m_FPGAOfflineTrackKey
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollection > m_FPGAOfflineTrackKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:184
FPGATrackSimLogicalHitsProcessAlg::m_doNNTrack
Gaudi::Property< bool > m_doNNTrack
Definition: FPGATrackSimLogicalHitsProcessAlg.h:109
FPGATrackSimTrack::setFPGATrackSimHit
void setFPGATrackSimHit(unsigned i, const FPGATrackSimHit &hit)
Definition: FPGATrackSimTrack.cxx:98
FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackKey
SG::WriteHandleKey< FPGATrackSimTrackCollection > m_FPGATrackKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:181
FPGATrackSimLogicalHitsProcessAlg::m_evt_truth
double m_evt_truth
Definition: FPGATrackSimLogicalHitsProcessAlg.h:150
dq_defect_bulk_create_defects.line
line
Definition: dq_defect_bulk_create_defects.py:27
FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksTot
unsigned long m_maxNTracksTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:157
FPGATrackSimLogicalHitsProcessAlg::m_monTool
ToolHandle< GenericMonitoringTool > m_monTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:167
FPGATrackSimLogicalEventOutputHeader::getDataFlowInfo
FPGATrackSimDataFlowInfo const & getDataFlowInfo() const
Definition: FPGATrackSimLogicalEventOutputHeader.h:47
AthenaPoolTestRead.sc
sc
Definition: AthenaPoolTestRead.py:27
SG::VarHandleKeyArray::setOwner
virtual void setOwner(IDataHandleHolder *o)=0
FPGATrackSimHit
Definition: FPGATrackSimHit.h:41
FPGATrackSimLogicalHitsProcessAlg::m_evt
double m_evt
Definition: FPGATrackSimLogicalHitsProcessAlg.h:144
IDTPMcnv.htype
htype
Definition: IDTPMcnv.py:29
FPGATrackSimLogicalHitsProcessAlg::m_trackScoreCut
Gaudi::Property< float > m_trackScoreCut
Definition: FPGATrackSimLogicalHitsProcessAlg.h:115
FPGATrackSimLogicalHitsProcessAlg::m_doLRTHitFiltering
Gaudi::Property< bool > m_doLRTHitFiltering
Definition: FPGATrackSimLogicalHitsProcessAlg.h:113
FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool2
ToolHandle< IFPGATrackSimRoadFilterTool > m_roadFilterTool2
Definition: FPGATrackSimLogicalHitsProcessAlg.h:88
AthCommonDataStore::declareGaudiProperty
Gaudi::Details::PropertyBase & declareGaudiProperty(Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
specialization for handling Gaudi::Property<SG::VarHandleKey>
Definition: AthCommonDataStore.h:156
Hit
Definition: Simulation/ISF/ISF_FastCaloSim/ISF_FastCaloGpu/ISF_FastCaloGpu/Hit.h:16
FPGATrackSimEventInfo
Definition: FPGATrackSimEventInfo.h:14
python.utils.AtlRunQueryDQUtils.p
p
Definition: AtlRunQueryDQUtils.py:209
AthCommonDataStore
Definition: AthCommonDataStore.h:52
AthAlgorithm::sysInitialize
virtual StatusCode sysInitialize() override
Override sysInitialize.
Definition: AthAlgorithm.cxx:66
ATH_MSG_ERROR
#define ATH_MSG_ERROR(x)
Definition: AthMsgStreamMacros.h:33
FPGATrackSimLogicalEventOutputHeader::reserveFPGATrackSimTracks_1st
void reserveFPGATrackSimTracks_1st(size_t size)
Definition: FPGATrackSimLogicalEventOutputHeader.h:37
AthCommonDataStore< AthCommonMsg< Algorithm > >::outputHandles
virtual std::vector< Gaudi::DataHandle * > outputHandles() const override
Return this algorithm's output handles.
FPGATrackSimLogicalHitsProcessAlg::m_roadFinderTool
ToolHandle< FPGATrackSimRoadUnionTool > m_roadFinderTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:84
roadsToTrack
void roadsToTrack(std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads, std::vector< FPGATrackSimTrack > &track_cands, const FPGATrackSimPlaneMap *pmap)
Definition: FPGATrackSimHoughFunctions.cxx:674
FPGATrackSimLogicalHitsProcessAlg::m_SetTruthParametersForTracks
Gaudi::Property< int > m_SetTruthParametersForTracks
Definition: FPGATrackSimLogicalHitsProcessAlg.h:101
EL::StatusCode
::StatusCode StatusCode
StatusCode definition for legacy code.
Definition: PhysicsAnalysis/D3PDTools/EventLoop/EventLoop/StatusCode.h:22
FPGATrackSimLogicalEventOutputHeader::addFPGATrackSimRoads_1st
void addFPGATrackSimRoads_1st(const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads_1st)
Definition: FPGATrackSimLogicalEventOutputHeader.h:25
ATH_MSG_DEBUG
#define ATH_MSG_DEBUG(x)
Definition: AthMsgStreamMacros.h:29
AthCommonDataStore::declareProperty
Gaudi::Details::PropertyBase & declareProperty(Gaudi::Property< T, V, H > &t)
Definition: AthCommonDataStore.h:145
TRT::Hit::layer
@ layer
Definition: HitInfo.h:79
FPGATrackSimLogicalHitsProcessAlg::m_doOverlapRemoval
Gaudi::Property< bool > m_doOverlapRemoval
Definition: FPGATrackSimLogicalHitsProcessAlg.h:104
chi2
double chi2(TH1 *h0, TH1 *h1)
Definition: comparitor.cxx:525
FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranchPreSP
Gaudi::Property< std::string > m_sliceStripBranchPreSP
Definition: FPGATrackSimLogicalHitsProcessAlg.h:129
ATH_CHECK
#define ATH_CHECK
Definition: AthCheckMacros.h:40
FPGATrackSimLogicalHitsProcessAlg::m_outputRoadUnionTool
Gaudi::Property< bool > m_outputRoadUnionTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:120
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey_1st
SG::WriteHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:176
AthCommonDataStore< AthCommonMsg< Algorithm > >::m_detStore
StoreGateSvc_t m_detStore
Pointer to StoreGate (detector store by default)
Definition: AthCommonDataStore.h:393
FPGATrackSimLogicalHitsProcessAlg::writeOutputData
StatusCode writeOutputData(const std::vector< std::shared_ptr< const FPGATrackSimRoad >> &roads_1st, std::vector< FPGATrackSimTrack > const &tracks_1st, FPGATrackSimDataFlowInfo const *dataFlowInfo)
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:511
FPGATrackSimLogicalHitsProcessAlg::m_FPGAHitKey
SG::ReadHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:170
FPGATrackSimLogicalEventInputHeader::newEvent
void newEvent(FPGATrackSimEventInfo &event)
Definition: FPGATrackSimLogicalEventInputHeader.h:29
SG::VarHandleKey::initialize
StatusCode initialize(bool used=true)
If this object is used as a property, then this should be called during the initialize phase.
Definition: AthToolSupport/AsgDataHandles/Root/VarHandleKey.cxx:103
FPGATrackSimLogicalHitsProcessAlg::m_slicedStripHeaderPreSP
FPGATrackSimLogicalEventInputHeader * m_slicedStripHeaderPreSP
Definition: FPGATrackSimLogicalHitsProcessAlg.h:136
FPGATrackSimLogicalHitsProcessAlg::m_sliceBranch
Gaudi::Property< std::string > m_sliceBranch
Definition: FPGATrackSimLogicalHitsProcessAlg.h:124
FPGATrackSimLogicalEventOutputHeader::setDataFlowInfo
void setDataFlowInfo(FPGATrackSimDataFlowInfo const &info)
Definition: FPGATrackSimLogicalEventOutputHeader.h:48
FPGATrackSimLogicalEventInputHeader::reset
void reset()
Definition: FPGATrackSimLogicalEventInputHeader.cxx:10
FPGATrackSimLogicalHitsProcessAlg::m_chrono
ServiceHandle< IChronoStatSvc > m_chrono
Definition: FPGATrackSimLogicalHitsProcessAlg.h:98
FPGATrackSimLogicalHitsProcessAlg::m_nTracksFound
long m_nTracksFound
Definition: FPGATrackSimLogicalHitsProcessAlg.h:152
SG::VarHandleKeyArray::renounce
virtual void renounce()=0
FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Tot
long m_nTracksChi2Tot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:147
SG::HandleClassifier::type
std::conditional< std::is_base_of< SG::VarHandleKeyArray, T >::value, VarHandleKeyArrayType, type2 >::type type
Definition: HandleClassifier.h:54
FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRFound
long m_nTracksChi2OLRFound
Definition: FPGATrackSimLogicalHitsProcessAlg.h:154
merge_scale_histograms.doc
string doc
Definition: merge_scale_histograms.py:9
name
std::string name
Definition: Control/AthContainers/Root/debug.cxx:240
FPGATrackSimLogicalHitsProcessAlg::m_maxNTracksChi2Tot
unsigned long m_maxNTracksChi2Tot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:158
FPGATrackSimLogicalEventOutputHeader::addFPGATrackSimTracks_1st
void addFPGATrackSimTracks_1st(std::vector< FPGATrackSimTrack > const &tracks_1st)
Definition: FPGATrackSimLogicalEventOutputHeader.h:38
ActsTrk::to_string
std::string to_string(const DetectorType &type)
Definition: GeometryDefs.h:34
plotBeamSpotMon.b
b
Definition: plotBeamSpotMon.py:76
FPGATrackSimLogicalHitsProcessAlg::m_slicedStripHeader
FPGATrackSimLogicalEventInputHeader * m_slicedStripHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:135
FPGATrackSimLogicalHitsProcessAlg::m_sliceSecondPixelBranch
Gaudi::Property< std::string > m_sliceSecondPixelBranch
Definition: FPGATrackSimLogicalHitsProcessAlg.h:127
FPGATrackSimLogicalHitsProcessAlg::m_trackFitterTool_1st
ToolHandle< FPGATrackSimTrackFitterTool > m_trackFitterTool_1st
Definition: FPGATrackSimLogicalHitsProcessAlg.h:91
FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2Found
long m_nTracksChi2Found
Definition: FPGATrackSimLogicalHitsProcessAlg.h:153
SG::WriteHandle
Definition: StoreGate/StoreGate/WriteHandle.h:73
AthAlgorithm::m_extendedExtraObjects
DataObjIDColl m_extendedExtraObjects
Definition: AthAlgorithm.h:79
FPGATrackSimLogicalHitsProcessAlg::m_nRoadsTot
long m_nRoadsTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:145
FPGATrackSimLogicalHitsProcessAlg::m_nTracksChi2OLRTot
long m_nTracksChi2OLRTot
Definition: FPGATrackSimLogicalHitsProcessAlg.h:148
a
TList * a
Definition: liststreamerinfos.cxx:10
h
FPGATrackSimLogicalHitsProcessAlg::m_roadFilterTool
ToolHandle< IFPGATrackSimRoadFilterTool > m_roadFilterTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:87
ATH_MSG_WARNING
#define ATH_MSG_WARNING(x)
Definition: AthMsgStreamMacros.h:32
FPGATrackSimLogicalHitsProcessAlg::m_sliceStripBranch
Gaudi::Property< std::string > m_sliceStripBranch
Definition: FPGATrackSimLogicalHitsProcessAlg.h:128
FPGATrackSimLogicalHitsProcessAlg::m_doLRT
Gaudi::Property< bool > m_doLRT
Definition: FPGATrackSimLogicalHitsProcessAlg.h:112
SG::VarHandleBase::vhKey
SG::VarHandleKey & vhKey()
Return a non-const reference to the HandleKey.
Definition: StoreGate/src/VarHandleBase.cxx:629
FPGATrackSimLogicalHitsProcessAlg::m_FPGASpacePointsKey
SG::WriteHandleKey< FPGATrackSimClusterCollection > m_FPGASpacePointsKey
Definition: FPGATrackSimLogicalHitsProcessAlg.h:173
FPGATrackSimLogicalHitsProcessAlg::m_slicingEngineTool
ToolHandle< FPGATrackSimSlicingEngineTool > m_slicingEngineTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:94
FPGATrackSimLogicalEventInputHeader::towers
const std::vector< FPGATrackSimTowerInputHeader > & towers() const
Definition: FPGATrackSimLogicalEventInputHeader.h:36
AthAlgorithm::AthAlgorithm
AthAlgorithm()
Default constructor:
python.Bindings.keys
keys
Definition: Control/AthenaPython/python/Bindings.py:801
FPGATrackSimLogicalHitsProcessAlg::m_nRoadsFound
long m_nRoadsFound
Definition: FPGATrackSimLogicalHitsProcessAlg.h:151
enableBenchmark
constexpr bool enableBenchmark
Definition: FPGATrackSimLogicalHitsProcessAlg.cxx:27
xAOD::track
@ track
Definition: TrackingPrimitives.h:513
LHEF::Writer
Pythia8::Writer Writer
Definition: Prophecy4fMerger.cxx:12
FPGATrackSimLogicalHitsProcessAlg::m_slicedFirstPixelHeader
FPGATrackSimLogicalEventInputHeader * m_slicedFirstPixelHeader
Definition: FPGATrackSimLogicalHitsProcessAlg.h:133
Monitored::Scalar
Declare a monitored scalar variable.
Definition: MonitoredScalar.h:34
FPGATrackSimTrack::setNLayers
void setNLayers(int)
set the number of layers in the track.
Definition: FPGATrackSimTrack.cxx:107
FPGATrackSimLogicalHitsProcessAlg::m_filterRoads2
Gaudi::Property< bool > m_filterRoads2
Definition: FPGATrackSimLogicalHitsProcessAlg.h:107
FPGATrackSimLogicalHitsProcessAlg::m_NumOfHitPerGrouping
Gaudi::Property< int > m_NumOfHitPerGrouping
Definition: FPGATrackSimLogicalHitsProcessAlg.h:117
FPGATrackSimLogicalHitsProcessAlg::m_outputBranch
Gaudi::Property< std::string > m_outputBranch
Definition: FPGATrackSimLogicalHitsProcessAlg.h:125
FPGATrackSimLogicalHitsProcessAlg::m_doGNNTrack
Gaudi::Property< bool > m_doGNNTrack
Definition: FPGATrackSimLogicalHitsProcessAlg.h:110
FPGATrackSimLogicalHitsProcessAlg::m_secondStageStrips
Gaudi::Property< bool > m_secondStageStrips
Definition: FPGATrackSimLogicalHitsProcessAlg.h:119
FPGATrackSimLogicalHitsProcessAlg::m_NNTrackTool
ToolHandle< FPGATrackSimNNTrackTool > m_NNTrackTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:89
FPGATrackSimLogicalHitsProcessAlg::m_houghRootOutputTool
ToolHandle< FPGATrackSimHoughRootOutputTool > m_houghRootOutputTool
Definition: FPGATrackSimLogicalHitsProcessAlg.h:90
fitman.k
k
Definition: fitman.py:528
FPGATrackSimLogicalHitsProcessAlg::m_FPGATrackSimMapping
ServiceHandle< IFPGATrackSimMappingSvc > m_FPGATrackSimMapping
Definition: FPGATrackSimLogicalHitsProcessAlg.h:95
ServiceHandle< ICondSvc >