ATLAS Offline Software
SectorLogic.cxx
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1 /*
2  Copyright (C) 2002-2024 CERN for the benefit of the ATLAS collaboration
3 */
4 
5 //****************************************************************************//
6 //* *//
7 //* Original code from Andrea Salamon *//
8 //* *//
9 //****************************************************************************//
10 //
11 // 20/01/2004 A. Nisati First code cleaning + use of BaseObject
12 // 17/07/2009 A. Salamon Added output from all BCs + fixed one bug
13 // (mask for bcid output in SectorLogic::output)
14 // 21/02/2011 M. Corradi & Fixed overlap resolution algorithm for new
15 // A. Salamon RoI geometry
16 //
17 //****************************************************************************//
18 //
20 
21 using namespace std;
22 
23 //
24 // Some usefull functions
25 //****************************************************************************//
26 // returns bits from lsb to msb right aligned
27 CMAword getbits(CMAword x, int msb, int lsb) { return ~(~0u << (msb - lsb + 1)) & (x >> lsb); }
28 //****************************************************************************//
29 // returns bits from lsb to msb right aligned
30 // sets bits between lsb and msb of x to first (msb - lsb + 1) right
31 // bits of y, remaining bits are left unchanged
32 unsigned setbits(unsigned x, int msb, int lsb, unsigned y) {
33  unsigned mask = 0u;
34  mask = (~0u << (msb + 1)) | ~(~0u << lsb);
35  return (x & mask) | (y << lsb);
36 }
37 //****************************************************************************//
38 // returns bits from lsb to msb right aligned
39 // ### DataFromPad ###
40 
41 // constructor of the class
42 // sets all the fields to 0
43 
44 //****************************************************************************//
45 // prints the mask for DataFromPad
46 ostream &dfpa(ostream &stream, int indent, int whitesp, int ntimes) {
47  int iind = 0, iwhit = 0, itime = 0;
48  for (iind = 0; iind <= indent - 1; iind++) stream << " ";
49  for (itime = 0; itime <= ntimes - 1; itime++) {
50  for (iwhit = 0; iwhit <= whitesp - 1; iwhit++) stream << " ";
51  stream << "b o r o o p m n s";
52  }
53  stream << std::endl;
54  for (iind = 0; iind <= indent - 1; iind++) stream << " ";
55  for (itime = 0; itime <= ntimes - 1; itime++) {
56  for (iwhit = 0; iwhit <= whitesp - 1; iwhit++) stream << " ";
57  stream << "c p s e f t t t g";
58  }
59  stream << std::endl;
60  return stream;
61 }
62 //****************************************************************************//
63 // overload of the << operator for DataFromPad
64 ostream &operator<<(ostream &stream, const DataFromPad& o) {
65  stream.width(3);
66  stream.fill('x');
67  stream << o.bcid << " ";
68  stream.width(1);
69  stream.fill(' ');
70  stream << o.opl << " ";
71  stream << o.r << " ";
72  stream << o.oveta << " ";
73  stream << o.ovphi << " ";
74  stream << o.pt << " ";
75  stream << o.roi << " ";
76  stream << o.ntrig << " ";
77  stream << o.sign;
78  return stream;
79 }
80 
81 //****************************************************************************//
82 // prints the mask for OutputFromSectorLogic
83 ostream &ofsla(ostream &stream, int indent, int whitesp, int ntimes) {
84  int iind = 0, iwhit = 0, itime = 0;
85  for (iind = 0; iind <= indent - 1; iind++) stream << " ";
86  for (itime = 0; itime <= ntimes - 1; itime++) {
87  for (iwhit = 0; iwhit <= whitesp - 1; iwhit++) stream << " ";
88  stream << "ss bnnppoorproorprn";
89  }
90  stream << std::endl;
91  for (iind = 0; iind <= indent - 1; iind++) stream << " ";
92  for (itime = 0; itime <= ntimes - 1; itime++) {
93  for (iwhit = 0; iwhit <= whitesp - 1; iwhit++) stream << " ";
94  stream << "gg cttttefsdiefsdit";
95  }
96  stream << std::endl;
97  for (iind = 0; iind <= indent - 1; iind++) stream << " ";
98  for (itime = 0; itime <= ntimes - 1; itime++) {
99  for (iwhit = 0; iwhit <= whitesp - 1; iwhit++) stream << " ";
100  stream << "21 21212222211111 ";
101  }
102  stream << std::endl;
103  return stream;
104 }
105 //****************************************************************************//
106 // overload of the << operator
107 ostream &operator<<(ostream &stream, OutputFromSectorLogic &o) {
108  // stream << "x x ";
109  stream.setf(std::ios::dec, std::ios::basefield);
110  // stream << setw(3);
111  stream << o.sign2;
112  stream << o.sign1;
113  stream.width(3);
114  stream.fill('x');
115  stream << o.bcid;
116  stream.width(1);
117  stream.fill(' ');
118  stream << o.ntrig2;
119  stream << o.ntrig1;
120  stream << o.pt2;
121  stream << o.pt1;
122  stream << o.ove2;
123  stream << o.ovf2;
124  stream << o.r2;
125  stream << o.pad2;
126  stream << o.roi2;
127  stream << o.ove1;
128  stream << o.ovf1;
129  stream << o.r1;
130  stream << o.pad1;
131  stream << o.roi1;
132  stream << o.ntrig;
133  return stream;
134 }
135 //****************************************************************************//
136 
137 // ### InternalRegister ###
138 
139 // overload of the << operator
140 ostream &operator<<(ostream &stream, InternalRegister &o) {
141  int j = 0;
142  for (j = 0; j <= 7; j++) {
143  stream << "pad[" << j << "] : ";
144  stream << o.pad[j] << std::endl;
145  }
146  stream.setf(ios::hex, ios::basefield);
147  stream << "tile : " << o.tile << std::endl;
148  stream << "sl out : " << o.out;
149  stream.setf(ios::hex, ios::basefield);
150  return stream;
151 }
152 //****************************************************************************//
153 // ### SectorLogic ###
154 
155 // standard constructor of the class
156 SectorLogic::SectorLogic(int run, int event, CMAword debug, ubit16 subsys, ubit16 sect, bool oldSimulation, uint NOBXS, uint BCZERO) :
157  BaseObject(Hardware, "SectorLogic") {
158  // identificazione sector logic di aleandro
159  m_run = run;
160  m_event = event;
161  m_debug = debug;
162  m_subsys = subsys;
163  m_sect = sect;
164  m_oldSimulation = oldSimulation;
165 
166  //
167  // define m_nBunMax
168  //
169  m_nBunMax = NOBXS;
170  m_bczero = BCZERO;
171  // reset TC and OPL check parameters
172  // EnableTCCheck and m_EnableOPLCheck
173  m_EnableTCCheckLow = 0x00000000;
174  m_EnableTCCheckHigh = 0x00000000;
175  m_EnableOPLCheck = 0x00000000;
176  // m_SetTCCheck and m_SetOPLCheck
177  int j = 0;
178  int k = 0;
179  for (j = 0; j <= 7; j++) {
180  // low pT
181  for (k = 0; k <= 2; k++) {
182  m_SetTCCheck[j][k] = 0;
183  m_SetOPLCheck[j][k] = 0;
184  }
185  // high pT
186  for (k = 3; k <= 5; k++) { m_SetTCCheck[j][k] = 0; }
187  }
188 }
189 //****************************************************************************//
190 // destructor of the class
192 //****************************************************************************//
193 
195  int bunchID = m_bczero + deltaBC;
196  if (bunchID < m_nBunMax && bunchID >= 0) {
197  ubit16 bxsafe = (ubit16)bunchID;
198  return output(bxsafe);
199  } else {
200  throw std::out_of_range("SectorLogic::outputToMuCTPI: bunchID out of range: " + std::to_string(bunchID));
201  }
202 }
203 
204 // OLD VERSION
205 /*
206 CMAword SectorLogic::outputToMuCTPI(ubit16 bunchID) {
207  ubit16 bxsafe=BCZERO;
208  if( bunchID <= m_nBunMax-1 ) {
209  bxsafe=bunchID;
210  } else {
211  cout << "warning : bunchID out of range, set to default value" << bxsafe << std::endl;
212  }
213  return output(bxsafe);
214 }
215 */
216 
217 // initializes the array
218 void SectorLogic::init(void) {}
219 //****************************************************************************//
220 // @@@@@ check the internal registers of the Sector Logic
221 void SectorLogic::check(void) {
222  int bcid;
223 
224  for (bcid = 0; bcid <= m_nBunMax - 1; bcid++) {
225  cout << "LowPtFilter_in BCID is " << m_LowPtFilter_in[bcid].out.bcid << std::endl
226  << "LowPtFilter_out BCID is " << m_LowPtFilter_out[bcid].out.bcid << std::endl
227 
228  << "TileCalConfirm_in BCID is " << m_TileCalConfirm_in[bcid].out.bcid << std::endl
229  << "TileCalConfirm_out BCID is " << m_TileCalConfirm_out[bcid].out.bcid << std::endl
230 
231  << "SolveEtaOverlap_in BCID is " << m_SolveEtaOverlap_in[bcid].out.bcid << std::endl
232  << "SolveEtaOverlap_out BCID is " << m_SolveEtaOverlap_out[bcid].out.bcid << std::endl
233 
234  << "SortHighest_in BCID is " << m_SortHighest_in[bcid].out.bcid << std::endl
235  << "SortHighest_out BCID is " << m_SortHighest_out[bcid].out.bcid << std::endl
236 
237  << "Sort2ndHighest_in BCID is " << m_Sort2ndHighest_in[bcid].out.bcid << std::endl
238  << "Sort2ndHighest_out BCID is " << m_Sort2ndHighest_out[bcid].out.bcid << std::endl;
239  }
240 }
241 //****************************************************************************//
242 // tile cal check configuration
243 void SectorLogic::LoadTCCheck(CMAword EnableTCCheckLow_in, CMAword EnableTCCheckHigh_in, CMAword SetTCCheck_in[8][6]) {
244  m_EnableTCCheckLow = EnableTCCheckLow_in;
245  m_EnableTCCheckHigh = EnableTCCheckHigh_in;
246  int i = 0;
247  int j = 0;
248  for (i = 0; i <= 7; i++) {
249  for (j = 0; j <= 5; j++) { m_SetTCCheck[i][j] = SetTCCheck_in[i][j]; }
250  }
251 }
252 //****************************************************************************//
253 // opl check configuration
254 void SectorLogic::LoadOPLCheck(CMAword EnableOPLCheck_in, ubit16 SetOPLCheck_in[8][3]) {
255  m_EnableOPLCheck = EnableOPLCheck_in;
256  int i = 0;
257  int j = 0;
258  for (i = 0; i <= 7; i++) {
259  for (j = 0; j <= 2; j++) { m_SetOPLCheck[i][j] = SetOPLCheck_in[i][j]; }
260  }
261 }
262 //****************************************************************************//
263 // @@@@@ input, output and clock methods @@@@@
264 void SectorLogic::dbginput(ubit16 bx, DataFromPad from_pad[8], CMAword from_tile_cal) {
265  // int BCID_now = bx%8;
266 
267  int ipad = 0;
268  for (ipad = 0; ipad <= 7; ipad++) { m_InFromPad[bx][ipad] = from_pad[ipad]; }
269  m_InFromTileCal[bx] = from_tile_cal;
270 }
271 //****************************************************************************//
272 void SectorLogic::load(ubit16 padAdd, ubit16 BX, ubit16 RoIAdd, ubit16 pT, ubit16 OPL, ubit16 overlapPhi, ubit16 overlapEta,
273  ubit16 RoiAmbiguity, ubit16 BCIDcounter) {
274  m_InFromPad[BX][padAdd].bcid = BCIDcounter;
275  m_InFromPad[BX][padAdd].r = RoiAmbiguity;
276  m_InFromPad[BX][padAdd].oveta = overlapEta;
277  m_InFromPad[BX][padAdd].ovphi = overlapPhi;
278  m_InFromPad[BX][padAdd].opl = OPL;
279  m_InFromPad[BX][padAdd].pt = pT;
280  m_InFromPad[BX][padAdd].roi = RoIAdd;
281 
282  m_InFromTileCal[BX] = 0xff;
283 
284  /*
285  cout << "input from pad : BC = " << BX << " padAdd = " << padAdd
286  << " pT = "<< pT << " roi = " << RoIAdd << " bcid = " << BCIDcounter << std::endl;
287  */
288 }
289 //****************************************************************************//
291 //****************************************************************************//
293  CMAword fmtout = 0;
294 
295  ubit16 slroi1 = 0;
296  ubit16 slroi2 = 0;
297 
298  if (m_oldSimulation) {
299  if (m_OutFromSectorLogic[i].pt1) // aleandro addendum 6-10-2003
300  slroi1 = (m_OutFromSectorLogic[i].pad1) * 4 + (m_OutFromSectorLogic[i].roi1) + 1;
301  if (m_OutFromSectorLogic[i].pt2) // aleandro addendum 6-10-2003
302  slroi2 = (m_OutFromSectorLogic[i].pad2) * 4 + (m_OutFromSectorLogic[i].roi2) + 1;
303  } else {
304  if (m_OutFromSectorLogic[i].pt1) // aleandro addendum 6-10-2003
305  slroi1 = (m_OutFromSectorLogic[i].pad1) * 4 + (m_OutFromSectorLogic[i].roi1);
306  if (m_OutFromSectorLogic[i].pt2) // aleandro addendum 6-10-2003
307  slroi2 = (m_OutFromSectorLogic[i].pad2) * 4 + (m_OutFromSectorLogic[i].roi2);
308  }
309 
310  // MC 2015/7/7 add bc information
311  ubit16 bc = 0;
312  if (i > m_bczero) {
313  bc = i - m_bczero;
314  } else if (i < m_bczero) {
315  bc = i + 8 - m_bczero;
316  }
317 
318  if (m_OutFromSectorLogic[i].pt1 == 0) m_OutFromSectorLogic[i].pt1 = 7;
319  if (m_OutFromSectorLogic[i].pt2 == 0) m_OutFromSectorLogic[i].pt2 = 7;
320 
321  fmtout = fmtout | (((m_OutFromSectorLogic[i].ntrig > 2) & 0x01) << 0); // >2 candidates in a sector
322  fmtout = fmtout | ((slroi1 & 0x1f) << 1); // ROI1
323  fmtout = fmtout | ((0 & 0x03) << 6); // Reserved1
324  fmtout = fmtout | ((m_OutFromSectorLogic[i].ovf1 & 0x01) << 8); // Phi overlap1
325  fmtout = fmtout | ((m_OutFromSectorLogic[i].ove1 & 0x01) << 9); // Eta overlap1
326  fmtout = fmtout | ((slroi2 & 0x1f) << 10); // ROI2
327  fmtout = fmtout | ((0 & 0x03) << 15); // Reserved2
328  fmtout = fmtout | ((m_OutFromSectorLogic[i].ovf2 & 0x01) << 17); // Phi overlap2
329  fmtout = fmtout | ((m_OutFromSectorLogic[i].ove2 & 0x01) << 18); // Eta overlap2
330  fmtout = fmtout | ((m_OutFromSectorLogic[i].pt1 & 0x07) << 19); // Pt1
331  fmtout = fmtout | ((m_OutFromSectorLogic[i].pt2 & 0x07) << 22); // Pt2
332  fmtout = fmtout | ((m_OutFromSectorLogic[i].r1 & 0x01) << 25); // >1 candidate in ROI1
333  fmtout = fmtout | ((m_OutFromSectorLogic[i].r2 & 0x01) << 26); // >1 candidate in ROI2
334  fmtout = fmtout | ((bc & 0x07) << 27); // BCID
335  fmtout = fmtout | ((m_OutFromSectorLogic[i].sign1 & 0x01) << 30); // Candidate1 sign
336  // explicit cast to suppress cppcheck warning about bit shift overflow
337  fmtout = fmtout | (static_cast<CMAword>(m_OutFromSectorLogic[i].sign2 & 0x01) << 31); // Candidate2 sign
338 
339  return fmtout;
340 }
341 //****************************************************************************//
343  // executes sector logic algorithm for all input bunches
344  int ibx = 0;
345  for (ibx = 0; ibx <= m_nBunMax - 1; ibx++) {
346  // the content of the SL input registers are copied in the 1st input
347  // register
348  int ipad = 0;
349  for (ipad = 0; ipad <= 7; ipad++) { m_LowPtFilter_in[ibx].pad[ipad] = m_InFromPad[ibx][ipad]; }
350  m_LowPtFilter_in[ibx].tile = m_InFromTileCal[ibx];
351 
352  // @@@@@ 1st step registers
353  // @@@@@ low Pt filter
354  // if there is a low Pt track in the pad and the OPL check option is on
355  // looks for OPL confirmation in the other pads mapped for OPL check
356  m_LowPtFilter_in[ibx].out.bcid = m_LowPtFilter_in[ibx].pad[0].bcid;
358  int i1 = 0;
359  // external cycle on the pads
360  int OPLfrompads = 0;
361  for (i1 = 0; i1 <= 7; i1++) { OPLfrompads = setbits(OPLfrompads, i1, i1, m_LowPtFilter_in[ibx].pad[i1].opl); }
362  // external cycle on the pads
363  for (i1 = 0; i1 <= 7; i1++) {
364  // check for low Pt track in the pad
365  int Pt_reg1 = 0;
366  Pt_reg1 = m_LowPtFilter_in[ibx].pad[i1].pt;
367  if (0 < Pt_reg1 && Pt_reg1 <= 3) {
368  // check for OPL check option for the given pad (depends on track Pt!!)
369  if (getbits(m_EnableOPLCheck, i1 * 4 + Pt_reg1, i1 * 4 + Pt_reg1) == 1) {
370  int OPLCheck = 0;
371  // check for OPL confirmation in all mapped pads
372  OPLCheck = OPLfrompads & m_SetOPLCheck[i1][Pt_reg1 - 1];
373  // if the Pt track were not confirmed the track Pt is reset to 0
374  if (OPLCheck == 0) m_LowPtFilter_out[ibx].pad[i1].pt = 0;
375  }
376  }
377  }
378 
379  // @@@@@ 2nd step registers
380  // @@@@@ tile cal confirmation
381  // if there is track in the pad and the tile cal confirmation option is on
382  // looks for the tile cal confirmation in the mapped tile cal signals
385  int j1 = 0;
386  // external cycle on the pads
387  for (j1 = 0; j1 <= 7; j1++) {
388  // check for low Pt track in the pad
389  int Pt_reg2 = 0;
390  Pt_reg2 = m_TileCalConfirm_in[ibx].pad[j1].pt;
391  if (0 < Pt_reg2 && Pt_reg2 <= 6) {
392  // check for TileCal confirmation option for the given pad
393  // (depends on track Pt !!)
394  // chose EnableTCCheck depending on pT
395  sbit32 EnableTCCheck = 0;
396  if (0 < Pt_reg2 && Pt_reg2 <= 3) {
397  EnableTCCheck = m_EnableTCCheckLow;
398  } else {
399  EnableTCCheck = m_EnableTCCheckHigh;
400  }
401  if (getbits(EnableTCCheck, j1 * 4 + Pt_reg2, j1 * 4 + Pt_reg2) == 1) {
402  int TileCalCheck = 0;
403  // check for TileCal confirmation in all the pads mapped
404  TileCalCheck = m_TileCalConfirm_in[ibx].tile & m_SetTCCheck[j1][Pt_reg2 - 1];
405  // if the Pt track has not been confirmed the track Pt is reset to 0
406  if (TileCalCheck == 0) { m_TileCalConfirm_out[ibx].pad[j1].pt = 0; }
407  }
408  }
409  }
410 
411  // @@@@@ 3rd step registers
412  // @@@@@ solve eta overlaps within sector
413  /* ALGORITMO DI SELEZIONE DELLE SOGLIE:
414  TRA DUE TRACCE IN OVERLAP PASSA LA TRACCIA CON SOGLIA PIU' ALTA
415  A PARITA' DI SOGLIA PASSA QUELLA CON ETA MINORE */
418  // first check : if the overlap flag is on there must be a valid track
419  // in the pad, otherwise send a warning
420  int k1 = 0;
421  for (k1 = 0; k1 <= 7; k1++) {
422  if (m_SolveEtaOverlap_out[ibx].pad[k1].oveta && m_SolveEtaOverlap_out[ibx].pad[k1].pt == 0) {
423  if (m_debug) {
424  std::cout << "pad # " << k1 << " bcid # " << ibx << " has eta overlap flag on but no triggered track" << std::endl;
425  }
426  }
427  }
428  // run the overlap resolution algorithm on EVEN and then on ODD pads
429  int kk = 0;
430  for (kk = 0; kk <= 1; kk++) {
431  int k3 = 0;
432  for (k3 = kk; k3 <= 6 - kk; k3 = k3 + 2) {
433  if (m_SolveEtaOverlap_out[ibx].pad[k3].oveta || m_SolveEtaOverlap_out[ibx].pad[k3 + 1].oveta) {
434  if (m_SolveEtaOverlap_out[ibx].pad[k3].oveta && m_SolveEtaOverlap_out[ibx].pad[k3 + 1].oveta) {
435  if ((m_SolveEtaOverlap_out[ibx].pad[k3].roi == 2 && m_SolveEtaOverlap_out[ibx].pad[k3 + 1].roi == 3) ||
436  (m_SolveEtaOverlap_out[ibx].pad[k3].roi == 0 && m_SolveEtaOverlap_out[ibx].pad[k3 + 1].roi == 1) ||
437  (m_SolveEtaOverlap_out[ibx].pad[k3].roi == 3 && m_SolveEtaOverlap_out[ibx].pad[k3 + 1].roi == 2) ||
438  (m_SolveEtaOverlap_out[ibx].pad[k3].roi == 1 && m_SolveEtaOverlap_out[ibx].pad[k3 + 1].roi == 0)) {
439  // set to 0 the lower Pt
440  if (m_SolveEtaOverlap_out[ibx].pad[k3].pt >= m_SolveEtaOverlap_out[ibx].pad[k3 + 1].pt) {
441  m_SolveEtaOverlap_out[ibx].pad[k3 + 1].pt = 0;
442  m_SolveEtaOverlap_out[ibx].pad[k3 + 1].oveta = 0;
443  } else {
444  m_SolveEtaOverlap_out[ibx].pad[k3].pt = 0;
445  m_SolveEtaOverlap_out[ibx].pad[k3].oveta = 0;
446  }
447  } else {
448  if (m_debug) {
449  std::cout << "pads " << k3 << " and " << k3 + 1 << " have eta overlap flags on with wrong RoIs"
450  << std::endl;
451  }
452  }
453  }
454  }
455  }
456  }
457 
458  // @@@@@ 4th step registers
459  // @@@@@ sort highest track
462  int Pt_reg4 = 0;
463  int ROI_reg4 = 0;
464  int pad_reg4 = 0;
465  int l1 = 0;
466  // external cycle on the pads
467  for (l1 = 0; l1 <= 7; l1++) {
468  // check for a track with higher Pt
469  if (m_SortHighest_in[ibx].pad[l1].pt > Pt_reg4) {
470  Pt_reg4 = m_SortHighest_in[ibx].pad[l1].pt;
471  ROI_reg4 = m_SortHighest_in[ibx].pad[l1].roi;
472  pad_reg4 = l1;
473  }
474  }
475  // if there is a validated track
476  if (Pt_reg4 > 0) {
477  // put the result in the output part of the register
478  m_SortHighest_out[ibx].out.pt1 = Pt_reg4;
479  m_SortHighest_out[ibx].out.pad1 = pad_reg4;
480  m_SortHighest_out[ibx].out.roi1 = ROI_reg4;
481  m_SortHighest_out[ibx].out.ovf1 = m_SortHighest_in[ibx].pad[pad_reg4].ovphi;
482  m_SortHighest_out[ibx].out.ove1 = m_SortHighest_in[ibx].pad[pad_reg4].oveta;
483  m_SortHighest_out[ibx].out.ntrig1 = m_SortHighest_in[ibx].pad[pad_reg4].ntrig;
484  m_SortHighest_out[ibx].out.sign1 = m_SortHighest_in[ibx].pad[pad_reg4].sign;
485  m_SortHighest_out[ibx].out.r1 = m_SortHighest_in[ibx].pad[pad_reg4].r;
486  // set to 1 the number of valid tracks
487  m_SortHighest_out[ibx].out.ntrig = 1;
488  // and put the ouput internal register to 0
489  // otherwise the track will be counted twice !!!!!
490  m_SortHighest_out[ibx].pad[pad_reg4].pt = 0;
491  m_SortHighest_out[ibx].pad[pad_reg4].roi = 0;
492  }
493 
494  // @@@@@ 5th step registers
495  // @@@@@ sort 2nd highest track
498  int Pt_reg5 = 0;
499  int ROI_reg5 = 0;
500  int pad_reg5 = 0;
501  int m1 = 0;
502  // external cycle on the pads
503  for (m1 = 0; m1 <= 7; m1++) {
504  // check for a track with 2nd higer Pt
505  if (m_Sort2ndHighest_in[ibx].pad[m1].pt > Pt_reg5 &&
506  (m_Sort2ndHighest_in[ibx].pad[m1].pt != Pt_reg4 || m_Sort2ndHighest_in[ibx].pad[m1].roi != ROI_reg4 || m1 != pad_reg4)) {
507  Pt_reg5 = m_Sort2ndHighest_in[ibx].pad[m1].pt;
508  ROI_reg5 = m_Sort2ndHighest_in[ibx].pad[m1].roi;
509  pad_reg5 = m1;
510  }
511  }
512 
513  // if there is a validated track
514  if (Pt_reg5 > 0) {
515  // put the result in the output part of the register
516  m_Sort2ndHighest_out[ibx].out.pt2 = Pt_reg5;
517  m_Sort2ndHighest_out[ibx].out.pad2 = pad_reg5;
518  m_Sort2ndHighest_out[ibx].out.roi2 = ROI_reg5;
519  m_Sort2ndHighest_out[ibx].out.ovf2 = m_Sort2ndHighest_in[ibx].pad[pad_reg5].ovphi;
520  m_Sort2ndHighest_out[ibx].out.ove2 = m_Sort2ndHighest_in[ibx].pad[pad_reg5].oveta;
521  m_Sort2ndHighest_out[ibx].out.ntrig2 = m_Sort2ndHighest_in[ibx].pad[pad_reg5].ntrig;
522  m_Sort2ndHighest_out[ibx].out.sign2 = m_Sort2ndHighest_in[ibx].pad[pad_reg5].sign;
523  m_Sort2ndHighest_out[ibx].out.r2 = m_Sort2ndHighest_in[ibx].pad[pad_reg5].r;
524  // set to 2 the number of valid tracks
525  m_Sort2ndHighest_out[ibx].out.ntrig = 2;
526  // and put the ouput internal register to 0
527  // othrwise the track will be counted twice !!!!!
528  m_Sort2ndHighest_out[ibx].pad[pad_reg5].pt = 0;
529  m_Sort2ndHighest_out[ibx].pad[pad_reg5].roi = 0;
530  }
531 
532  // check for other candidates in sector
533  for (m1 = 0; m1 <= 7; m1++) {
534  if (m_Sort2ndHighest_out[ibx].pad[m1].pt > 0) (m_Sort2ndHighest_out[ibx].out.ntrig)++;
535  }
536 
537  // the content of the 5th output internal register is copied in the SL output register
539  }
540 }
541 //****************************************************************************//
542 // overload of the << operator
543 std::ostream &operator<<(std::ostream &stream, SectorLogic &o) {
544  int nBunMax = o.numberOfBunches();
545  stream << "@@@@@@@@@@ event and sector logic identification @@@@@@@@@@\n\n";
546 
547  stream << "run = " << o.m_run << std::endl;
548  stream << "event = " << o.m_event << std::endl;
549  stream << "debug = " << o.m_debug << std::endl;
550  stream << "subsys = " << o.m_subsys << std::endl;
551  stream << "sect = " << o.m_sect << std::endl;
552 
553  stream << std::endl;
554 
555  // print all the parameters of the sector logic board
556  stream << "@@@@@@@@@@ sector logic configuration parameters @@@@@@@@@@\n\n";
557 
558  // tccheck
559  stream.setf(ios::hex, ios::basefield);
560  stream << "EnableTCCheckLow : ";
561  stream.width(8);
562  stream.fill('0');
563  stream << o.m_EnableTCCheckLow << std::endl;
564  stream << "EnableTCCheckHigh : ";
565  stream.width(8);
566  stream.fill('0');
567  stream << o.m_EnableTCCheckHigh << std::endl;
568  int jj = 0;
569  int kk = 0;
570  for (jj = 0; jj <= 7; jj++) {
571  stream << "SetTCCheck pad[";
572  stream << jj;
573  stream << "] : ";
574  for (kk = 5; kk >= 0; kk--) {
575  stream.width(8);
576  stream.fill('0');
577  stream << o.m_SetTCCheck[jj][kk] << " ";
578  }
579  stream << std::endl;
580  }
581  stream << std::endl;
582 
583  // opl check
584  stream << "EnableOPLCheck : ";
585  stream.width(8);
586  stream.fill('0');
587  stream << o.m_EnableOPLCheck << std::endl;
588  for (jj = 0; jj <= 7; jj++) {
589  stream << "SetOPLCheck pad[";
590  stream << jj;
591  stream << "] : ";
592  for (kk = 2; kk >= 0; kk--) {
593  stream.width(2);
594  stream.fill('0');
595  stream << o.m_SetOPLCheck[jj][kk] << " ";
596  }
597  stream << std::endl;
598  }
599  stream << std::endl;
600 
601  stream.width(1);
602  stream.fill(' ');
603 
604  // internal register (input register)
605  InternalRegister *intreginp[5];
606  intreginp[0] = o.m_LowPtFilter_in.data();
607  intreginp[1] = o.m_TileCalConfirm_in.data();
608  intreginp[2] = o.m_SolveEtaOverlap_in.data();
609  intreginp[3] = o.m_SortHighest_in.data();
610  intreginp[4] = o.m_Sort2ndHighest_in.data();
611  // internal register (output register)
612  InternalRegister *intregoutp[5];
613  intregoutp[0] = o.m_LowPtFilter_out.data();
614  intregoutp[1] = o.m_TileCalConfirm_out.data();
615  intregoutp[2] = o.m_SolveEtaOverlap_out.data();
616  intregoutp[3] = o.m_SortHighest_out.data();
617  intregoutp[4] = o.m_Sort2ndHighest_out.data();
618 
619  int ibx = 0;
620 
621  // print the input registers of the sector logic board
622  stream << "@@@@@@@@@@ sector logic input registers @@@@@@@@@@\n\n";
623 
624  // print input from pads
625  stream.setf(std::ios::dec, std::ios::basefield);
626  dfpa(stream, 8, 8, nBunMax);
627  int ipad = 0;
628  for (ipad = 0; ipad <= 7; ipad++) {
629  stream << "pad[" << ipad << "] :";
630  for (ibx = 0; ibx <= nBunMax - 1; ibx++) {
631  stream << " ";
632  stream << o.m_InFromPad[ibx][ipad];
633  }
634  stream << std::endl;
635  }
636 
637  // print input from tilecal
638  stream.setf(std::ios::hex, std::ios::basefield);
639  stream << "tile :";
640  for (ibx = 0; ibx <= nBunMax - 1; ibx++) {
641  stream << " ";
642  stream.width(8);
643  stream.fill('0');
644  stream << o.m_InFromTileCal[ibx];
645  }
646  stream.width(1);
647  stream.fill(' ');
648  stream << std::endl << std::endl;
649 
650  // print all sector logic internal registers
651  stream << "@@@@@@@@@@ sector logic internal registers @@@@@@@@@@\n\n";
652 
653  int ireg = 0;
654  for (ireg = 0; ireg <= 4; ireg++) {
655  // input registers
656  stream << "internal registers # " << ireg + 1 << " (input)" << std::endl;
657  // DataFromPad
658  stream.setf(std::ios::dec, std::ios::basefield);
659  dfpa(stream, 8, 8, nBunMax);
660  for (ipad = 0; ipad <= 7; ipad++) {
661  stream << "pad[" << ipad << "] :";
662  for (ibx = 0; ibx <= nBunMax - 1; ibx++) {
663  stream << " ";
664  stream << (intreginp[ireg] + ibx)->pad[ipad];
665  }
666  stream << std::endl;
667  }
668  // Tile Cal
669  stream.setf(ios::hex, ios::basefield);
670  stream << "tile :";
671  for (ibx = 0; ibx <= nBunMax - 1; ibx++) {
672  stream << " ";
673  stream.width(8);
674  stream.fill('0');
675  stream << (intreginp[ireg] + ibx)->tile;
676  }
677  stream.width(1);
678  stream.fill(' ');
679  stream << std::endl;
680  // Sector Logic Output
681  stream.setf(std::ios::dec, std::ios::basefield);
682  stream << "sl out :";
683  for (ibx = 0; ibx <= nBunMax - 1; ibx++) {
684  stream << " ";
685  stream << (intreginp[ireg] + ibx)->out;
686  }
687  stream << std::endl;
688  stream << std::endl;
689 
690  // output registers
691  stream << "internal registers # " << ireg + 1 << " (output)" << std::endl;
692  // DataFromPad
693  stream.setf(std::ios::dec, std::ios::basefield);
694  dfpa(stream, 8, 8, nBunMax);
695  for (ipad = 0; ipad <= 7; ipad++) {
696  stream << "pad[" << ipad << "] :";
697  for (ibx = 0; ibx <= nBunMax - 1; ibx++) {
698  stream << " ";
699  stream << (intregoutp[ireg] + ibx)->pad[ipad];
700  }
701  stream << std::endl;
702  }
703  // Tile Cal
704  stream.setf(std::ios::hex, std::ios::basefield);
705  stream << "tile :";
706  for (ibx = 0; ibx <= nBunMax - 1; ibx++) {
707  stream << " ";
708  stream.width(8);
709  stream.fill('0');
710  stream << (intregoutp[ireg] + ibx)->tile;
711  }
712  stream.width(1);
713  stream.fill(' ');
714  stream << std::endl;
715  // Sector Logic Output
716  stream.setf(std::ios::dec, std::ios::basefield);
717  stream << "sl out :";
718  for (ibx = 0; ibx <= nBunMax - 1; ibx++) {
719  stream << " ";
720  stream << (intregoutp[ireg] + ibx)->out;
721  }
722  stream << std::endl << std::endl;
723  }
724 
725  // print the output registers of the sector logic board
726  stream.setf(std::ios::dec, std::ios::basefield);
727  stream << "@@@@@@@@@@ sector logic output register @@@@@@@@@@\n\n";
728  ofsla(stream, 8, 5, nBunMax);
729  stream << " ";
730  for (ibx = 0; ibx <= nBunMax - 1; ibx++) {
731  stream << " ";
732  stream << o.m_OutFromSectorLogic[ibx];
733  }
734 
735  return stream;
736 }
737 //****************************************************************************//
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