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SectorLogic.h
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1/*
2 Copyright (C) 2002-2024 CERN for the benefit of the ATLAS collaboration
3*/
4
5#ifndef TrigT1RPChardware_SectorLogic_H
6#define TrigT1RPChardware_SectorLogic_H
7
8#include <array>
9#include <cctype>
10#include <cerrno>
11#include <cfloat>
12#include <climits>
13#include <clocale>
14#include <cmath>
15#include <cstdio>
16#include <cstdlib>
17#include <cstring>
18#include <ctime>
19#include <fstream>
20#include <iostream>
21
24
25// ### DataFromPad ###
27 int bcid{0};
28 int r{0};
29 int oveta{0};
30 int ovphi{0};
31 int opl{0};
32 int pt{0};
33 int roi{0};
34 int ntrig{0};
35 int sign{0};
36 DataFromPad() = default;
37};
38
39/***************************************************************************/
40
41// ### OutputFromSectorLogic ###
42// bit map:
43// bit pos. information
44//
45// 0 >2 candidates in a sector
46// 1-5 ROI1
47// 6-7 Reserved1
48// 8-9 OVL1
49// 10-14 ROI2
50// 15-16 Reserved2
51// 17-18 OVL2
52// 19-21 Pt1
53// 22-24 Pt2
54// 25 >1 candidate in ROI1
55// 26 >1 candidate in ROI2
56// 27-29 BCID
57// 30 Candidate1 sign
58// 31 Candidate2 sign
59//
60//
62public:
63 int ntrig{0};
64 int roi1{0};
65 int pad1{0};
66 int r1{0};
67 int ovf1{0};
68 int ove1{0};
69 int roi2{0};
70 int pad2{0};
71 int r2{0};
72 int ovf2{0};
73 int ove2{0};
74 int pt1{0};
75 int pt2{0};
76 int ntrig1{0};
77 int ntrig2{0};
78 int bcid{0};
79 int sign1{0};
80 int sign2{0};
82 friend std::ostream &operator<<(std::ostream &stream, OutputFromSectorLogic &o);
83};
84/*****************************************************************************/
85// ### InternalRegister ###
87public:
88 std::array<DataFromPad, 8> pad{};
91 InternalRegister() = default;
92 friend std::ostream &operator<<(std::ostream &stream, InternalRegister &o);
93};
94/******************************************************************************/
95// ### SectorLogic ###
96class SectorLogic : public BaseObject {
97 // identificazione sector logic di Aleandro
98 int m_run{0};
99 int m_event{0};
103
104 /*----------------------------------------------------------------------------
105
106 Formato dei parametri di configurazione della sector logic
107
108 EnableTCCheckLow 8x3 8 pad x 3 soglie basse
109 EnableTCCheckHigh 8x3 8 pad x 3 soglie alte
110 SetTCCheck 8x6x32 8 pad x 6 soglie x 32 segnali dal TC
111
112 EnableOPLCheck 8x3 8 pad x 3 soglie basse
113 SetOPLCheck 8x3x8 8 pad x 3 soglie basse x 8 flag di OPL
114
115 Tutti i numeri riportati sotto sono a 32 bit tranne SetOPLCheck pad[0..7]
116
117 p .... p
118 d .... d
119 7 .... 0
120 EnableTCCheckLow : 00000000 -> diviso in 8 pezzi da 4 bit -> 8x3
121 EnableTCCheckHigh : 00000000 -> diviso in 8 pezzi da 4 bit -> 8x3
122
123 th6 ... ... ... ... th1
124 SetTCCheck pad[0] : 00000000 00000000 00000000 00000000 00000000 00000000 -> 6x32 moltiplicando per 8 pad
125 SetTCCheck pad[1] : 00000000 00000000 00000000 00000000 00000000 00000000 -> ottengo 8x6x32
126 SetTCCheck pad[2] : 00000000 00000000 00000000 00000000 00000000 00000000
127 SetTCCheck pad[3] : 00000000 00000000 00000000 00000000 00000000 00000000
128 SetTCCheck pad[4] : 00000000 00000000 00000000 00000000 00000000 00000000
129 SetTCCheck pad[5] : 00000000 00000000 00000000 00000000 00000000 00000000
130 SetTCCheck pad[6] : 00000000 00000000 00000000 00000000 00000000 00000000
131 SetTCCheck pad[7] : 00000000 00000000 00000000 00000000 00000000 00000000
132
133 p .... p
134 d .... d
135 7 .... 0
136 EnableOPLCheck : 00000000 -> diviso in 8 pezzi da 4 bit -> 8x3
137
138 t .. t
139 h .. h
140 3 .. 1
141 SetOPLCheck pad[0] : 00 00 00 -> 3x8 moltiplicando per 8 pad
142 SetOPLCheck pad[1] : 00 00 00 -> ottengo 8x3x8
143 SetOPLCheck pad[2] : 00 00 00
144 SetOPLCheck pad[3] : 00 00 00
145 SetOPLCheck pad[4] : 00 00 00
146 SetOPLCheck pad[5] : 00 00 00
147 SetOPLCheck pad[6] : 00 00 00
148 SetOPLCheck pad[7] : 00 00 00
149
150 ----------------------------------------------------------------------------*/
151
152 // if SetTCCheck[i][j][k] = 1 the k Tilecal signal is mapped to the
153 // j threshold of the i PAD
154 // if SetTCCheck[i][j][k] = 0 no mapping is done
155 // note thet in this way is possible to map a given TileCal signal to more
156 // that one threshold and PAD
158
159 // once the geometry of the mapping is specified EnableTCCheck[i][j]
160 // tells if the mapping must be done or not
161 // if EnableTCCheck[i][j] = 1 a muon candidate in the i PAD with the
162 // j threshold is confirmed only if there was an energy deposition in
163 // at least one of the mapped zones of the TileCal
164 // if EnableTCCheck[i][j] = 0 a muon candidate is always confirmed
167
168 // if SetOPLCheck[i][j][k] = 1 the k OPLFlag signal is mapped to the
169 // j low-Pt threshold of the i PAD
170 // if SetOPLCheck[i][j][k] = 0 no mapping is done
171 // note thet in this way is possible to map a given OPLFlag signal to more
172 // that one threshold and PAD
174
175 // once the geometry of the mapping is specified EnableOPLCheck[i][j]
176 // tells if the mapping must be done or not
177 // if EnableOPLCheck[i][j] = 1 a muon candidate in the i PAD with the
178 // j low-Pt threshold is confirmed only if there was track in one of
179 // the PADs belonging to a given Sector
180 // if EnableOPLCheck[i][j] = 0 a low-Pt muon candidate is always confirmed
182
183 // input and output data
184 DataFromPad m_InFromPad[8][8]; //DataFromPad m_InFromPad[NOBXS][8];
185 std::array<CMAword, 8> m_InFromTileCal{0}; //assumes NOBXS=8 at most
186 std::array<OutputFromSectorLogic, 8> m_OutFromSectorLogic{}; //assumes NOBXS=8 at most
187
188 // internal registers of the various steps of the Sector Logic pipeline
189 // 1st step registers
190 // low Pt filter
191 //arrays assumes NOBXS=8 at most
192 std::array<InternalRegister, 8> m_LowPtFilter_in{};
193 std::array<InternalRegister, 8> m_LowPtFilter_out{};
194 // 2nd step registers
195 std::array<InternalRegister, 8> m_TileCalConfirm_in{};
196 std::array<InternalRegister, 8> m_TileCalConfirm_out{};
197 // 3rd step registers
198 std::array<InternalRegister, 8> m_SolveEtaOverlap_in{};
199 std::array<InternalRegister, 8> m_SolveEtaOverlap_out{};
200 // 4th step registers
201 std::array<InternalRegister, 8> m_SortHighest_in{};
202 std::array<InternalRegister, 8> m_SortHighest_out{};
203 // 5th step registers
204 std::array<InternalRegister, 8> m_Sort2ndHighest_in{};
205 std::array<InternalRegister, 8> m_Sort2ndHighest_out{};
206
209
210 // M.Corradi 1/3/2010
211 bool m_oldSimulation{false};
212
213public:
214 // constructor and destructor
215 SectorLogic(int run, int event, CMAword debug, ubit16 subsys, ubit16 sect, bool oldSimulation, uint NOBXS, uint BCZERO);
216 ~SectorLogic(void);
217
218 ubit16 numberOfBunches() const { return m_nBunMax; };
219 // ubit16 sectorAddress(){return m_sector;};
220
221 CMAword outputToMuCTPI(int deltaBC = 0);
222 // old version
223 // CMAword outputToMuCTPI(ubit16 bunchID=BCZERO);
224
225 // init and check
226 void init(void);
227 void check(void);
228
229 // tile cal check and opl check configuration
230 void LoadTCCheck(CMAword EnableTCCheckLow_in, CMAword EnableTCCheckHigh_in, CMAword SetTCCheck_in[8][6]);
231 void LoadOPLCheck(CMAword EnableOPLCheck_in, ubit16 SetOPLCheck_in[8][3]);
232
233 // input and output in my format: only for debug
234 void dbginput(ubit16 bx, DataFromPad from_pad[8], CMAword from_tile_cal);
236
237 // input and output in standard format
238 void load(ubit16 padAdd, ubit16 BX, ubit16 RoIAdd, ubit16 pT, ubit16 OPL, ubit16 overlapPhi, ubit16 overlapEta, ubit16 RoiAmbiguity,
239 ubit16 BCIDcounter);
241
242 // executes trigger algorithm
243 void execute(void);
244
245 // overload of operators <<
246 friend std::ostream &operator<<(std::ostream &stream, SectorLogic &o);
247};
248
249// prints the mask for DataFromPad
250std::ostream &dfpa(std::ostream &stream, int indent, int whitesp, int ntimes);
251
252// prints the mask for OutputFromSectorLogic
253std::ostream &ofsla(std::ostream &stream, int indent, int whitesp, int ntimes);
254
255#endif /* SectorLogic_H */
unsigned int uint
uint32_t CMAword
Definition Lvl1Def.h:17
const bool debug
unsigned short int ubit16
std::ostream & ofsla(std::ostream &stream, int indent, int whitesp, int ntimes)
std::ostream & dfpa(std::ostream &stream, int indent, int whitesp, int ntimes)
BaseObject(ObjectType, const std::string &)
Definition BaseObject.cxx:7
std::array< DataFromPad, 8 > pad
Definition SectorLogic.h:88
InternalRegister()=default
friend std::ostream & operator<<(std::ostream &stream, InternalRegister &o)
OutputFromSectorLogic out
Definition SectorLogic.h:90
friend std::ostream & operator<<(std::ostream &stream, OutputFromSectorLogic &o)
OutputFromSectorLogic()=default
std::array< InternalRegister, 8 > m_LowPtFilter_out
std::array< InternalRegister, 8 > m_Sort2ndHighest_out
ubit16 m_nBunMax
void execute(void)
SectorLogic(int run, int event, CMAword debug, ubit16 subsys, ubit16 sect, bool oldSimulation, uint NOBXS, uint BCZERO)
CMAword m_EnableTCCheckHigh
void check(void)
ubit16 m_sect
std::array< OutputFromSectorLogic, 8 > m_OutFromSectorLogic
std::array< InternalRegister, 8 > m_SortHighest_in
friend std::ostream & operator<<(std::ostream &stream, SectorLogic &o)
std::array< InternalRegister, 8 > m_SolveEtaOverlap_out
CMAword m_EnableOPLCheck
std::array< InternalRegister, 8 > m_TileCalConfirm_in
std::array< InternalRegister, 8 > m_LowPtFilter_in
std::array< CMAword, 8 > m_InFromTileCal
std::array< InternalRegister, 8 > m_SortHighest_out
ubit16 numberOfBunches() const
bool m_oldSimulation
CMAword m_debug
std::array< InternalRegister, 8 > m_Sort2ndHighest_in
void dbginput(ubit16 bx, DataFromPad from_pad[8], CMAword from_tile_cal)
OutputFromSectorLogic dbgoutput(ubit16 bx)
CMAword outputToMuCTPI(int deltaBC=0)
ubit16 m_bczero
CMAword m_EnableTCCheckLow
CMAword m_SetTCCheck[8][6]
void LoadOPLCheck(CMAword EnableOPLCheck_in, ubit16 SetOPLCheck_in[8][3])
ubit16 m_subsys
std::array< InternalRegister, 8 > m_SolveEtaOverlap_in
void LoadTCCheck(CMAword EnableTCCheckLow_in, CMAword EnableTCCheckHigh_in, CMAword SetTCCheck_in[8][6])
std::array< InternalRegister, 8 > m_TileCalConfirm_out
void init(void)
CMAword output(ubit16 i)
ubit16 m_SetOPLCheck[8][3]
DataFromPad m_InFromPad[8][8]
void load(ubit16 padAdd, ubit16 BX, ubit16 RoIAdd, ubit16 pT, ubit16 OPL, ubit16 overlapPhi, ubit16 overlapEta, ubit16 RoiAmbiguity, ubit16 BCIDcounter)
Definition run.py:1
DataFromPad()=default