ATLAS Offline Software
TileCablingService.cxx
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1 /*
2  Copyright (C) 2002-2021 CERN for the benefit of the ATLAS collaboration
3 */
4 
7 
8 #include <string>
9 #include <iostream>
10 #include <algorithm>
11 
12 // Singleton method
13 
14 // Ideally we should just create this fully initialized and not expose
15 // a non-const accessor. However, there's many pieces of code scattered
16 // around that want to twiddle things here; getting rid of those would
17 // entail a significant redesign. For now, separate const and non-const
18 // access, and tag the non-const access as not thread-safe.
19 namespace {
21 }
22 
23 //------------------------------------------------------------
25 {
26  return &cablingService;
27 }
28 
29 //------------------------------------------------------------
30 TileCablingService * TileCablingService::getInstance_nc ATLAS_NOT_THREAD_SAFE()
31 {
32  return &cablingService;
33 }
34 
35 // default constructor
36 
37 //-------------------------------------------------------------
39  : m_tileID(nullptr)
40  , m_tileHWID(nullptr)
41  , m_TT_ID(nullptr)
42  , m_tileTBID(nullptr)
43  , m_cablingType(TileCablingService::OldSim)
44  , m_isCacheFilled(false)
45  , m_MBTSmergedRun2Plus(64, 0)
46  , m_E1mergedRun2Plus(128, 0)
47  , m_run2(false)
48  , m_run2plus(false)
49  , m_run3(false)
50  , m_maxChannels(TileCalibUtils::MAX_CHAN)
51  , m_maxGains(TileCalibUtils::MAX_GAIN)
52 {
53  m_testBeam = false;
54  // old cabling for simulation - no special EB modules, wrong numbers for E1-E4
55  m_EBAspec = -1;
56  m_EBCspec = -1;
57  m_E1chan = 13;
58  m_E2chan = 12;
59  m_E3chan = 1;
60  m_E4chan = 0;
61  m_E3special = 1; // no difference
62  m_E4special = 0; // with normal drawers
63  m_MBTSchan = 47;
64 
65  int ros=0;
66  for ( ; ros<1; ++ros) { // no beam frags
67  for (int drawer=0; drawer<64; ++drawer) {
68  m_connected[ros][drawer] = false;
69  }
70  }
71  for ( ; ros<5; ++ros) { // all drawers connected
72  for (int drawer=0; drawer<64; ++drawer) {
73  m_connected[ros][drawer] = true;
74  }
75  }
76 
78  setRun2Merged();
79 }
80 
81 void
83 {
84  m_E1mergedRun2Plus.clear();
85  m_E1mergedRun2Plus.resize(128,0);
86 
87  // Merged E1 and MBTS for run2
88  // EBA
89  m_E1mergedRun2Plus[6] = 7;
90  m_E1mergedRun2Plus[24] = 23;
91  m_E1mergedRun2Plus[43] = 42;
92  m_E1mergedRun2Plus[52] = 53;
93  // EBC
94  m_E1mergedRun2Plus[64+6] = 7;
95  m_E1mergedRun2Plus[64+24] = 23;
96  m_E1mergedRun2Plus[64+43] = 42;
97  m_E1mergedRun2Plus[64+52] = 53;
98  // additional E4' in EBC
99  m_E1mergedRun2Plus[64+27] = 28;
100  m_E1mergedRun2Plus[64+30] = 31;
101  m_E1mergedRun2Plus[64+34] = 33;
102  m_E1mergedRun2Plus[64+37] = 36;
103 
104  m_MBTSmergedRun2Plus.clear();
105  m_MBTSmergedRun2Plus.resize(64,false);
106 
107  m_MBTSmergedRun2Plus[7] = true;
108  m_MBTSmergedRun2Plus[23] = true;
109  m_MBTSmergedRun2Plus[42] = true;
110  m_MBTSmergedRun2Plus[53] = true;
111 }
112 
113 void
115 {
116  m_E1mergedRun2Plus.clear();
117  m_E1mergedRun2Plus.resize(128,0);
118  m_MBTSmergedRun2Plus.clear();
119  m_MBTSmergedRun2Plus.resize(64,false);
120 
121  // Merged E1 and MBTS for run2
122  // EBA
123  m_E1mergedRun2Plus[6] = 7;
124  m_E1mergedRun2Plus[24] = 23;
125  m_E1mergedRun2Plus[43] = 42;
126  m_E1mergedRun2Plus[52] = 53;
127  // EBC
128  m_E1mergedRun2Plus[64+6] = 7;
129  m_E1mergedRun2Plus[64+24] = 23;
130  m_E1mergedRun2Plus[64+43] = 42;
131  m_E1mergedRun2Plus[64+52] = 53;
132  // additional E4' in EBC
133  m_E1mergedRun2Plus[64+27] = 28;
134  m_E1mergedRun2Plus[64+30] = 31;
135  m_E1mergedRun2Plus[64+34] = 33;
136  m_E1mergedRun2Plus[64+37] = 36;
137 
138  // Additional merged E1 in 2018
139  // EBA
140  m_E1mergedRun2Plus[3] = 2;
141  m_E1mergedRun2Plus[20] = 19;
142  m_E1mergedRun2Plus[46] = 45;
143  m_E1mergedRun2Plus[59] = 58;
144  // EBC
145  m_E1mergedRun2Plus[64+3] = 2;
146  m_E1mergedRun2Plus[64+17] = 18;
147  m_E1mergedRun2Plus[64+46] = 45;
148  m_E1mergedRun2Plus[64+59] = 58;
149 
150  // no merged MBTS in 2018
151  m_MBTSmergedRun2Plus.clear();
152  m_MBTSmergedRun2Plus.resize(64,false);
153 }
154 
155 void
157 {
158  m_E1mergedRun2Plus.clear();
159  m_E1mergedRun2Plus.resize(128, 0);
160  m_MBTSmergedRun2Plus.clear();
161  m_MBTSmergedRun2Plus.resize(64, false);
162 
163  // Merged E1 and MBTS for run2
164  // EBA
165  m_E1mergedRun2Plus[6] = 7;
166  m_E1mergedRun2Plus[24] = 23;
167  m_E1mergedRun2Plus[43] = 42;
168  m_E1mergedRun2Plus[52] = 53;
169  // EBC
170  m_E1mergedRun2Plus[64 + 6] = 7;
171  m_E1mergedRun2Plus[64 + 24] = 23;
172  m_E1mergedRun2Plus[64 + 43] = 42;
173  m_E1mergedRun2Plus[64 + 52] = 53;
174 
175  // Additional merged E1 since 2018
176  // EBA
177  m_E1mergedRun2Plus[3] = 2;
178  m_E1mergedRun2Plus[20] = 19;
179  m_E1mergedRun2Plus[46] = 45;
180  m_E1mergedRun2Plus[59] = 58;
181  // EBC
182  m_E1mergedRun2Plus[64 + 3] = 2;
183  m_E1mergedRun2Plus[64 + 17] = 18;
184  m_E1mergedRun2Plus[64 + 46] = 45;
185  m_E1mergedRun2Plus[64 + 59] = 58;
186 
187  // no merged MBTS since 2018
188  m_MBTSmergedRun2Plus.clear();
189  m_MBTSmergedRun2Plus.resize(64, false);
190 }
191 
192 // destructor
193 
194 //-------------------------------------------------------------
196 {
197 }
198 
199 void
201 {
202  if (testBeam) // don't print anything for full ATLAS configuration
203  std::cout << "==> Setting testbeam flag to "
204  << ((testBeam) ? "TRUE" : "FALSE")
205  << " in TileCablingService " << std::endl;
206  m_testBeam = testBeam;
207  if (testBeam) {
209  int ros=0;
210  for ( ; ros<1; ++ros) {
211  int drawer=0;
212  for ( ; drawer<32; ++drawer) { // all 0x0? and 0x1? frags in beam crate
213  m_connected[ros][drawer] = true;
214  }
215  for ( ; drawer<64; ++drawer) {
216  m_connected[ros][drawer] = false;
217  }
218  }
219  for ( ; ros<5; ++ros) { // nothing connected - use setConnected() to declare connected drawers
220  for (int drawer=0; drawer<64; ++drawer) {
221  m_connected[ros][drawer] = false;
222  }
223  }
224  }
225 }
226 
227 bool
229 {
230 // cabling type can be:
231 // -1 for testbeam
232 // 0 for MBTS in spare channels and wrong cabling for gap/crack (like in simulation before rel 14.2.10)
233 // 1 new configuration without MBTS and correct gap/crack cells
234 // 2 new configuration with MBTS instead of crack scintillators
235 // 3 new configuration with MBTS in spare channels
237 
239 
241  // old cabling for simulation - no special EB modules, wrong numbers for E1-E4
242  m_EBAspec = -1;
243  m_EBCspec = -1;
244  m_E1chan = 13;
245  m_E2chan = 12;
246  m_E3chan = 1;
247  m_E4chan = 0;
248  m_E3special = 1; // no difference
249  m_E4special = 0; // with normal drawers
250  m_MBTSchan = 47;
252  setTestBeam(true);
253  } else {
254  // new correct cabling for E1-E4 cells
255  m_EBAspec = 14; // EBA15 - special
256  m_EBCspec = 17; // EBC18 - special
257  m_E1chan = 12;
258  m_E2chan = 13;
259  m_E3chan = 0;
260  m_E4chan = 1;
261  m_E3special = 18;
262  m_E4special = 19;
263 
267 
269  m_run2plus = (m_run2 || m_run3);
270 
272  setRun3Merged();
273  } else if (type == TileCablingService::RUN2aCabling) {
274  setRun2aMerged();
275  } else {
276  setRun2Merged();
277  }
278 
279  if (m_run2plus)
280  m_MBTSchan = -1; // should use function MBTS2channel_run2(int eta)
282  m_MBTSchan = 0;
283  else // Crack and MBTS in spare channel
284  m_MBTSchan = 47;
285 
287 
288  if (m_tileID) {
289 
290  m_maxChannels = 240;
291  const int nBarrelAndExtendedChannels(m_maxChannels * 2);
292 
293  m_ch2towerUpgradeABC.resize(nBarrelAndExtendedChannels, -1);
294  m_ch2sampleUpgradeABC.resize(nBarrelAndExtendedChannels, -1);
295  m_ch2pmtUpgradeABC.resize(nBarrelAndExtendedChannels, -1);
296 
297 
298  IdContext pmtContext = m_tileID->pmt_context();
299  unsigned int maxPmtHash = m_tileID->pmt_hash_max();
300 
301  for (IdentifierHash pmtHash = 0; pmtHash < maxPmtHash; pmtHash += 1) {
302  Identifier swid;
303  if (m_tileID->get_id(pmtHash, swid, &pmtContext) == 0) {
304  int module = m_tileID->module(swid);
305  if (module == 0) { // Use module 0 to fill caches
306  int side = m_tileID->side(swid);
307  if (side == TileID::POSITIVE) { // Use only positive side to fill caches
308  int section = m_tileID->section(swid);
309  int tower = m_tileID->tower(swid);
310  int sample = m_tileID->sample(swid);
311  int pmt = m_tileID->pmt(swid);
312 
313  if (tower == 41 || (tower > 42 && tower < 46)) continue; // Skip dummy towers
314 
316 
317  if (channel >= 0 && (unsigned int) channel < m_ch2towerUpgradeABC.size()) {
319  m_ch2towerUpgradeABC[channel] = tower;
322  }
323 
324  }
325  }
326  }
327  }
328 
329  } else {
330  return false;
331  }
332  }
333 
334  }
335  return true;
336 }
337 
338 void
339 TileCablingService::setConnected(int section, int side, int modMin, int modMax)
340 {
341  if (modMax > modMin) {
342  std::cout << "TileCablingService: in section " << section << " side " << side
343  << " modules from " << modMin << " to " << modMax-1 << " are connected" << std::endl;
344  int ros=swid2ros(section,side);
345  for (int module=modMin; module<modMax; ++module) {
347  m_connected[ros][drawer] = true;
348  }
349  } else {
350  std::cout << "TileCablingService: in section " << section << " side " << side
351  << " no modules connected " << std::endl;
352  }
353 }
354 
355 void
356 TileCablingService::setConnected(int ros, int draMin, int draMax)
357 {
358  for (int drawer=draMin; drawer<draMax; ++drawer) {
359  m_connected[ros][drawer] = true;
360  }
361 }
362 
363 //
364 // Convert TileID to Trigger Tower ID
365 //
366 
369 {
370  // take only first pmt - might be wrong for D-cells
371  return pmt2tt_id(m_tileID->pmt_id(id,0));
372 }
373 
376 {
377  if (!id.is_valid()) return m_invalid_id;
378 
379  int mineta[4] = { 0, 0, 9, 9 };
380  int maxeta[4] = { 0, 8, 14, 14 };
381 
382  int section = m_tileID->section (id);
383  int side = m_tileID->side (id);
384  int module = m_tileID->module (id);
385  int tower = m_tileID->tower (id);
386  int sample = m_tileID->sample (id);
387  int pmt = m_tileID->pmt (id);
388 
389  if (m_cablingType == UpgradeABC) {
390  tower /= 4;
392  }
393 
394  int posneg = side; // -1 or +1
395  int sampling = 1; // Hadronic
396  int region = 0; // abs(eta)<2.5
397  int ieta = tower;
398  int iphi = module;
399 
400  if (TileID::SAMP_E == sample) {
401  ieta = maxeta[section] + 1; // all gap scintillators are outside
402  // return m_invalid_id;
403  } else {
404  if (TileID::SAMP_D == sample) {
405  if ( 0 == ieta ) {
406  if (m_testBeam) {
407  if ( 0 == pmt ) { // testbeam - cell D0, first pmt is in another side;
408  if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
409  else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
410  }
411  } else {
412  if ( 1 == pmt ) { // cell D0, second pmt is in another side;
413  if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
414  else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
415  }
416  }
417  } else {
418  if ( ieta > 8 ) pmt = 1-pmt;
419  if ( TileID::NEGATIVE == side ) pmt = 1-pmt;
420  ieta -= pmt; // second pmt in D samling is in previous trigger tower
421  }
422  }
423 
424  // merge several towers in one trigger tower at section boundaries
425  // A10 goes to the same tower as A9 and B9
426  // D4 goes to the same tower as C10 and D5(pmt=1)
427  // A16 goes to the same tower as A15 and B15
428  ieta = std::max(ieta,mineta[section]);
429  ieta = std::min(ieta,maxeta[section]);
430  }
431 
432  Identifier tt_id = m_TT_ID->tower_id(posneg, sampling, region, ieta, iphi);
433 
434  return tt_id;
435 }
436 
437 //
438 // Convert TileID to Muon Trigger Tower ID (valid only for D-cells)
439 //
440 
443 {
444  // take only first pmt - might be wrong for D0 cell
445  return pmt2mt_id(m_tileID->pmt_id(id,0));
446 }
447 
450 {
451 // int section = m_tileID->section (id);
452  int side = m_tileID->side (id);
453  int module = m_tileID->module (id);
454  int tower = m_tileID->tower (id);
455  int sample = m_tileID->sample (id);
456  int pmt = m_tileID->pmt (id);
457 
458  if (m_cablingType == UpgradeABC) {
459  tower /= 4;
461  }
462 
463  if (TileID::SAMP_D == sample) {
464  int posneg = side; // -1 or +1
465  int sampling = 2; // muon signal from last sampling
466  int region = 0; // abs(eta)<2.5
467  int ieta = tower;
468  int iphi = module;
469 
470  if ( 0 == ieta ) {
471  if (m_testBeam) {
472  if ( 0 == pmt ) { // testbeam - cell D0, first pmt is in another side;
473  if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
474  else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
475  }
476  } else {
477  if ( 1 == pmt ) { // cell D0, second pmt is in another side;
478  if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
479  else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
480  }
481  }
482  }
483 
484  Identifier tt_id = m_TT_ID->tower_id(posneg, sampling, region, ieta, iphi) ;
485  return tt_id;
486 
487  } else {
488 
489  return m_invalid_id;
490  }
491 }
492 
493 //
494 // Build MBTS offline ID from drawer HWID
495 // return invalid ID if there is no MBTS in a given drawer
496 //
497 
500 {
501  int ros = m_tileHWID->ros (hwid);
502  int drawer = m_tileHWID->drawer (hwid);
503  int channel = m_MBTSchan;
504 
506 
507  return m_invalid_id;
508 
509  } else if ( m_run2plus) {
510 
512 
513  int side = hwid2side(ros,channel);
516 
517  return m_tileTBID->channel_id(side, phi, eta);
518 
519  } else {
520 
521  return m_invalid_id;
522  }
523 
524  } else if ( MBTSOnly == m_cablingType ) {
525 
527 
528  int side = hwid2side(ros,channel);
531 
532  return m_tileTBID->channel_id(side, phi, eta);
533 
534  } else {
535 
536  return m_invalid_id;
537  }
538 
539  } else {
540 
542 
543  int side = hwid2side(ros,channel);
546 
547  return m_tileTBID->channel_id(side, phi, eta);
548 
549  } else {
550 
551  return m_invalid_id;
552  }
553  }
554 }
555 
556 
557 //
558 // Convert TileHWID to TileID
559 //
560 
563 {
564  int ros = m_tileHWID->ros (hwid);
565  int drawer = m_tileHWID->drawer (hwid);
566  int channel = m_tileHWID->channel (hwid);
567  if ( EB_special(ros,drawer) ) {
568  if ( D4(channel) ) return m_invalid_id;
569  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
570  }
571 
572  if ( TileHWID::BEAM_ROS == ros ) {
573 
574  int tbtype = hwid2tbtype (drawer);
575  int tbmodule = hwid2tbmodule (drawer,channel);
576  int tbchannel = hwid2tbchannel (drawer,channel);
577 
578  return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
579  }
580 
583 
584  if (sample < 0)
585  return m_invalid_id; // for any kind of cabling can't have negagive sample
586 
587  if (m_run2plus) {
588 
590  int side = hwid2side(ros,channel);
593  return m_tileTBID->channel_id(side, phi, eta);
594 
595  } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
596  int side = hwid2side(ros,channel);
599  return m_tileTBID->channel_id(side, phi, eta);
600 
601  } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
602  return m_invalid_id;
603  }
604 
605  } else if (m_cablingType == MBTSOnly) {
606 
607  if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
608  int side = hwid2side(ros,channel);
611  return m_tileTBID->channel_id(side, phi, eta);
612 
613  } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
614  return m_invalid_id;
615  }
616 
617  } else {
618 
619  if (sample == TileID::SAMP_X) { // MBTS
620 
621  if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
623 
624  int side = hwid2side(ros,channel);
627 
628  return m_tileTBID->channel_id(side, phi, eta);
629 
630  } else
631  return m_invalid_id;
632  } else
633  return m_invalid_id;
634  }
635  }
636 
638  int side = hwid2side (ros,channel);
639  int module = hwid2module (drawer);
640 
641  int tower = (m_cablingType != UpgradeABC) ? hwid2tower(ros, channel)
643 
644  if (m_cablingType == MBTSOnly) {
645  if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
646 
648  int tower = hwid2tower_gapscin (ros, drawer, channel);
649 
650  if (tower == -1) {
651  return m_invalid_id;
652  } else
653  return m_tileID->cell_id(section, side, module, tower, sample);
654  }
655  }
656 
657  return m_tileID->cell_id(section, side, module, tower, sample);
658 }
659 
662 {
663  if ( EB_special(ros,drawer) ) {
664  if ( D4(channel) ) { index = pmt = -1; return m_invalid_id; }
665  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
666  }
667 
668  if ( TileHWID::BEAM_ROS == ros ) {
669 
670  int tbtype = hwid2tbtype (drawer);
671  int tbmodule = hwid2tbmodule (drawer,channel);
672  int tbchannel = hwid2tbchannel (drawer,channel);
673  return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
674  }
675 
678 
679  if (sample < 0) {
680  index = pmt = -1;
681  return m_invalid_id; // for any kind of cabling can't have negagive sample
682  }
683 
684  if (m_run2plus) {
685 
687  int side = hwid2side(ros,channel);
690 
691  pmt = 0;
692  index = -2;
693  return m_tileTBID->channel_id(side, phi, eta);
694 
695  } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
696  int side = hwid2side(ros,channel);
699 
700  pmt = 0;
701  index = -3;
702  return m_tileTBID->channel_id(side, phi, eta);
703 
704  } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
705  index = pmt = -1;
706  return m_invalid_id;
707  }
708 
709  } else if (m_cablingType == MBTSOnly) {
710 
711  if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
712  int side = hwid2side(ros,channel);
715 
716  pmt = 0;
717  index = -2;
718  return m_tileTBID->channel_id(side, phi, eta);
719 
720  } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
721  index = pmt = -1;
722  return m_invalid_id;
723  }
724 
725  } else {
726 
727  if (sample == TileID::SAMP_X) { // MBTS
728 
729  if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
731 
732  int side = hwid2side(ros,channel);
735 
736  pmt = 0;
737  index = -2;
738 
739  return m_tileTBID->channel_id(side, phi, eta);
740 
741  } else {
742  index = pmt = -1;
743  return m_invalid_id;
744  }
745  } else {
746  index = pmt = -1;
747  return m_invalid_id;
748  }
749  }
750  }
751 
753  int side = hwid2side (ros,channel);
754  int module = hwid2module (drawer);
755 
756  int tower(-1);
757 
758  if (m_cablingType != UpgradeABC) {
759  tower = hwid2tower(ros, channel);
760  pmt = hwid2pmt(ros, channel);
761  } else {
764  }
765 
766  Identifier cellid;
767 
768  if (m_cablingType == MBTSOnly) {
769  if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
770 
772  int tower = hwid2tower_gapscin (ros, drawer, channel);
773 
774  if (tower == -1) {
775  index = pmt = -1;
776  return m_invalid_id;
777  } else {
778  cellid = m_tileID->cell_id(section, side, module, tower, sample);
779  index = m_tileID->cell_hash(cellid);
780  return cellid;
781  }
782  }
783  }
784 
785  cellid = m_tileID->cell_id(section, side, module, tower, sample);
786  index = m_tileID->cell_hash(cellid);
787  return cellid;
788 }
789 
792 {
793  int ros = m_tileHWID->ros (hwid);
794  int drawer = m_tileHWID->drawer (hwid);
795  int channel = m_tileHWID->channel (hwid);
796  if ( EB_special(ros,drawer) ) {
797  if ( D4(channel) ) return m_invalid_id;
798  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
799  }
800 
801  if ( TileHWID::BEAM_ROS == ros ) {
802 
803  int tbtype = hwid2tbtype (drawer);
804  int tbmodule = hwid2tbmodule (drawer,channel);
805  int tbchannel = hwid2tbchannel (drawer,channel);
806 
807  return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
808  }
809 
812 
813  if (sample < 0)
814  return m_invalid_id; // for any kind of cabling can't have negagive sample
815 
816  if (m_run2plus) {
817 
819  int side = hwid2side(ros,channel);
822  return m_tileTBID->channel_id(side, phi, eta);
823 
824  } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
825  int side = hwid2side(ros,channel);
828  return m_tileTBID->channel_id(side, phi, eta);
829 
830  } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
831  return m_invalid_id;
832  }
833 
834  } else if (m_cablingType == MBTSOnly) {
835 
836  if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
837  int side = hwid2side(ros,channel);
840  return m_tileTBID->channel_id(side, phi, eta);
841 
842  } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
843  return m_invalid_id;
844  }
845 
846  } else {
847 
848  if (sample == TileID::SAMP_X) { // MBTS
849 
850  if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
852 
853  int side = hwid2side(ros,channel);
856 
857  return m_tileTBID->channel_id(side, phi, eta);
858 
859  } else
860  return m_invalid_id;
861  } else
862  return m_invalid_id;
863  }
864  }
865 
867  int side = hwid2side (ros,channel);
868  int module = hwid2module (drawer);
869 
870  int tower(-1);
871  int pmt(-1);
872 
873  if (m_cablingType != UpgradeABC) {
874  tower = hwid2tower(ros, channel);
875  pmt = hwid2pmt(ros, channel);
876  } else {
879  }
880 
881  if (m_cablingType == MBTSOnly) {
882  if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
883 
885  int tower = hwid2tower_gapscin (ros, drawer, channel);
886 
887  if (tower == -1) {
888  return m_invalid_id;
889  } else
890  return m_tileID->pmt_id(section, side, module, tower, sample, pmt);
891  }
892  }
893 
894  return m_tileID->pmt_id(section, side, module, tower, sample, pmt);
895 }
896 
899 {
900  int ros = m_tileHWID->ros (hwid);
901  int drawer = m_tileHWID->drawer (hwid);
902  int channel = m_tileHWID->channel (hwid);
903  if ( EB_special(ros,drawer) ) {
904  if ( D4(channel) ) return m_invalid_id;
905  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
906  }
907 
908  if ( TileHWID::BEAM_ROS == ros ) {
909 
910  int tbtype = hwid2tbtype (drawer);
911  int tbmodule = hwid2tbmodule (drawer,channel);
912  int tbchannel = hwid2tbchannel (drawer,channel);
913 
914  return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
915  }
916 
919 
920  if (sample < 0)
921  return m_invalid_id;
922 
923  if (m_run2plus) {
924 
926  int side = hwid2side(ros,channel);
929  return m_tileTBID->channel_id(side, phi, eta);
930 
931  } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
932  int side = hwid2side(ros,channel);
935  return m_tileTBID->channel_id(side, phi, eta);
936 
937  } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
938  return m_invalid_id;
939  }
940 
941  } else if (m_cablingType == MBTSOnly) {
942 
943  if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
944  int side = hwid2side(ros,channel);
947  return m_tileTBID->channel_id(side, phi, eta);
948 
949  } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
950  return m_invalid_id;
951  }
952 
953  } else {
954 
955  if (sample == TileID::SAMP_X) { // MBTS
956 
957  if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
959 
960  int side = hwid2side(ros,channel);
963 
964  return m_tileTBID->channel_id(side, phi, eta);
965 
966  } else
967  return m_invalid_id;
968  } else
969  return m_invalid_id;
970  }
971  }
972 
974  int side = hwid2side (ros,channel);
975  int module = hwid2module (drawer);
976  int adc = m_tileHWID->adc(hwid);
977 
978  int tower(-1);
979  int pmt(-1);
980 
981  if (m_cablingType != UpgradeABC) {
982  tower = hwid2tower(ros, channel);
983  pmt = hwid2pmt(ros, channel);
984  } else {
987  }
988 
989 
990  if (m_cablingType == MBTSOnly) {
991  if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
992 
994  int tower = hwid2tower_gapscin (ros, drawer, channel);
995 
996  if (tower == -1) {
997  return m_invalid_id;
998  } else
999  return m_tileID->adc_id(section, side, module, tower, sample, pmt, adc);
1000  }
1001  }
1002 
1003  return m_tileID->adc_id(section, side, module, tower, sample, pmt, adc);
1004 }
1005 
1006 //
1007 // Convert TileID to TileHWID
1008 //
1009 
1012 {
1013  int section = m_tileID->section (swid);
1014  int ros, drawer;
1015 
1016  if ( TileTBID::TILE_TESTBEAM == section ) {
1017 
1018  int tbtype = m_tileTBID->type(swid);
1019  int tbmodule = m_tileTBID->module(swid);
1020  int tbchannel = m_tileTBID->channel(swid);
1021 
1022  if (tbtype < 2) { // MBTS side +/- 1
1023 
1024  ros = swid2ros(TileID::EXTBAR,tbtype);
1025 
1026  if (m_run2plus) {
1027  drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1028  } else if (m_cablingType == MBTSOnly) {
1029  drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1030  } else {
1031  drawer = MBTS2drawer(tbmodule,tbchannel);
1032  }
1033 
1034  return m_tileHWID->drawer_id(ros, drawer);
1035  }
1036 
1037  drawer = tbid2drawer(tbtype,tbmodule);
1038 
1040  }
1041 
1042  int side = m_tileID->side (swid);
1043  int module = m_tileID->module (swid);
1044  int tower = m_tileID->tower (swid);
1045  int sample = m_tileID->sample (swid);
1046 
1047  if (tower == 0 ) { // special case for D-0 cell
1048  int pmt = m_tileID->pmt (swid);
1049 
1050  int channel = (m_cablingType != UpgradeABC)
1053 
1054  // special case for D0 cell, 2 PMTs in different sides
1057  else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1058  }
1059  }
1060 
1061  ros = swid2ros (section,side);
1062 
1063  if (sample == TileID::SAMP_E && (m_run2plus)) {
1064  drawer = swid2drawer_gapscin_run2plus(side, module,tower); // E1 might go to another module
1065  } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1067  if (drawer < 0) drawer = module; // special trick for disconnected E3 and E4
1068  } else {
1070  }
1071 
1072  return m_tileHWID->drawer_id(ros, drawer);
1073 }
1074 
1077 {
1078  int section = m_tileID->section (swid);
1079  int ros, drawer, channel;
1080 
1081  if ( TileTBID::TILE_TESTBEAM == section ) {
1082 
1083  int tbtype = m_tileTBID->type(swid);
1084  int tbmodule = m_tileTBID->module(swid);
1085  int tbchannel = m_tileTBID->channel(swid);
1086 
1087  if (tbtype < 2) { // MBTS side +/- 1
1088 
1089  ros = swid2ros(TileID::EXTBAR,tbtype);
1090 
1091  if (m_run2plus) {
1092  drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1093  return m_tileHWID->channel_id(ros, drawer, MBTS2channel_run2plus(tbchannel));
1094  } else if (m_cablingType == MBTSOnly) {
1095  drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1096  } else {
1097  drawer = MBTS2drawer(tbmodule,tbchannel);
1098  }
1099 
1101  }
1102 
1103  drawer = tbid2drawer(tbtype,tbmodule);
1104  channel = tbid2channel(drawer,tbchannel);
1105 
1107  }
1108 
1109  int side = m_tileID->side (swid);
1110  int module = m_tileID->module (swid);
1111  int tower = m_tileID->tower (swid);
1112  int sample = m_tileID->sample (swid);
1113  int pmt = m_tileID->pmt (swid);
1114 
1115  if (sample == TileID::SAMP_E && (m_run2plus)) {
1116  drawer = swid2drawer_gapscin_run2plus (side, module,tower); // E1 might go to another module
1117 
1121 
1122  } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1125  if (channel < 0) {
1126  drawer = module;
1127  channel = (tower<15) ? 45 : 46; // special trick : connect non-existing E3 and E4
1128  }
1129 
1130  } else {
1132 
1136  }
1137 
1138  if (channel < 0)
1139  return m_invalid_hwid;
1140 
1141  // special case for D0 cell, 2 PMTs in different sides
1144  else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1145 
1149  }
1150 
1151  ros = swid2ros (section,side);
1152  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
1153 
1154  return m_tileHWID->channel_id(ros, drawer, channel);
1155 }
1156 
1159 {
1160  int section = m_tileID->section (swid);
1161  int ros, drawer, channel;
1162 
1163  if ( TileTBID::TILE_TESTBEAM == section ) {
1164 
1165  int tbtype = m_tileTBID->type(swid);
1166  int tbmodule = m_tileTBID->module(swid);
1167  int tbchannel = m_tileTBID->channel(swid);
1168 
1169  if (tbtype < 2) { // MBTS side +/- 1
1170 
1171  ros = swid2ros(TileID::EXTBAR,tbtype);
1172 
1173  if (m_run2plus) {
1174  drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1176  } else if (m_cablingType == MBTSOnly) {
1177  drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1178  } else {
1179  drawer = MBTS2drawer(tbmodule,tbchannel);
1180  }
1181 
1183  }
1184 
1185  drawer = tbid2drawer(tbtype,tbmodule);
1186  channel = tbid2channel(drawer,tbchannel);
1187 
1189  }
1190 
1191  int side = m_tileID->side (swid);
1192  int module = m_tileID->module (swid);
1193  int tower = m_tileID->tower (swid);
1194  int sample = m_tileID->sample (swid);
1195  int pmt = m_tileID->pmt (swid);
1196  int adc = m_tileID->adc (swid);
1197 
1198  if (sample == TileID::SAMP_E && (m_run2plus)) {
1199  drawer = swid2drawer_gapscin_run2plus (side, module,tower); // E1 might go to another module
1200 
1203 
1204  } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1207  if (channel < 0) {
1208  drawer = module;
1209  channel = (tower<15) ? 45 : 46; // special trick : connect non-existing E3 and E4
1210  }
1211 
1212  } else {
1214 
1217  }
1218 
1219  if (channel < 0)
1220  return m_invalid_hwid;
1221 
1222  // special case for D0 cell, 2 PMTs in different sides
1225  else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1226 
1229  }
1230 
1231  ros = swid2ros(section,side);
1232  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
1233 
1234  return m_tileHWID->adc_id(ros, drawer, channel, adc);
1235 }
1236 
1237 //
1238 // find frag number for given ID
1239 //
1240 
1241 int
1242 TileCablingService::frag ( const Identifier & swid ) const
1243 {
1244  int section = m_tileID->section(swid);
1245  int ros, drawer;
1246 
1247  if ( TileTBID::TILE_TESTBEAM == section ) {
1248 
1249  int tbtype = m_tileTBID->type(swid);
1250  int tbmodule = m_tileTBID->module(swid);
1251  int tbchannel = m_tileTBID->channel(swid);
1252 
1253  if (tbtype < 2) { // MBTS side +/- 1
1254 
1255  ros = swid2ros(TileID::EXTBAR,tbtype);
1256 
1257  if (m_run2plus) {
1258  drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1259  } else if (m_cablingType == MBTSOnly) {
1260  drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1261  } else {
1262  drawer = MBTS2drawer(tbmodule,tbchannel);
1263  }
1264 
1265  return m_tileHWID->frag(ros, drawer);
1266  }
1267 
1268  drawer = tbid2drawer(tbtype,tbmodule);
1269 
1271  }
1272 
1273  int side = m_tileID->side(swid);
1274  int module = m_tileID->module(swid);
1275  int tower = m_tileID->tower(swid);
1276  int sample = m_tileID->sample(swid);
1277 
1278  if (tower == 0 ) { // special case for D-0 cell
1279  int pmt = m_tileID->pmt(swid);
1280 
1283 
1284  // special case for D0 cell, 2 PMTs in different sides
1287  else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1288  }
1289  }
1290 
1291  ros = swid2ros (section, side);
1292 
1293  if (sample == TileID::SAMP_E && (m_run2plus)) {
1294  drawer = swid2drawer_gapscin_run2plus (side, module,tower); // E1 might go to another module
1295  } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1297  if (drawer < 0) drawer = module; // special trick for disconnected E3 and E4
1298  } else {
1300  }
1301 
1302  return m_tileHWID->frag(ros, drawer);
1303 }
1304 
1305 int
1307 {
1308  int ros = m_tileHWID->ros (hwid);
1309  int drawer = m_tileHWID->drawer (hwid);
1310 
1311  return m_tileHWID->frag(ros, drawer);
1312 }
1313 
1314 int
1315 TileCablingService::frag2channels ( const HWIdentifier & hwid, std::vector<HWIdentifier> & ids) const
1316 {
1317  ids.clear();
1318  ids.reserve(m_maxChannels);
1319 
1320  int channel = 0;
1321  for ( ; channel < m_maxChannels; ++channel) {
1322  ids.push_back(m_tileHWID->channel_id(hwid, channel));
1323  }
1324 
1325  return channel;
1326 }
1327 
1328 int
1329 TileCablingService::frag2channels ( int frag, std::vector<HWIdentifier> & ids) const
1330 {
1332 }
1333 
1334 //
1335 // All static methods for mapping between TileID and TileHWID
1336 //
1337 
1338 int
1340 {
1341  int section;
1342 
1343  if (ros > 2) { // extended barrel ROS
1344 
1345  // move cells D4, C10 and gap scin to gap section
1346  if (channel < 6 || channel == 12 || channel == 13)
1348  else
1350  }
1351  else {
1353  }
1354 
1355  return section;
1356 }
1357 
1358 int
1360 {
1361  int side;
1362 
1363  if (channel == 0 && ( ros == LBA || ros == LBC)) { // put both PMTs of cell D0 in positive side
1364 
1366 
1367  } else {
1368 
1369  if ( ros & 1 ) { // odd crates are in positive side
1371  } else {
1373  }
1374 
1375  // at the testbeam "A" and "C" sides have opposite meaning
1376  if (m_testBeam) {
1378  else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1379  }
1380  }
1381 
1382  return side;
1383 }
1384 
1385 int
1387 {
1388  return drawer;
1389 }
1390 
1391 int
1393 {
1394  int twr[96] = {
1395  0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2,
1396  2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 5,
1397  4, 4, 5, 5, 5, 6, -1, -1, 6, 6, 6, 7,
1398  8, 8, 7, 7, 7, 6, 8, -1, 6, 9, 9, 8,
1399 
1400  15, 13, 8, 8, 9, 9, 11, 11, 10, 10, 12, 12,
1401  11, 10, 11, 11, 10, 10, -1, -1, 13, 13, 12, 12,
1402  -1, -1, -1, -1, -1, -1, 13, 14, 14, -1, -1, 13,
1403  14, 12, 12, 14, 15, 15, -1, -1, -1, -1, -1, -1 };
1404 
1405  if (ros > 2) {
1406  channel += 48; // extended barrel
1407  twr[48+m_E1chan] = 10; // old and new simulation has different numbers here
1408  twr[48+m_E2chan] = 11;
1409  twr[48+m_E3chan] = 13;
1410  twr[48+m_E4chan] = 15;
1411  }
1412  int tower = twr[channel];
1413 
1414  return tower;
1415 }
1416 
1417 int
1419 
1420  if (channel >= 0) {
1421  if (ros > 2) channel += m_maxChannels; // extended barrel
1422 
1423  if ((unsigned int) channel < m_ch2towerUpgradeABC.size()) {
1424  return m_ch2towerUpgradeABC[channel];
1425  }
1426  }
1427 
1428  return -1;
1429 }
1430 
1431 
1432 int
1434 {
1435  int smp[96] = {
1436  2, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 1,
1437  1, 2, 2, 0, 1, 1, 0, 0, 0, 1, 1, 0,
1438  2, 2, 0, 1, 1, 0, -1, -1, 0, 1, 1, 0,
1439  0, 0, 0, 1, 1, 2, 1, -1, 2, 0, 0, 1,
1440 
1441  3, 3, 2, 2, 1, 1, 0, 0, 1, 1, 0, 0,
1442  3, 3, 1, 1, 2, 2, -1, -1, 0, 0, 1, 1,
1443  -1, -1, -1, -1, -1, -1, 1, 0, 0, -1, -1, 1,
1444  1, 2, 2, 1, 0, 0, -1, -1, -1, -1, -1, 4 }; // last one is MBTS
1445 
1446  if (ros > 2) channel += 48; // extended barrel
1447  int sample = smp[channel];
1448 
1449  return sample;
1450 }
1451 
1452 int
1454 
1455  if (channel >= 0) {
1456  if (ros > 2) channel += m_maxChannels; // extended barrel
1457 
1458  if ((unsigned int) channel < m_ch2towerUpgradeABC.size()) {
1460  }
1461  }
1462 
1463  return -1;
1464 }
1465 
1466 
1467 void
1469 {
1470  // mapping from module (offline id) to drawer (onile id)
1471  // for gap and crack scintillators E1-E4
1472  // 0 - means "no shift", drawer = module
1473  // +/-1 - shift by one module: drawer = module +/- 1
1474  // NC - not connected
1475  // note: module number in offline identifer is in range 0-63
1476  // and in most of the cases is equal to drawer number
1477  const int NC = 65;
1478  // PB - possibly broken E3, but for the moment assume that this channel is still alive
1479  const int PB = 0;
1480 
1481  int tmp_drawer[512] = {
1482  //Part EBA
1483  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1484  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1485  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,PB, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0,
1486  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0,
1487  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1488  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1489  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1490  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1491 
1492  //Part EBC
1493  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1494  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1495  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1496  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1497  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1498  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1499  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0,
1500  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0
1501  };
1502 
1503  // mapping from module (offline id) to channel (onile id)
1504  // for gap and crack scintillators E1-E4
1505  // 0 - means "no shift", i.e. E1 in channel 12 E2 in channel 13, E3 in channel 0, E4 in channel 1
1506  // SH - shift by one channel for E3, i.e. E3 is in channel 1 instead of channel 0
1507  // NC - not connected
1508  const int SH = 1;
1509  int tmp_channel[512] = {
1510  //Part EBA
1511  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1512  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1513  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,PB, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0,
1514  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0,
1515  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1516  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1517  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1518  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1519 
1520  //Part EBC
1521  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1522  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1523  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1524  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1525  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1526  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1527  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0,
1528  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0
1529  };
1530 
1531  //Now in tables like m_[drawer]_table are not shifts - there are real numbers of [drawers]
1532  for (int i = 0; i < 512; i++) {
1533  if (tmp_drawer[i] != NC) {
1534  m_drawer_table[i] = ((i%256)/4) + tmp_drawer[i];
1535  int channel_number;
1536  switch (i%4) {
1537  case 0: case 1: channel_number = i%4 + 12; break;
1538  default: channel_number = i%4 - 2;
1539  }
1540  m_channel_table[i] = channel_number + tmp_channel[i];
1541  } else
1542  m_drawer_table[i] = m_channel_table[i] = -1;
1543  }
1544 
1545 
1546  //Printing for test
1547  /*
1548  std::cout << " drawer table " << std::endl;
1549 
1550  for (int i = 0; i < 128; ++i) {
1551  for (int j = 0; j < 4; j++) {
1552  std::cout << m_drawer_table[i<<2|j] << " ";
1553  }
1554  std::cout << std::endl;
1555  }
1556 
1557  std::cout << " channel table " << std::endl;
1558 
1559  for (int i = 0; i < 128; ++i) {
1560  for (int j = 0; j < 4; j++) {
1561  std::cout << m_channel_table[i<<2|j] << " ";
1562  }
1563  std::cout << std::endl;
1564  }
1565  */
1566 
1567 
1568  for (int i = 0; i < 512; i++) m_module_table[i] = m_tower_table[i] = -1;
1569 
1570  for (int side = 0; side < 2; side++) {
1571  for (int module_count = 0; module_count < 64; module_count++ ) {
1572  for (int tower_count = 0; tower_count < 4; tower_count++) {
1573  int drawer_number = m_drawer_table[(side<<8)|(module_count<<2)|(tower_count)];
1574  int channel_number = m_channel_table[(side<<8)|(module_count<<2)|(tower_count)];
1575 
1576  //Here I have drawer number and channel number
1577  if ((channel_number == 12)||(channel_number == 13)||(channel_number == 0)||(channel_number == 1)){
1578  int tower_number;
1579  switch (tower_count) {
1580  case 2: tower_number = 13; break;
1581  case 3: tower_number = 15; break;
1582  default: tower_number = tower_count + 10;
1583  }
1584  int channel_count;
1585  switch (channel_number) {
1586  case 12: case 13: channel_count = channel_number - 12; break;
1587  default: channel_count = channel_number + 2;
1588  }
1589  //Here I have coordinates in table of drawer and channel
1590  int index = (side<<8)|(drawer_number<<2)|(channel_count);
1591  m_module_table[index] = module_count;
1592  m_tower_table[index] = tower_number;
1593 
1594 /* std::cout << "m_module_table[(side<<8)|(drawer_number<<2)|(channel_count)] " << m_module_table[index] <<
1595  " m_tower_table[(side<<8)|(drawer_number<<2)|(channel_count)] " << m_tower_table[index] <<
1596  " index " << index << std::endl;
1597 */
1598  //std::cout << "module_count " << module_count << " tower_number " << tower_number << " : side " << side << " tower_count " << tower_count << std::endl;
1599  }
1600  }
1601  }
1602  }
1603 /*
1604  //Printing for test
1605  std::cout << " module table " << std::endl;
1606  for (int i = 0; i < 128; ++i) {
1607  for (int j = 0; j < 4; j++) {
1608  std::cout << m_module_table[i<<2|j] << " ";
1609  }
1610  std::cout << std::endl;
1611  }
1612 
1613  std::cout << " tower table " << std::endl;
1614  for (int i = 0; i < 128; ++i) {
1615  for (int j = 0; j < 4; j++) {
1616  std::cout << m_tower_table[i<<2|j] << " ";
1617  }
1618  std::cout << std::endl;
1619  }
1620 */
1621 }
1622 
1623 // Layout of gap/crack scintillators:
1624 //
1625 // E1: cell = 0, tower = 10, channel = 12
1626 // E2: cell = 1, tower = 11, channel = 13
1627 // E3: cell = 2, tower = 13, channel = 0
1628 // E4: cell = 3, tower = 15, channel = 1
1629 
1630 int
1632 {
1633  // merged E1 cells in EBA and EBC
1634  // module 07,08 -> 07 (i.e. drawer 07 to drawer 06) --
1635  // module 24,25 -> 25 (i.e. drawer 23 to drawer 24) ++
1636  // module 43,44 -> 44 (i.e. drawer 42 to drawer 43) ++
1637  // module 53,54 -> 53 (i.e. drawer 53 to drawer 52) --
1638  //
1639  // merged cells in EBC only
1640  // module 28,29 -> 28 (i.e. drawer 28 to drawer 27) --
1641  // module 31,32 -> 31 (i.e. drawer 31 to drawer 30) --
1642  // module 34,35 -> 35 (i.e. drawer 33 to drawer 34) ++
1643  // module 37,38 -> 38 (i.e. drawer 36 to drawer 37) ++
1644 
1645  // additional merged E1 cells in 2018
1646 
1647  // both EBA and EBC
1648  // module 03,04 -> 04 (i.e. drawer 02 to drawer 03) ++
1649  // module 46,47 -> 47 (i.e. drawer 45 to drawer 46) ++
1650  // module 59,60 -> 60 (i.e. drawer 58 to drawer 59) ++
1651 
1652  // EBA only
1653  // module 20,21 -> 21 (i.e. drawer 19 to drawer 20) ++
1654 
1655  // EBC only
1656  // module 18,19 -> 18 (i.e. drawer 18 to drawer 17) --
1657 
1658  int drawer = module;
1659 
1660  const int towerE1 = (m_cablingType != UpgradeABC) ? 10 : 42;
1661 
1662  if (tower == towerE1) {
1663  if (drawer == 7 || drawer == 53) --drawer;
1664  else if (drawer == 42 || drawer == 23) ++drawer;
1665  else if (m_run2 && side < 0) {
1666  if (drawer == 28 || drawer == 31) --drawer;
1667  else if (drawer == 33 || drawer == 36) ++drawer;
1668  }
1669 
1672  if (drawer == 2 || drawer == 45 || drawer == 58 ) ++drawer;
1673  else {
1674  if (side > 0) {
1675  if (drawer == 19 ) ++drawer;
1676  } else {
1677  if (drawer == 18 ) --drawer;
1678  }
1679  }
1680  }
1681  }
1682 
1683  return drawer;
1684 }
1685 
1686 
1687 
1688 int
1690 {
1691  side = (side == TileID::POSITIVE) ? 0 : 1;
1692  int cell;
1693  switch (tower){
1694  case 15: cell=3; break;
1695  case 13: cell=2; break;
1696  case 11: cell=1; break;
1697  default: cell=0;
1698  }
1699  int p = (side<<8)|(module<<2)|cell;
1700  return m_drawer_table[p];
1701 }
1702 
1703 int
1705 {
1706  side = (side == TileID::POSITIVE) ? 0 : 1;
1707  int cell;
1708  switch (tower){
1709  case 15: cell=3; break;
1710  case 13: cell=2; break;
1711  case 11: cell=1; break;
1712  default: cell=0;
1713  }
1714  int p = (side<<8)|(module<<2)|cell;
1715  return m_channel_table[p];
1716 }
1717 
1718 int
1720 {
1721  int side = (ros < 4) ? 0 : 1; // set side to 1 for ROS=4 which is EBC (negative side)
1722  int cell;
1723  switch (channel) {
1724  case 1: cell=3; break;
1725  case 0: cell=2; break;
1726  case 13: cell=1; break;
1727  default: cell=0;
1728  }
1729  int p = (side<<8)|(drawer<<2)|cell;
1730  return m_module_table[p];
1731 }
1732 
1733 int
1735 {
1736  int side = (ros < 4) ? 0 : 1; // set side to 1 for ROS=4 which is EBC (negative side)
1737  int cell;
1738  switch (channel) {
1739  case 1: cell=3; break;
1740  case 0: cell=2; break;
1741  case 13: cell=1; break;
1742  default: cell=0;
1743  }
1744  int p = (side<<8)|(drawer<<2)|cell;
1745  return m_tower_table[p];
1746 }
1747 
1748 //
1749 // This method tells us which ITC cells and gap/crack scintillators
1750 // are really connected
1751 //
1752 // It returns false for 36 disconnected crack scintillators, for 2 non-existing D4
1753 // and for 16 special C10 (where 1 out of 2 channels is disconnected)
1754 //
1755 bool
1757 {
1758  if (m_tileID->is_tile_gap(id)) { // ITC of gap/crack scin
1759  switch (m_tileID->sample(id)) {
1760 
1761  case TileID::SAMP_C: // cell C10
1762  return C10_connected(m_tileID->module(id));
1763 
1764  case TileID::SAMP_D: // cell D4 - return false for EBA15 and EBC18
1765  return !(EB_special(((m_tileID->side(id)>0)?EBA:EBC),m_tileID->module(id)));
1766 
1767  case TileID::SAMP_E: // E1-E4 - gap/crack scin
1768  return (m_run2plus || swid2channel_gapscin(m_tileID->side(id),
1769  m_tileID->module(id),
1770  m_tileID->tower(id)) != -1);
1771  default:
1772  return false; // other samples do not exist
1773  }
1774  }
1775  return true; // true for all normal cells in barrel and extended barrel
1776 }
1777 
1778 bool
1780 {
1781  const bool C = true;
1782  const bool NC = false;
1783 
1784  bool cell_present[64] = { // counting from 1 in comments
1785  C, C, C, C, C, C, C, C, // 1-8
1786  C, C, C, C, C, C, C, C, // 9-16
1787  C, C, C, C, C, C, C, C, // 17-24
1788  C, C, C, C, C, C, C, C, // 25-32
1789  C, C, C, C, C, C,NC,NC, // 33-40 39-40 do not exist
1790  NC,NC, C, C, C, C, C, C, // 41-48 41-42 do not exist
1791  C, C, C, C, C, C,NC,NC, // 49-56 55-56 do not exist
1792  NC,NC, C, C, C, C, C, C // 57-64 57-58 do not exist
1793  };
1794 
1795  return cell_present[module];
1796 }
1797 
1798 int
1800 {
1801  int pm[96] = {
1802  0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
1803  0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
1804  0, 1, 0, 1, 0, 1, -1, -1, 0, 1, 0, 1,
1805  0, 1, 0, 1, 0, 1, 0, -1, 0, 1, 0, 1,
1806 
1807  0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
1808  0, 0, 0, 1, 0, 1, -1, -1, 0, 1, 0, 1,
1809  -1, -1, -1, -1, -1, -1, 0, 0, 1, -1, -1, 1,
1810  1, 1, 0, 0, 1, 0, -1, -1, -1, -1, -1, -1 };
1811 
1812  int pmt;
1813 
1814  // in gap scintillators there is only one pmt per cell
1815  if ( ros > 2 && (channel == m_E1chan || channel == m_E2chan || channel == m_E3chan || channel == m_E4chan) ) {
1816  pmt = 0;
1817 
1818  } else {
1819 
1820  if (ros > 2) channel += 48; // extended barrel
1821 
1822  pmt = pm[channel];
1823 
1824  // mirroring of odd/even numbers in negative side
1825  // (central symmetry of neg/pos drawers)
1826  if ( (pmt != -1 && TileID::NEGATIVE == hwid2side(ros,channel)) || ((channel==0 && ros==((m_testBeam)?LBA:LBC))))
1827  pmt = 1 - pmt;
1828  }
1829 
1830  return pmt;
1831 }
1832 
1833 int
1835 
1836  int pmt(-1);
1837 
1838  if (channel >= 0) {
1839  if (ros > 2) channel += m_maxChannels; // extended barrel
1840 
1841  if ((unsigned int) channel < m_ch2pmtUpgradeABC.size()) {
1843 
1844  // mirroring of odd/even numbers in negative side
1845  if ((pmt >= 0 && hwid2side(ros, channel) == TileID::NEGATIVE
1847  || (channel == 0 && ros == LBC)) {
1848  pmt = 1 - pmt;
1849  }
1850  }
1851  }
1852 
1853  return pmt;
1854 }
1855 
1856 
1857 int
1859 {
1860  // odd crates are in positive side
1861  int ros = ( TileID::POSITIVE == side ) ? 1 : 2;
1862 
1863  // at the testbeam "A" and "C" sides have opposite meaning
1864  if (m_testBeam)
1865  // even crates are in positive side
1866  ros = ( TileID::POSITIVE == side ) ? 2 : 1;
1867 
1868  // another crate for extended barrel and gap section
1869  if ( TileID::BARREL != section ) ros += 2;
1870 
1871  return ros;
1872 }
1873 
1874 int
1876 {
1877  return module;
1878 }
1879 
1880 int
1881 TileCablingService::swid2channel( int section, int side, int tower, int sample, int pmt) const
1882 {
1883  // 3 samplings * 2 pmt * 16 towers in barrel and ext barrel ITC
1884  // and 2 pmt * 16 towers for scintillators from gap section (samp=3)
1885  // pmt=m_maxChannels for D0/down means that this pmt belongs to another drawer
1886  // this exeption should be treated correctly in calling routine
1887 
1888  int cell[128] = {
1889  //-------------barrel--------------// //-extended barrel-//
1890  4, 8, 10, 18, 20, 26, 32, 38, 36, 46, -1, 6, 10, 20, 31, 41, // sampling A
1891  1, 5, 9, 15, 19, 23, 29, 35, 37, 45, -1, 7, 11, 21, 32, 40, // sampling A
1892 
1893  //-----------barrel------------// ITC //-extended barrel-//
1894  2, 6, 12, 16, 22, 28, 34, 40, 42, 4, 8, 14, 22, 30, 39, -1, // sampling BC
1895  3, 7, 11, 17, 21, 27, 33, 39, 47, 5, 9, 15, 23, 35, 36, -1, // sampling BC
1896 
1897  //-------barrel--------// ITC /extended barrel/
1898  0, -1, 14, -1, 24, -1, 44, -1, 2, -1, 16, -1, 38, -1, -1, -1, // sampling D
1899  m_maxChannels, -1, 13, -1, 25, -1, 41, -1, 3, -1, 17, -1, 37, -1, -1, -1, // sampling D
1900 
1901  //-----gap scin-----//
1902  -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, m_E1chan, m_E2chan, -1, m_E3chan, -1, m_E4chan, // gap scin
1903  -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 };// pmt=1 doesn't exist
1904 
1905  // preserve pmt number for gap scintillators (only pmt=0 exists)
1906  if ( sample != TileID::SAMP_E || section != TileID::GAPDET ) {
1907 
1908  // mirroring of odd/even numbers in negative side
1909  if (TileID::NEGATIVE == side) pmt = 1 - pmt;
1910  }
1911 
1912  int channel = cell[(sample << 5) | (pmt << 4) | tower];
1913 
1914  return channel;
1915 }
1916 
1917 int
1919 {
1920 
1921  int channel(-1);
1922 
1923  if (sample == TileID::SAMP_A) {
1924  int offset = (48 * (1 + (tower % 4)));
1926  } else if (sample == TileID::SAMP_B) {
1927  if (((tower - 2) % 4) == 0) {
1928  int offset = (section == TileID::BARREL) ? 48 : 0;
1929  channel = offset + swid2channel( section, side, (tower - 2) / 4, TileID::SAMP_B, pmt);
1930  }
1931  } else if (sample == TileID::SAMP_D) {
1932  if ((tower % 8) == 0)
1933  channel = swid2channel( section, side, tower / 4, TileID::SAMP_D, pmt);
1934  } else if (sample == TileID::SAMP_X) { // sample C in upgrade
1935  if (((tower - 2) % 4) == 0)
1936  channel = 96 + swid2channel( section, side, (tower - 2) / 4, TileID::SAMP_BC, pmt);
1937  } else {
1938  channel = swid2channel( section, side, tower / 4, sample, pmt);
1939  }
1940 
1941  return channel;
1942 }
1943 
1944 
1945 int
1947 {
1948  // negative means not connected !
1949 
1950  int pos[96] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
1951  13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
1952  27, 26, 25, 30, 29, 28,-33,-32, 31, 36, 35, 34,
1953  39, 38, 37, 42, 41, 40, 45,-44, 43, 48, 47, 46,
1954 
1955  1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
1956  13, 14, 15, 16, 17, 18,-19,-20, 21, 22, 23, 24,
1957  -27,-26,-25,-31,-32,-28, 33, 29, 30,-36,-35, 34,
1958  44, 38, 37, 43, 42, 41,-45,-39,-40,-48,-47,-46 };
1959 
1960  if (ros > 2) channel += 48; // extended barrel
1961  int hole = pos[channel];
1962  // FIXME:: need to do something for special modules EBA15 and EBC18
1963  // the hole numbers -18 and -19 are not expected numbers for gap scin
1964  return hole;
1965 }
1966 
1967 int
1969 {
1970  // negative means not connected !
1971 
1972  int ind[96] = {
1973  0, 1, 2, 2, 1, 3, 4, 4, 3, 5, 5, 6,
1974  6, 7, 7, 8, 9, 9, 8, 10, 10, 11, 11, 12,
1975  13, 13, 12, 14, 14, 15, -1, -1, 15, 16, 16, 17,
1976  18, 18, 17, 19, 19, 20, 21, -1, 20, 22, 22, 21,
1977 
1978  1, 2, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
1979  3, 4, 10, 10, 11, 11, -1, -1, 12, 12, 13, 13,
1980  -1, -1, -1, -1, -1, -1, 14, 15, 15, -1, -1, 14,
1981  16, 17, 17, 16, 18, 18, -1, -1, -1, -1, -1, -1
1982  };
1983 
1984  if (ros > 2) channel += 48; // extended barrel
1985  int index = ind[channel];
1986 
1987  return index;
1988 }
1989 //label
1990 //
1991 // create cabling for very few ancillary detectors at the testbeam
1992 // complete mapping will be loaded from database
1993 //
1994 
1995 int
1997 {
1998  // input: drawer
1999  //
2000  // #define BEAM_TDC_FRAG 0x000
2001  // #define BEAM_ADC_FRAG 0x001
2002  // #define MUON_ADC_FRAG 0x002
2003  // #define ADDR_ADC_FRAG 0x003
2004  // #define LASE_PTN_FRAG 0x004
2005  // #define LASE_ADC_FRAG 0x005
2006  // #define ADD_FADC_FRAG 0x006
2007  // #define ECAL_ADC_FRAG 0x007
2008  //
2009  static const int tbtype[8] = {
2018  };
2019 
2020  if (drawer<8) return tbtype[drawer];
2021  else return TileTBID::INT_TYPE;
2022 }
2023 
2024 int
2025 TileCablingService::hwid2tbmodule ( int drawer, int /* channel */ )
2026 {
2027  static const int tbmodule[8] = {
2028  0,
2031  0,
2032  0,
2033  0,
2034  0,
2036  };
2037 
2038  if (drawer<8) return tbmodule[drawer];
2039  else return 0;
2040 }
2041 
2042 int
2044 {
2045  return channel;
2046 }
2047 
2048 int
2049 TileCablingService::tbid2drawer ( int /* tbtype */, int tbmodule )
2050 {
2051  switch (tbmodule) {
2052  case TileTBID::CRACK_WALL: return 1;
2053  case TileTBID::BACK_WALL: return 2;
2054  case TileTBID::PHANTOM_CALO: return 7;
2055  default: return 0xFF;
2056  }
2057 }
2058 
2059 int
2060 TileCablingService::tbid2channel ( int /* drawer */, int tbchannel )
2061 {
2062  return tbchannel;
2063 }
2064 
2065 //
2066 // Next 6 methods provide FAKE cabling for MBTS
2067 // MBTS is connected to last (47) channel in every 4th drawer
2068 // used in simulation only
2069 //
2070 bool
2072 {
2073  return ((ros > 2) && (channel == 47) && (drawer%4 == 0)); // fake cabling, last channel in every 4th drawer
2074 }
2075 
2076 int
2077 TileCablingService::hwid2MBTSphi(int drawer, int /* channel */) const
2078 {
2079  return (drawer/8);
2080 }
2081 
2082 int
2083 TileCablingService::hwid2MBTSeta(int drawer, int /* channel */) const
2084 {
2085  return ((drawer%8)/4);
2086 }
2087 
2088 int
2090 {
2091  return (phi*8 + eta*4); // fake cabling, every 4th drawer
2092 }
2093 
2094 //
2095 // Next 4 methods provide REAL cabling for MBTS
2096 // used for reconstruction of real data
2097 //
2098 bool
2100 {
2101  return ((ros > 2) && (channel == 0) && hwid2MBTSeta_real(ros,drawer,channel) != -1);
2102 }
2103 
2104 int
2105 TileCablingService::hwid2MBTSphi_real(int /* ros */, int drawer, int /* channel */) const
2106 {
2107  return (drawer/8); // correct formula even for real MBTS (see MBTS2drawer_real below)
2108 }
2109 
2110 int
2111 TileCablingService::hwid2MBTSeta_real(int ros, int drawer, int /* channel */) const
2112 {
2113  int eta[128] = {
2114  // EBA
2115  -1, -1, 1, 0, -1, -1, -1, -1,
2116  -1, -1, -1, 1, 0, -1, -1, -1,
2117  -1, -1, -1, -1, -1, -1, 1, 0,
2118  -1, -1, -1, -1, -1, 1, 0, -1,
2119  -1, -1, 1, 0, -1, -1, -1, -1,
2120  -1, -1, -1, 0, 1, -1, -1, -1,
2121  -1, -1, -1, -1, 0, 1, -1, -1,
2122  -1, -1, -1, 1, 0, -1, -1, -1,
2123  // EBC
2124  -1, -1, -1, 1, 0, -1, -1, -1,
2125  -1, -1, -1, 1, 0, -1, -1, -1,
2126  -1, -1, 1, 0, -1, -1, -1, -1,
2127  -1, -1, 1, 0, -1, -1, -1, -1,
2128  -1, -1, -1, 1, 0, -1, -1, -1,
2129  -1, -1, -1, 1, 0, -1, -1, -1,
2130  -1, -1, -1, -1, -1, 1, 0, -1,
2131  -1, -1, -1, -1, 1, 0, -1, -1
2132  };
2133  // no protection against wrong numbers
2134  // assume that ROS can be only 3 or 4
2135  if (ros == EBC) drawer += 64; // negative extended barrel, ROS=4
2136  return eta[drawer];
2137 }
2138 
2139 int
2141 {
2142  int drawer[32] = {
2143  //part EBA
2144  3, 12, 23, 30, 35, 43, 52, 60, //E6
2145  2, 11, 22, 29, 34, 44, 53, 59, //E5
2146  //part EBC
2147  4, 12, 19, 27, 36, 44, 54, 61, //E6
2148  3, 11, 18, 26, 35, 43, 53, 60 };//E5
2149 
2150  int side = (ros == 3) ? 0 : 1;
2151 
2152  return (drawer[(side<<4)|(eta<<3)|phi]);
2153 }
2154 
2155 //
2156 // Next 5 methods provide RUN2 cabling for MBTS
2157 // used for reconstruction of real data
2158 //
2159 bool
2161 {
2162  return ( (ros > 2) &&
2163  ( (channel == 4 && hwid2MBTSeta_run2plus(ros,drawer) == 0) ||
2164  (channel == 12 && hwid2MBTSeta_run2plus(ros,drawer) == 1) ) );
2165 }
2166 
2167 bool
2169 {
2170  return ((ros > 2) && hwid2MBTSeta_run2plus(ros,drawer) != -1);
2171 }
2172 
2173 bool
2175 {
2176  return ((ros > 3) && (channel == 12) && hwid2E4preta_run2(drawer) != -1);
2177 }
2178 
2179 bool
2181 {
2182  return ((ros > 3) && hwid2E4preta_run2(drawer) != -1);
2183 }
2184 
2185 
2186 /*
2187 
2188 E4' cabling for run2
2189 
2190 modules 29,32,34,37
2191 drawers 28,31,33,36
2192 
2193 MBTS cabling for RUN2
2194 (in the table drawer = module-1)
2195 
2196 Outer MBTS (eta=1)
2197 =========================
2198  phi | connected to
2199  pos | module/drawer
2200 ==========|==============
2201  04+12 0 | 08 07
2202  20+28 2 | 24 23
2203  36+44 4 | 43 42
2204  52+60 6 | 54 53
2205 
2206 
2207 Inner MBTS (eta=0)
2208 ======================
2209  phi | connected to
2210  pos | module/drawer
2211 =======|==============
2212  04 0 | 57 56
2213  12 1 | 58 57
2214  20 2 | 39 38
2215  28 3 | 40 39
2216  36 4 | 41 40
2217  44 5 | 42 41
2218  52 6 | 55 54
2219  60 7 | 56 55
2220 
2221 Outer MBTS (eta=1) in 2018
2222 ======================
2223  phi | connected to
2224  pos | module/drawer
2225 =======|==============
2226  04 0 | 03 02
2227  12 1 | 08 07
2228  20 2 | 20(19) 19(18) EBA(EBC)
2229  28 3 | 24 23
2230  36 4 | 43 42
2231  44 5 | 46 45
2232  52 6 | 54 53
2233  60 7 | 59 58
2234 
2235 */
2236 
2237 int
2239 {
2240  int phi[64] = {
2241  -1, -1, -1, -1, -1, -1, -1, 0,
2242  -1, -1, -1, -1, -1, -1, -1, -1,
2243  -1, -1, -1, -1, -1, -1, -1, 2,
2244  -1, -1, -1, -1, -1, -1, -1, -1,
2245  -1, -1, -1, -1, -1, -1, 2, 3,
2246  4, 5, 4, -1, -1, -1, -1, -1,
2247  -1, -1, -1, -1, -1, 6, 6, 7,
2248  0, 1, -1, -1, -1, -1, -1, -1
2249  };
2250 
2251  int phiA[64] = {
2252  -1, -1, 0, -1, -1, -1, -1, 1,
2253  -1, -1, -1, -1, -1, -1, -1, -1,
2254  -1, -1, -1, 2, -1, -1, -1, 3,
2255  -1, -1, -1, -1, -1, -1, -1, -1,
2256  -1, -1, -1, -1, -1, -1, 2, 3,
2257  4, 5, 4, -1, -1, 5, -1, -1,
2258  -1, -1, -1, -1, -1, 6, 6, 7,
2259  0, 1, 7, -1, -1, -1, -1, -1
2260  };
2261 
2262  int phiC[64] = {
2263  -1, -1, 0, -1, -1, -1, -1, 1,
2264  -1, -1, -1, -1, -1, -1, -1, -1,
2265  -1, -1, 2, -1, -1, -1, -1, 3,
2266  -1, -1, -1, -1, -1, -1, -1, -1,
2267  -1, -1, -1, -1, -1, -1, 2, 3,
2268  4, 5, 4, -1, -1, 5, -1, -1,
2269  -1, -1, -1, -1, -1, 6, 6, 7,
2270  0, 1, 7, -1, -1, -1, -1, -1
2271  };
2272 
2275  return (ros<4)?phiA[drawer]:phiC[drawer];
2276  } else {
2277  return phi[drawer];
2278  }
2279 }
2280 
2281 int
2283 {
2284  int eta[64] = {
2285  -1, -1, -1, -1, -1, -1, -1, 1,
2286  -1, -1, -1, -1, -1, -1, -1, -1,
2287  -1, -1, -1, -1, -1, -1, -1, 1,
2288  -1, -1, -1, -1, -1, -1, -1, -1,
2289  -1, -1, -1, -1, -1, -1, 0, 0,
2290  0, 0, 1, -1, -1, -1, -1, -1,
2291  -1, -1, -1, -1, -1, 1, 0, 0,
2292  0, 0, -1, -1, -1, -1, -1, -1
2293  };
2294 
2295  int etaA[64] = {
2296  -1, -1, 1, -1, -1, -1, -1, 1,
2297  -1, -1, -1, -1, -1, -1, -1, -1,
2298  -1, -1, -1, 1, -1, -1, -1, 1,
2299  -1, -1, -1, -1, -1, -1, -1, -1,
2300  -1, -1, -1, -1, -1, -1, 0, 0,
2301  0, 0, 1, -1, -1, 1, -1, -1,
2302  -1, -1, -1, -1, -1, 1, 0, 0,
2303  0, 0, 1, -1, -1, -1, -1, -1
2304  };
2305 
2306  int etaC[64] = {
2307  -1, -1, 1, -1, -1, -1, -1, 1,
2308  -1, -1, -1, -1, -1, -1, -1, -1,
2309  -1, -1, 1, -1, -1, -1, -1, 1,
2310  -1, -1, -1, -1, -1, -1, -1, -1,
2311  -1, -1, -1, -1, -1, -1, 0, 0,
2312  0, 0, 1, -1, -1, 1, -1, -1,
2313  -1, -1, -1, -1, -1, 1, 0, 0,
2314  0, 0, 1, -1, -1, -1, -1, -1
2315  };
2316 
2319  return (ros<4)?etaA[drawer]:etaC[drawer];
2320  } else {
2321  return eta[drawer];
2322  }
2323 }
2324 
2325 int
2327 {
2328  int phi[64] = {
2329  -1, -1, -1, -1, -1, -1, -1, -1,
2330  -1, -1, -1, -1, -1, -1, -1, -1,
2331  -1, -1, -1, -1, -1, -1, -1, -1,
2332  -1, -1, -1, -1, 0, -1, -1, 1,
2333  -1, 2, -1, -1, 3, -1, -1, -1,
2334  -1, -1, -1, -1, -1, -1, -1, -1,
2335  -1, -1, -1, -1, -1, -1, -1, -1,
2336  -1, -1, -1, -1, -1, -1, -1, -1
2337  };
2338 
2339  return phi[drawer];
2340 }
2341 
2342 int
2344 {
2345  int eta[64] = {
2346  -1, -1, -1, -1, -1, -1, -1, -1,
2347  -1, -1, -1, -1, -1, -1, -1, -1,
2348  -1, -1, -1, -1, -1, -1, -1, -1,
2349  -1, -1, -1, -1, 2, -1, -1, 2,
2350  -1, 2, -1, -1, 2, -1, -1, -1,
2351  -1, -1, -1, -1, -1, -1, -1, -1,
2352  -1, -1, -1, -1, -1, -1, -1, -1,
2353  -1, -1, -1, -1, -1, -1, -1, -1
2354  };
2355 
2356  return eta[drawer];
2357 }
2358 
2359 int
2361 {
2362  int drawer[24] = {
2363  56, 57, 38, 39, 40, 41, 54, 55, //E6 (inner)
2364  7, 7, 23, 23, 42, 42, 53, 53, //E5 (outer)
2365  28, 31, 33, 36, 28, 31, 33, 36 };//E4'
2366 
2367  int drawerE5A[8] = {2, 7, 19, 23, 42, 45, 53, 58}; //E5 (outer) in EBA in 2018
2368  int drawerE5C[8] = {2, 7, 18, 23, 42, 45, 53, 58}; //E5 (outer) in EBA in 2018
2369 
2371  && eta == 1) {
2372  return (side>0)?drawerE5A[phi]:drawerE5C[phi];
2373  } else {
2374  return (drawer[(eta<<3)|phi]);
2375  }
2376 }
2377 
2378 int
2380 {
2381  return ((eta==0)?4:12); // both MBTS and E4'
2382 }
2383 
2384 unsigned int
2386 {
2387  return m_tileID->is_tile_gapscin(cell_id) ? 1:2;
2388 }
2389 
2390 void
2392 
2393  if (m_isCacheFilled) return;
2394 
2395  unsigned int nChannels = (TileCalibUtils::MAX_ROS - 1) * TileCalibUtils::MAX_DRAWER * m_maxChannels;
2396 
2397  m_ch2cell.resize(nChannels);
2398  m_ch2pmt.resize(nChannels);
2399  m_ch2index.resize(nChannels);
2400 
2401  for (unsigned int ros = 1; ros < TileCalibUtils::MAX_ROS; ++ros) {
2402  for (unsigned int drawer = 0; drawer < TileCalibUtils::MAX_DRAWER; ++drawer) {
2403  for (int channel = 0; channel < m_maxChannels; ++channel) {
2404  int index;
2405  int pmt;
2407  int ind = cacheIndex(ros, drawer, channel);
2408  m_ch2cell[ind] = cell_id;
2409  m_ch2pmt[ind] = pmt;
2410  m_ch2index[ind] = index;
2411  }
2412  }
2413  }
2414  m_isCacheFilled = true;
2415 }
2416 
2417 Identifier
2418 TileCablingService::h2s_cell_id_index ( const HWIdentifier & hwid, int & index, int & pmt ) const
2419 {
2420  int ros = m_tileHWID->ros (hwid);
2421  int drawer = m_tileHWID->drawer (hwid);
2422  int channel = m_tileHWID->channel (hwid);
2423 
2426  } else {
2428  }
2429 }
2430 
2431 Identifier
2433 {
2434 
2437  } else {
2439  }
2440 }
2441 
2442 
2443 Identifier
2445  int & index, int & pmt ) const
2446 {
2447  int ind = cacheIndex(ros, drawer, channel);
2448  index = m_ch2index[ind];
2449  pmt = m_ch2pmt[ind];
2450  return m_ch2cell[ind];
2451 }
2452 
2454  return m_MBTSmergedRun2Plus[module];
2455 }
2456 
2458  return m_E1mergedRun2Plus[(ros - 3) * 64 + module];
2459 }
2460 
2462 
2463  bool isChannelDisconnected(channel2hole(ros, channel) < 0);
2464 
2465  // Modules EBA15 and EBC18 are special
2466  if ((ros == 3 && drawer == 14) || (ros == 4 && drawer == 17)) {
2467  if (channel < 4) {
2468  isChannelDisconnected = true;
2469  } else if (channel == 18 || channel == 19) {
2470  isChannelDisconnected = false;
2471  }
2472  }
2473 
2474  return isChannelDisconnected;
2475 }
TileCablingService::cell2mt_id
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Definition: TileCablingService.cxx:442
TileCablingService::m_TT_ID
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Definition: TileCablingService.h:181
TileCablingService::RUN3Cabling
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Definition: TileCablingService.h:91
TileCablingService::h2s_cell_id_index_from_cache
Identifier h2s_cell_id_index_from_cache(int ros, int drawer, int channel, int &index, int &pmt) const
Definition: TileCablingService.cxx:2444
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@ MBTSOnly
Definition: TileCablingService.h:87
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Definition: TileCablingService.h:213
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Definition: TileCablingService.h:262
TileTBID::channel_id
Identifier channel_id(int type, int module, int channel) const
identifer for one channel of a Tile testbeam detector
Definition: TileTBID.cxx:196
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bool TileGap_connected(const Identifier &id) const
Definition: TileCablingService.cxx:1756
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@ SAMP_B
Definition: Tile_Base_ID.h:54
TileCablingService::h2s_cell_id_index_find
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Definition: TileCablingService.cxx:661
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std::vector< int > m_ch2sampleUpgradeABC
Definition: TileCablingService.h:258
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bool m_isCacheFilled
Definition: TileCablingService.h:238
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Definition: ReadCellNoiseFromCool.py:53
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def p
Definition: PerfMonSerializer.py:743
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#define max(a, b)
Definition: cfImp.cxx:41
TileCablingService::setTestBeam
void setTestBeam(bool testBeam)
Definition: TileCablingService.cxx:200
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Definition: yearwise_efficiency.py:28
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Scalar phi() const
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TileTBID::TILE_TESTBEAM
@ TILE_TESTBEAM
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:82
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Identifier pmt2tt_id(const Identifier &id) const
Definition: TileCablingService.cxx:375
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@ TDC_TYPE
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:85
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bool hwid2MBTSconnected(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2071
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static const TileCablingService * getInstance()
get pointer to service instance
Definition: TileCablingService.cxx:24
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int m_maxChannels
Definition: TileCablingService.h:265
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@ INT_TYPE
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:87
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bool is_tile_gap(const Identifier &id) const
Definition: Tile_Base_ID.cxx:223
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Definition: TileCablingService.cxx:1834
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Definition: TileCablingService.cxx:114
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Definition: AmgMatrixBasePlugin.h:79
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Definition: index.py:1
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Definition: Tile_Base_ID.cxx:180
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Definition: TileCablingService.h:261
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int cacheIndex(int ros, int drawer, int channel) const
Definition: TileCablingService.h:248
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@ TestBeam
Definition: TileCablingService.h:84
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Definition: ReadBchFromCool.py:62
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Definition: Tile_Base_ID.h:53
TileCalibUtils
Static class providing several utility functions and constants.
Definition: TileCalibUtils.h:15
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Definition: Tile_Base_ID.h:54
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Definition: Tile_Base_ID.cxx:153
TileHWID::BEAM_ROS
@ BEAM_ROS
Definition: TileHWID.h:67
Tile_Base_ID::sample
int sample(const Identifier &id) const
Definition: Tile_Base_ID.cxx:171
TileCablingService::m_tileID
const TileID * m_tileID
Definition: TileCablingService.h:179
TileCablingService::hwid2tower_gapscin
int hwid2tower_gapscin(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:1734
TileCablingService::pmt2mt_id
Identifier pmt2mt_id(const Identifier &id) const
Definition: TileCablingService.cxx:449
TRT_PAI_gasdata::NC
const int NC
Number of levels for Carbon.
Definition: TRT_PAI_gasdata.h:237
TileTBID::PHANTOM_CALO
@ PHANTOM_CALO
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:94
TileCablingService::fillConnectionTables
void fillConnectionTables()
Definition: TileCablingService.cxx:1468
TileHWID::frag
int frag(const HWIdentifier &id) const
extract frag field from HW identifier
Definition: TileHWID.h:181
TileCablingService::isChannelFromOppositeSide
bool isChannelFromOppositeSide(int channel) const
Definition: TileCablingService.h:252
TileCablingService::m_E1mergedRun2Plus
std::vector< int > m_E1mergedRun2Plus
Definition: TileCablingService.h:255
TileCablingService::h2s_cell_id_index
Identifier h2s_cell_id_index(const HWIdentifier &id, int &index, int &pmt) const
Definition: TileCablingService.cxx:2418
Tile_Base_ID::GAPDET
@ GAPDET
Definition: Tile_Base_ID.h:48
TileCalibUtils.h
Tile_Base_ID::tower
int tower(const Identifier &id) const
Definition: Tile_Base_ID.cxx:165
TileCablingService::m_invalid_hwid
HWIdentifier m_invalid_hwid
Definition: TileCablingService.h:177
TileCablingService::m_drawer_table
int m_drawer_table[512]
Definition: TileCablingService.h:231
Tile_Base_ID::SAMP_E
@ SAMP_E
Definition: Tile_Base_ID.h:55
TileTBID::type
int type(const Identifier &id) const
extract type field from TileTB identifier
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:146
TileTBID::ADC_TYPE
@ ADC_TYPE
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:84
HWIdentifier
Definition: HWIdentifier.h:13
TileHWID::HIGHGAIN
@ HIGHGAIN
Definition: TileHWID.h:73
Tile_Base_ID::BARREL
@ BARREL
Definition: Tile_Base_ID.h:48
TileCablingService::hwid2module
static int hwid2module(int drawer)
Definition: TileCablingService.cxx:1386
TileCablingService::RUN2aCabling
@ RUN2aCabling
Definition: TileCablingService.h:90
TileCablingService::fillH2SIdCache
void fillH2SIdCache(void)
Definition: TileCablingService.cxx:2391
TileCablingService::m_ch2pmt
std::vector< int > m_ch2pmt
Definition: TileCablingService.h:240
Example_ReadSampleNoise.drawer
drawer
Definition: Example_ReadSampleNoise.py:39
TileTBID::module
int module(const Identifier &id) const
extract module field from TileTB identifier
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:150
TileHWID::channel
int channel(const HWIdentifier &id) const
extract channel field from HW identifier
Definition: TileHWID.h:189
TileCablingService::EBA
@ EBA
Definition: TileCablingService.h:202
TileCablingService::tbid2drawer
static int tbid2drawer(int tbtype, int tbmodule)
Definition: TileCablingService.cxx:2049
TileCablingService::m_E3special
int m_E3special
Definition: TileCablingService.h:211
TileCalibUtils::MAX_DRAWER
static const unsigned int MAX_DRAWER
Number of drawers in ROS 1-4.
Definition: TileCalibUtils.h:139
TileCablingService::setCablingType
bool setCablingType(TileCablingType type)
Definition: TileCablingService.cxx:228
TileCablingService::hwid2tower
int hwid2tower(int ros, int channel) const
Definition: TileCablingService.cxx:1392
Tile_Base_ID::SAMP_C
@ SAMP_C
Definition: Tile_Base_ID.h:54
TileHWID::ros
int ros(const HWIdentifier &id) const
extract ros field from HW identifier
Definition: TileHWID.h:167
TileCablingService::setConnected
void setConnected(int section, int side, int modMin, int modMax)
Definition: TileCablingService.cxx:339
TileCablingService::m_tileTBID
const TileTBID * m_tileTBID
Definition: TileCablingService.h:182
TileCablingService::swid2drawer
static int swid2drawer(int module)
Definition: TileCablingService.cxx:1875
TRT::Hit::side
@ side
Definition: HitInfo.h:83
TileCablingService::m_ch2pmtUpgradeABC
std::vector< int > m_ch2pmtUpgradeABC
Definition: TileCablingService.h:257
TileCablingService::~TileCablingService
virtual ~TileCablingService()
Definition: TileCablingService.cxx:195
TileCablingService::hwid2MBTSconnected_run2plus
bool hwid2MBTSconnected_run2plus(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2160
TileCablingService::TileCablingService
TileCablingService()
Definition: TileCablingService.cxx:38
TileCablingService::frag
int frag(const HWIdentifier &id) const
Definition: TileCablingService.cxx:1306
TileCablingService::m_tileHWID
const TileHWID * m_tileHWID
Definition: TileCablingService.h:180
TileCablingService::hwid2tower_upgradeABC
int hwid2tower_upgradeABC(int ros, int channel) const
Definition: TileCablingService.cxx:1418
python.PyAthena.module
module
Definition: PyAthena.py:134
Tile_Base_ID::EXTBAR
@ EXTBAR
Definition: Tile_Base_ID.h:48
TileCablingService::m_E3chan
int m_E3chan
Definition: TileCablingService.h:209
TileCablingService::hwid2sample_upgradeABC
int hwid2sample_upgradeABC(int ros, int channel) const
Definition: TileCablingService.cxx:1453
TileCablingService::m_EBCspec
int m_EBCspec
Definition: TileCablingService.h:206
TileCablingService::MBTS2channel_run2plus
int MBTS2channel_run2plus(int eta) const
Definition: TileCablingService.cxx:2379
TileHWID::adc
int adc(const HWIdentifier &id) const
extract adc field from HW identifier
Definition: TileHWID.h:193
TileCablingService::m_testBeam
bool m_testBeam
Definition: TileCablingService.h:189
Tile_Base_ID::get_id
virtual int get_id(const IdentifierHash &hash_id, Identifier &id, const IdContext *context=0) const
create compact id from hash id (return == 0 for OK)
Definition: Tile_Base_ID.cxx:1077
TileCablingService::hwid2MBTSphi
int hwid2MBTSphi(int drawer, int channel) const
Definition: TileCablingService.cxx:2077
Tile_Base_ID::adc
int adc(const Identifier &id) const
Definition: Tile_Base_ID.cxx:186
TileCablingService::h2s_cell_id
Identifier h2s_cell_id(const HWIdentifier &id) const
Definition: TileCablingService.cxx:562
Tile_Base_ID::is_tile_gapscin
bool is_tile_gapscin(const Identifier &id) const
Definition: Tile_Base_ID.cxx:268
TileCablingService::hwid2MBTSeta_run2plus
int hwid2MBTSeta_run2plus(int ros, int drawer) const
Definition: TileCablingService.cxx:2282
TileCablingService::m_run3
bool m_run3
Definition: TileCablingService.h:263
TileCablingService::hwid2MBTSphi_run2plus
int hwid2MBTSphi_run2plus(int ros, int drawer) const
Definition: TileCablingService.cxx:2238
Tile_Base_ID::module
int module(const Identifier &id) const
Definition: Tile_Base_ID.cxx:159
FullCPAlgorithmsTest_eljob.sample
sample
Definition: FullCPAlgorithmsTest_eljob.py:100
TileCablingService.h
lumiFormat.i
int i
Definition: lumiFormat.py:92
TileCablingService::hwid2section
static int hwid2section(int ros, int channel)
Definition: TileCablingService.cxx:1339
TileCablingService::swid2drawer_gapscin
int swid2drawer_gapscin(int side, int module, int tower) const
Definition: TileCablingService.cxx:1689
TileCablingService::hwid2tbchannel
static int hwid2tbchannel(int drawer, int channel)
Definition: TileCablingService.cxx:2043
TileCablingService::h2s_adc_id
Identifier h2s_adc_id(const HWIdentifier &id) const
Definition: TileCablingService.cxx:898
Identifier
Definition: DetectorDescription/Identifier/Identifier/Identifier.h:32
TileCablingService::drawer2MBTS_id
Identifier drawer2MBTS_id(const HWIdentifier &id) const
Definition: TileCablingService.cxx:499
TileCablingService::hwid2E4prphi_run2
int hwid2E4prphi_run2(int drawer) const
Definition: TileCablingService.cxx:2326
TileCablingService::hwid2tbmodule
static int hwid2tbmodule(int drawer, int channel)
Definition: TileCablingService.cxx:2025
TileCablingService::hwid2side
int hwid2side(int ros, int channel) const
Definition: TileCablingService.cxx:1359
TileCablingService::m_maxGains
int m_maxGains
Definition: TileCablingService.h:266
TileCablingService::m_connected
bool m_connected[5][64]
Definition: TileCablingService.h:192
TileCablingService::hwid2MBTSeta_real
int hwid2MBTSeta_real(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2111
Tile_Base_ID::POSITIVE
@ POSITIVE
Definition: Tile_Base_ID.h:56
TileCablingService::m_module_table
int m_module_table[512]
Definition: TileCablingService.h:233
TileCablingService::MBTS2drawer
int MBTS2drawer(int phi, int eta) const
Definition: TileCablingService.cxx:2089
TileCablingService::hwid2module_gapscin
int hwid2module_gapscin(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:1719
TileCablingService::CrackAndMBTS
@ CrackAndMBTS
Definition: TileCablingService.h:88
TileCablingService::hwid2sample
static int hwid2sample(int ros, int channel)
Definition: TileCablingService.cxx:1433
TileCalibUtils::MAX_ROS
static const unsigned int MAX_ROS
Number of ROSs
Definition: TileCalibUtils.h:138
TileTBID::FADC_TYPE
@ FADC_TYPE
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:86
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ros
Definition: maskDeadModules.py:35
TileCablingService
Definition: TileCablingService.h:23
TileCablingService::hwid2E4preta_run2
int hwid2E4preta_run2(int drawer) const
Definition: TileCablingService.cxx:2343
TileCablingService::LBC
@ LBC
Definition: TileCablingService.h:201
TileCablingService::s2h_drawer_id
HWIdentifier s2h_drawer_id(const Identifier &id) const
Definition: TileCablingService.cxx:1011
TileTBID::channel
int channel(const Identifier &id) const
extract channel field from TileTB identifier
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:154
TileCablingService::m_ch2towerUpgradeABC
std::vector< int > m_ch2towerUpgradeABC
Definition: TileCablingService.h:259
TileCablingService::swid2channel
int swid2channel(int section, int side, int tower, int sample, int pmt) const
Definition: TileCablingService.cxx:1881
TileCablingService::hwid2E4prconnected_run2
bool hwid2E4prconnected_run2(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2174
min
#define min(a, b)
Definition: cfImp.cxx:40
TileCablingService::m_MBTSmergedRun2Plus
std::vector< bool > m_MBTSmergedRun2Plus
Definition: TileCablingService.h:252
Tile_Base_ID::adc_id
Identifier adc_id(const Identifier &cell_id, int pmt, int adc) const
Definition: Tile_Base_ID.cxx:802
TileCablingService::m_channel_table
int m_channel_table[512]
Definition: TileCablingService.h:232
TileCablingService::hwid2MBTSeta
int hwid2MBTSeta(int drawer, int channel) const
Definition: TileCablingService.cxx:2083
TileCablingService::setRun3Merged
void setRun3Merged()
Definition: TileCablingService.cxx:156
TileHWID::drawer_id
HWIdentifier drawer_id(int frag) const
ROS HWIdentifer.
Definition: TileHWID.cxx:186
TileCablingService::m_tower_table
int m_tower_table[512]
Definition: TileCablingService.h:234
TileCablingService::m_ch2cell
std::vector< Identifier > m_ch2cell
Definition: TileCablingService.h:239
TileCablingService::is_MBTS_merged_run2plus
bool is_MBTS_merged_run2plus(int module) const
Definition: TileCablingService.cxx:2453
python.subdetectors.mmg.ids
ids
Definition: mmg.py:8
TileCablingService::D4
bool D4(int channel) const
Definition: TileCablingService.h:174
TileHWID::channel_id
HWIdentifier channel_id(int ros, int drawer, int channel) const
channel HWIdentifer
Definition: TileHWID.cxx:198
Tile_Base_ID::NEGATIVE
@ NEGATIVE
Definition: Tile_Base_ID.h:56
TileCablingService::hwid2tbtype
static int hwid2tbtype(int drawer)
Definition: TileCablingService.cxx:1996
TileCablingService::s2h_adc_id
HWIdentifier s2h_adc_id(const Identifier &id) const
Definition: TileCablingService.cxx:1158
TileCablingService::TileCablingType
TileCablingType
Definition: TileCablingService.h:84
TileCablingService::m_E1chan
int m_E1chan
Definition: TileCablingService.h:207
TileCablingService::m_E4special
int m_E4special
Definition: TileCablingService.h:212
TileCablingService::channel2cellindex
static int channel2cellindex(int ros, int channel)
Definition: TileCablingService.cxx:1968
TileCablingService::m_E4chan
int m_E4chan
Definition: TileCablingService.h:210
TileTBID::CRACK_WALL
@ CRACK_WALL
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:93
TileCablingService::hwid2MBTSconnected_real
bool hwid2MBTSconnected_real(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2099
python.LumiBlobConversion.pos
pos
Definition: LumiBlobConversion.py:18
TileTBID::BACK_WALL
@ BACK_WALL
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:91
TileCablingService::swid2drawer_gapscin_run2plus
int swid2drawer_gapscin_run2plus(int side, int module, int tower) const
Definition: TileCablingService.cxx:1631
Tile_Base_ID::pmt_hash_max
size_type pmt_hash_max(void) const
Definition: Tile_Base_ID.cxx:1318
TileCablingService::EB_special
bool EB_special(int ros, int drawer) const
Definition: TileCablingService.h:214
TileCablingService::m_EBAspec
int m_EBAspec
Definition: TileCablingService.h:205
TileHWID::adc_id
HWIdentifier adc_id(int ros, int drawer, int channel, int adc) const
adc HWIdentifer
Definition: TileHWID.cxx:228
Tile_Base_ID::SAMP_D
@ SAMP_D
Definition: Tile_Base_ID.h:55
TileCablingService::UpgradeABC
@ UpgradeABC
Definition: TileCablingService.h:94
DeMoScan.index
string index
Definition: DeMoScan.py:362
TileCablingService::C10_connected
static bool C10_connected(int module)
Definition: TileCablingService.cxx:1779
TileCablingService::isDisconnected
bool isDisconnected(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2461
TileCablingService::hwid2pmt
int hwid2pmt(int ros, int channel) const
Definition: TileCablingService.cxx:1799
TileCablingService::m_cablingType
TileCablingType m_cablingType
Definition: TileCablingService.h:228
TileCablingService::swid2channel_upgradeABC
int swid2channel_upgradeABC(int section, int side, int tower, int sample, int pmt) const
Definition: TileCablingService.cxx:1918
TileHWID::drawer
int drawer(const HWIdentifier &id) const
extract drawer field from HW identifier
Definition: TileHWID.h:171
TileCablingService::EB_special_move_channel
void EB_special_move_channel(int ros, int drawer, int &channel) const
Definition: TileCablingService.h:217
ReadFloatFromCool.adc
adc
Definition: ReadFloatFromCool.py:48
TileCablingService::EBC
@ EBC
Definition: TileCablingService.h:203
Tile_Base_ID::pmt_id
Identifier pmt_id(const Identifier &any_id) const
Definition: Tile_Base_ID.cxx:640
TileCablingService::getNChanPerCell
unsigned int getNChanPerCell(const Identifier &cell_id) const
Definition: TileCablingService.cxx:2385
python.CaloScaleNoiseConfig.type
type
Definition: CaloScaleNoiseConfig.py:78
TileCablingService::channel2hole
static int channel2hole(int ros, int channel)
Definition: TileCablingService.cxx:1946
TileCablingService::OldSim
@ OldSim
Definition: TileCablingService.h:85
TileCablingService::m_E2chan
int m_E2chan
Definition: TileCablingService.h:208
convertTimingResiduals.offset
offset
Definition: convertTimingResiduals.py:71
Tile_Base_ID::pmt_context
IdContext pmt_context(void) const
id for PMTs
Definition: Tile_Base_ID.cxx:1065
TileCablingService::m_ch2index
std::vector< int > m_ch2index
Definition: TileCablingService.h:241
ATLAS_NOT_THREAD_SAFE
TileCablingService *TileCablingService::getInstance_nc ATLAS_NOT_THREAD_SAFE()
Install fatal handler with default options.
Definition: TileCablingService.cxx:30
Trk::hole
@ hole
Definition: MeasurementType.h:36
TileCablingService::h2s_pmt_id
Identifier h2s_pmt_id(const HWIdentifier &id) const
Definition: TileCablingService.cxx:791
TileCablingService::isTileGapCrack
bool isTileGapCrack(int channel) const
Definition: TileCablingService.h:173
SH
This module provides a lot of global definitions, forward declarations and includes that are used by ...
Definition: PrunDriver.h:15
Tile_Base_ID::adc_hash_max
size_type adc_hash_max(void) const
Definition: Tile_Base_ID.cxx:1323
Tile_Base_ID::cell_hash
IdentifierHash cell_hash(const Identifier &cell_id) const
fast conversion from ID to hash for cells
Definition: Tile_Base_ID.cxx:1030
TileCablingService::frag2channels
int frag2channels(const HWIdentifier &id, std::vector< HWIdentifier > &ids) const
Definition: TileCablingService.cxx:1315
ATLAS_THREAD_SAFE
#define ATLAS_THREAD_SAFE
Definition: checker_macros.h:211
Tile_Base_ID::section
int section(const Identifier &id) const
Definition: Tile_Base_ID.cxx:147
TileCablingService::setRun2Merged
void setRun2Merged()
Definition: TileCablingService.cxx:82
TileCablingService::RUN2Cabling
@ RUN2Cabling
Definition: TileCablingService.h:89
IdentifierHash
Definition: IdentifierHash.h:38
section
void section(const std::string &sec)
Definition: TestTriggerMenuAccess.cxx:22
TBElementID::SH
@ SH
Definition: TBElementID.h:19
TileCablingService::MBTS2drawer_run2plus
int MBTS2drawer_run2plus(int side, int phi, int eta) const
Definition: TileCablingService.cxx:2360
Tile_Base_ID::cell_id
Identifier cell_id(const Identifier &any_id) const
Definition: Tile_Base_ID.cxx:581
TileCablingService::hwid2MBTSphi_real
int hwid2MBTSphi_real(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2105
CaloLVL1_ID::tower_id
Identifier tower_id(int pos_neg_z, int sampling, int region, int eta, int phi) const
build a tower identifier
Definition: CaloLVL1_ID.h:429
TileCablingService::LBA
@ LBA
Definition: TileCablingService.h:200
TileCablingService::swid2channel_gapscin
int swid2channel_gapscin(int side, int module, int tower) const
Definition: TileCablingService.cxx:1704
TileCablingService::cell2tt_id
Identifier cell2tt_id(const Identifier &id) const
Definition: TileCablingService.cxx:368
IdContext
class IdContext
Definition: IdContext.h:34
TileCablingService::swid2ros
int swid2ros(int section, int side) const
Definition: TileCablingService.cxx:1858
TileCablingService::E1_merged_with_run2plus
int E1_merged_with_run2plus(int ros, int module) const
Definition: TileCablingService.cxx:2457
TileCablingService::MBTS2drawer_real
int MBTS2drawer_real(int side, int phi, int eta) const
Definition: TileCablingService.cxx:2140
checkFileSG.ind
list ind
Definition: checkFileSG.py:118
TileCablingService::tbid2channel
static int tbid2channel(int drawer, int tbchannel)
Definition: TileCablingService.cxx:2060
TileCablingService::m_invalid_id
Identifier m_invalid_id
Definition: TileCablingService.h:176
TileCablingService::s2h_channel_id
HWIdentifier s2h_channel_id(const Identifier &id) const
Definition: TileCablingService.cxx:1076
Tile_Base_ID::SAMP_X
@ SAMP_X
Definition: Tile_Base_ID.h:55