ATLAS Offline Software
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TileCablingService.cxx
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1/*
2 Copyright (C) 2002-2025 CERN for the benefit of the ATLAS collaboration
3*/
4
7
8#include <string>
9#include <iostream>
10#include <algorithm>
11
12// Singleton method
13
14// Ideally we should just create this fully initialized and not expose
15// a non-const accessor. However, there's many pieces of code scattered
16// around that want to twiddle things here; getting rid of those would
17// entail a significant redesign. For now, separate const and non-const
18// access, and tag the non-const access as not thread-safe.
19namespace {
21}
22
23//------------------------------------------------------------
25{
26 return &cablingService;
27}
28
29//------------------------------------------------------------
30TileCablingService * TileCablingService::getInstance_nc ATLAS_NOT_THREAD_SAFE()
31{
32 return &cablingService;
33}
34
35// default constructor
36
37//-------------------------------------------------------------
39 : m_tileID(nullptr)
40 , m_tileHWID(nullptr)
41 , m_TT_ID(nullptr)
42 , m_tileTBID(nullptr)
44 , m_isCacheFilled(false)
46 , m_E1mergedRun2Plus(128, 0)
47 , m_run2(false)
48 , m_run2plus(false)
49 , m_run3(false)
50 , m_maxChannels(TileCalibUtils::MAX_CHAN)
51 , m_maxGains(TileCalibUtils::MAX_GAIN)
52{
53 m_testBeam = false;
54 // old cabling for simulation - no special EB modules, wrong numbers for E1-E4
55 m_EBAspec = -1;
56 m_EBCspec = -1;
57 m_E1chan = 13;
58 m_E2chan = 12;
59 m_E3chan = 1;
60 m_E4chan = 0;
61 m_E3special = 1; // no difference
62 m_E4special = 0; // with normal drawers
63 m_MBTSchan = 47;
64
65 int ros=0;
66 for ( ; ros<1; ++ros) { // no beam frags
67 for (int drawer=0; drawer<64; ++drawer) {
68 m_connected[ros][drawer] = false;
69 }
70 }
71 for ( ; ros<5; ++ros) { // all drawers connected
72 for (int drawer=0; drawer<64; ++drawer) {
73 m_connected[ros][drawer] = true;
74 }
75 }
76
79}
80
81void
83{
84 m_E1mergedRun2Plus.clear();
85 m_E1mergedRun2Plus.resize(128,0);
86
87 // Merged E1 and MBTS for run2
88 // EBA
89 m_E1mergedRun2Plus[6] = 7;
90 m_E1mergedRun2Plus[24] = 23;
91 m_E1mergedRun2Plus[43] = 42;
92 m_E1mergedRun2Plus[52] = 53;
93 // EBC
94 m_E1mergedRun2Plus[64+6] = 7;
95 m_E1mergedRun2Plus[64+24] = 23;
96 m_E1mergedRun2Plus[64+43] = 42;
97 m_E1mergedRun2Plus[64+52] = 53;
98 // additional E4' in EBC
99 m_E1mergedRun2Plus[64+27] = 28;
100 m_E1mergedRun2Plus[64+30] = 31;
101 m_E1mergedRun2Plus[64+34] = 33;
102 m_E1mergedRun2Plus[64+37] = 36;
103
104 m_MBTSmergedRun2Plus.clear();
105 m_MBTSmergedRun2Plus.resize(64,false);
106
107 m_MBTSmergedRun2Plus[7] = true;
108 m_MBTSmergedRun2Plus[23] = true;
109 m_MBTSmergedRun2Plus[42] = true;
110 m_MBTSmergedRun2Plus[53] = true;
111}
112
113void
115{
116 m_E1mergedRun2Plus.clear();
117 m_E1mergedRun2Plus.resize(128,0);
118 m_MBTSmergedRun2Plus.clear();
119 m_MBTSmergedRun2Plus.resize(64,false);
120
121 // Merged E1 and MBTS for run2
122 // EBA
123 m_E1mergedRun2Plus[6] = 7;
124 m_E1mergedRun2Plus[24] = 23;
125 m_E1mergedRun2Plus[43] = 42;
126 m_E1mergedRun2Plus[52] = 53;
127 // EBC
128 m_E1mergedRun2Plus[64+6] = 7;
129 m_E1mergedRun2Plus[64+24] = 23;
130 m_E1mergedRun2Plus[64+43] = 42;
131 m_E1mergedRun2Plus[64+52] = 53;
132 // additional E4' in EBC
133 m_E1mergedRun2Plus[64+27] = 28;
134 m_E1mergedRun2Plus[64+30] = 31;
135 m_E1mergedRun2Plus[64+34] = 33;
136 m_E1mergedRun2Plus[64+37] = 36;
137
138 // Additional merged E1 in 2018
139 // EBA
140 m_E1mergedRun2Plus[3] = 2;
141 m_E1mergedRun2Plus[20] = 19;
142 m_E1mergedRun2Plus[46] = 45;
143 m_E1mergedRun2Plus[59] = 58;
144 // EBC
145 m_E1mergedRun2Plus[64+3] = 2;
146 m_E1mergedRun2Plus[64+17] = 18;
147 m_E1mergedRun2Plus[64+46] = 45;
148 m_E1mergedRun2Plus[64+59] = 58;
149
150 // no merged MBTS in 2018
151 m_MBTSmergedRun2Plus.clear();
152 m_MBTSmergedRun2Plus.resize(64,false);
153}
154
155void
157{
158 m_E1mergedRun2Plus.clear();
159 m_E1mergedRun2Plus.resize(128, 0);
160 m_MBTSmergedRun2Plus.clear();
161 m_MBTSmergedRun2Plus.resize(64, false);
162
163 // Merged E1 and MBTS for run2
164 // EBA
165 m_E1mergedRun2Plus[6] = 7;
166 m_E1mergedRun2Plus[24] = 23;
167 m_E1mergedRun2Plus[43] = 42;
168 m_E1mergedRun2Plus[52] = 53;
169 // EBC
170 m_E1mergedRun2Plus[64 + 6] = 7;
171 m_E1mergedRun2Plus[64 + 24] = 23;
172 m_E1mergedRun2Plus[64 + 43] = 42;
173 m_E1mergedRun2Plus[64 + 52] = 53;
174
175 // Additional merged E1 since 2018
176 // EBA
177 m_E1mergedRun2Plus[3] = 2;
178 m_E1mergedRun2Plus[20] = 19;
179 m_E1mergedRun2Plus[46] = 45;
180 m_E1mergedRun2Plus[59] = 58;
181 // EBC
182 m_E1mergedRun2Plus[64 + 3] = 2;
183 m_E1mergedRun2Plus[64 + 17] = 18;
184 m_E1mergedRun2Plus[64 + 46] = 45;
185 m_E1mergedRun2Plus[64 + 59] = 58;
186
187 // no merged MBTS since 2018
188 m_MBTSmergedRun2Plus.clear();
189 m_MBTSmergedRun2Plus.resize(64, false);
190}
191
192// destructor
193
194//-------------------------------------------------------------
198
199void
201{
202 if (testBeam) // don't print anything for full ATLAS configuration
203 std::cout << "==> Setting testbeam flag to TRUE in TileCablingService " << std::endl;
204 m_testBeam = testBeam;
205 if (testBeam) {
207 int ros=0;
208 for ( ; ros<1; ++ros) {
209 int drawer=0;
210 for ( ; drawer<32; ++drawer) { // all 0x0? and 0x1? frags in beam crate
211 m_connected[ros][drawer] = true;
212 }
213 for ( ; drawer<64; ++drawer) {
214 m_connected[ros][drawer] = false;
215 }
216 }
217 for ( ; ros<5; ++ros) { // nothing connected - use setConnected() to declare connected drawers
218 for (int drawer=0; drawer<64; ++drawer) {
219 m_connected[ros][drawer] = false;
220 }
221 }
222 }
223}
224
225bool
227{
228// cabling type can be:
229// -1 for testbeam
230// 0 for MBTS in spare channels and wrong cabling for gap/crack (like in simulation before rel 14.2.10)
231// 1 new configuration without MBTS and correct gap/crack cells
232// 2 new configuration with MBTS instead of crack scintillators
233// 3 new configuration with MBTS in spare channels
235
236 m_maxGains = std::round(((double) m_tileID->adc_hash_max()) / m_tileID->pmt_hash_max());
237
239 // old cabling for simulation - no special EB modules, wrong numbers for E1-E4
240 m_EBAspec = -1;
241 m_EBCspec = -1;
242 m_E1chan = 13;
243 m_E2chan = 12;
244 m_E3chan = 1;
245 m_E4chan = 0;
246 m_E3special = 1; // no difference
247 m_E4special = 0; // with normal drawers
248 m_MBTSchan = 47;
250 setTestBeam(true);
251 } else {
252 // new correct cabling for E1-E4 cells
253 m_EBAspec = 14; // EBA15 - special
254 m_EBCspec = 17; // EBC18 - special
255 m_E1chan = 12;
256 m_E2chan = 13;
257 m_E3chan = 0;
258 m_E4chan = 1;
259 m_E3special = 18;
260 m_E4special = 19;
261
265
267 m_run2plus = (m_run2 || m_run3);
268
273 } else {
275 }
276
277 if (m_run2plus)
278 m_MBTSchan = -1; // should use function MBTS2channel_run2(int eta)
280 m_MBTSchan = 0;
281 else // Crack and MBTS in spare channel
282 m_MBTSchan = 47;
283
285
286 m_maxChannels = 240;
287 const int nBarrelAndExtendedChannels(m_maxChannels * 2);
288
289 m_ch2towerUpgradeABC.resize(nBarrelAndExtendedChannels, -1);
290 m_ch2sampleUpgradeABC.resize(nBarrelAndExtendedChannels, -1);
291 m_ch2pmtUpgradeABC.resize(nBarrelAndExtendedChannels, -1);
292
293
294 IdContext pmtContext = m_tileID->pmt_context();
295 unsigned int maxPmtHash = m_tileID->pmt_hash_max();
296
297 for (IdentifierHash pmtHash = 0; pmtHash < maxPmtHash; pmtHash += 1) {
298 Identifier swid;
299 if (m_tileID->get_id(pmtHash, swid, &pmtContext) == 0) {
300 int module = m_tileID->module(swid);
301 if (module == 0) { // Use module 0 to fill caches
302 int side = m_tileID->side(swid);
303 if (side == TileID::POSITIVE) { // Use only positive side to fill caches
304 int section = m_tileID->section(swid);
305 int tower = m_tileID->tower(swid);
306 int sample = m_tileID->sample(swid);
307 int pmt = m_tileID->pmt(swid);
308
309 if (tower == 41 || (tower > 42 && tower < 46)) continue; // Skip dummy towers
310
311 int channel = swid2channel_upgradeABC(section, TileID::POSITIVE, tower, sample, pmt);
312
313 if (channel >= 0 && (unsigned int) channel < m_ch2towerUpgradeABC.size()) {
314 if (section != TileID::BARREL) channel += m_maxChannels;
315 m_ch2towerUpgradeABC[channel] = tower;
316 m_ch2sampleUpgradeABC[channel] = sample;
317 m_ch2pmtUpgradeABC[channel] = pmt;
318 }
319
320 }
321 }
322 }
323 }
324
325 }
326
327 }
328 return true;
329}
330
331void
332TileCablingService::setConnected(int section, int side, int modMin, int modMax)
333{
334 if (modMax > modMin) {
335 std::cout << "TileCablingService: in section " << section << " side " << side
336 << " modules from " << modMin << " to " << modMax-1 << " are connected" << std::endl;
337 int ros=swid2ros(section,side);
338 for (int module=modMin; module<modMax; ++module) {
339 int drawer=swid2drawer(module);
340 m_connected[ros][drawer] = true;
341 }
342 } else {
343 std::cout << "TileCablingService: in section " << section << " side " << side
344 << " no modules connected " << std::endl;
345 }
346}
347
348void
349TileCablingService::setConnected(int ros, int draMin, int draMax)
350{
351 for (int drawer=draMin; drawer<draMax; ++drawer) {
352 m_connected[ros][drawer] = true;
353 }
354}
355
356//
357// Convert TileID to Trigger Tower ID
358//
359
362{
363 // take only first pmt - might be wrong for D-cells
364 return pmt2tt_id(m_tileID->pmt_id(id,0));
365}
366
369{
370 if (!id.is_valid()) return m_invalid_id;
371
372 int mineta[4] = { 0, 0, 9, 9 };
373 int maxeta[4] = { 0, 8, 14, 14 };
374
375 int section = m_tileID->section (id);
376 int side = m_tileID->side (id);
377 int module = m_tileID->module (id);
378 int tower = m_tileID->tower (id);
379 int sample = m_tileID->sample (id);
380 int pmt = m_tileID->pmt (id);
381
382 if (m_cablingType == UpgradeABC) {
383 tower /= 4;
384 if (sample == TileID::SAMP_X) sample = TileID::SAMP_BC;
385 }
386
387 int posneg = side; // -1 or +1
388 int sampling = 1; // Hadronic
389 int region = 0; // abs(eta)<2.5
390 int ieta = tower;
391 int iphi = module;
392
393 if (TileID::SAMP_E == sample) {
394 ieta = maxeta[section] + 1; // all gap scintillators are outside
395 // return m_invalid_id;
396 } else {
397 if (TileID::SAMP_D == sample) {
398 if ( 0 == ieta ) {
399 if (m_testBeam) {
400 if ( 0 == pmt ) { // testbeam - cell D0, first pmt is in another side;
401 if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
402 else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
403 }
404 } else {
405 if ( 1 == pmt ) { // cell D0, second pmt is in another side;
406 if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
407 else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
408 }
409 }
410 } else {
411 if ( ieta > 8 ) pmt = 1-pmt;
412 if ( TileID::NEGATIVE == side ) pmt = 1-pmt;
413 ieta -= pmt; // second pmt in D samling is in previous trigger tower
414 }
415 }
416
417 // merge several towers in one trigger tower at section boundaries
418 // A10 goes to the same tower as A9 and B9
419 // D4 goes to the same tower as C10 and D5(pmt=1)
420 // A16 goes to the same tower as A15 and B15
421 ieta = std::max(ieta,mineta[section]);
422 ieta = std::min(ieta,maxeta[section]);
423 }
424
425 Identifier tt_id = m_TT_ID->tower_id(posneg, sampling, region, ieta, iphi);
426
427 return tt_id;
428}
429
430//
431// Convert TileID to Muon Trigger Tower ID (valid only for D-cells)
432//
433
436{
437 // take only first pmt - might be wrong for D0 cell
438 return pmt2mt_id(m_tileID->pmt_id(id,0));
439}
440
443{
444// int section = m_tileID->section (id);
445 int side = m_tileID->side (id);
446 int module = m_tileID->module (id);
447 int tower = m_tileID->tower (id);
448 int sample = m_tileID->sample (id);
449 int pmt = m_tileID->pmt (id);
450
451 if (m_cablingType == UpgradeABC) {
452 tower /= 4;
453 if (sample == TileID::SAMP_X) sample = TileID::SAMP_BC;
454 }
455
456 if (TileID::SAMP_D == sample) {
457 int posneg = side; // -1 or +1
458 int sampling = 2; // muon signal from last sampling
459 int region = 0; // abs(eta)<2.5
460 int ieta = tower;
461 int iphi = module;
462
463 if ( 0 == ieta ) {
464 if (m_testBeam) {
465 if ( 0 == pmt ) { // testbeam - cell D0, first pmt is in another side;
466 if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
467 else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
468 }
469 } else {
470 if ( 1 == pmt ) { // cell D0, second pmt is in another side;
471 if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
472 else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
473 }
474 }
475 }
476
477 Identifier tt_id = m_TT_ID->tower_id(posneg, sampling, region, ieta, iphi) ;
478 return tt_id;
479
480 } else {
481
482 return m_invalid_id;
483 }
484}
485
486//
487// Build MBTS offline ID from drawer HWID
488// return invalid ID if there is no MBTS in a given drawer
489//
490
493{
494 int ros = m_tileHWID->ros (hwid);
495 int drawer = m_tileHWID->drawer (hwid);
496 int channel = m_MBTSchan;
497
499
500 return m_invalid_id;
501
502 } else if ( m_run2plus) {
503
504 if (hwid2MBTSconnected_run2plus(ros,drawer)) {
505
506 int side = hwid2side(ros,channel);
507 int phi = hwid2MBTSphi_run2plus(ros,drawer);
508 int eta = hwid2MBTSeta_run2plus(ros,drawer);
509
510 return m_tileTBID->channel_id(side, phi, eta);
511
512 } else {
513
514 return m_invalid_id;
515 }
516
517 } else if ( MBTSOnly == m_cablingType ) {
518
519 if (hwid2MBTSconnected_real(ros,drawer,channel)) {
520
521 int side = hwid2side(ros,channel);
522 int phi = hwid2MBTSphi_real(ros,drawer,channel);
523 int eta = hwid2MBTSeta_real(ros,drawer,channel);
524
525 return m_tileTBID->channel_id(side, phi, eta);
526
527 } else {
528
529 return m_invalid_id;
530 }
531
532 } else {
533
534 if (hwid2MBTSconnected(ros,drawer,channel)) {
535
536 int side = hwid2side(ros,channel);
537 int phi = hwid2MBTSphi(drawer,channel);
538 int eta = hwid2MBTSeta(drawer,channel);
539
540 return m_tileTBID->channel_id(side, phi, eta);
541
542 } else {
543
544 return m_invalid_id;
545 }
546 }
547}
548
549
550//
551// Convert TileHWID to TileID
552//
553
556{
557 int ros = m_tileHWID->ros (hwid);
558 int drawer = m_tileHWID->drawer (hwid);
559 int channel = m_tileHWID->channel (hwid);
560 if ( EB_special(ros,drawer) ) {
561 if ( D4(channel) ) return m_invalid_id;
562 EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
563 }
564
565 if ( TileHWID::BEAM_ROS == ros ) {
566
567 int tbtype = hwid2tbtype (drawer);
568 int tbmodule = hwid2tbmodule (drawer,channel);
569 int tbchannel = hwid2tbchannel (drawer,channel);
570
571 return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
572 }
573
574 int sample = (m_cablingType != UpgradeABC) ? hwid2sample(ros, channel)
575 : hwid2sample_upgradeABC(ros, channel);
576
577 if (sample < 0)
578 return m_invalid_id; // for any kind of cabling can't have negagive sample
579
580 if (m_run2plus) {
581
582 if ((ros > 2) && hwid2MBTSconnected_run2plus(ros,drawer,channel)) {
583 int side = hwid2side(ros,channel);
584 int phi = hwid2MBTSphi_run2plus(ros,drawer);
585 int eta = hwid2MBTSeta_run2plus(ros,drawer);
586 return m_tileTBID->channel_id(side, phi, eta);
587
588 } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
589 int side = hwid2side(ros,channel);
590 int phi = hwid2E4prphi_run2(drawer);
591 int eta = hwid2E4preta_run2(drawer);
592 return m_tileTBID->channel_id(side, phi, eta);
593
594 } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
595 return m_invalid_id;
596 }
597
598 } else if (m_cablingType == MBTSOnly) {
599
600 if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
601 int side = hwid2side(ros,channel);
602 int phi = hwid2MBTSphi_real(ros,drawer,channel);
603 int eta = hwid2MBTSeta_real(ros,drawer,channel);
604 return m_tileTBID->channel_id(side, phi, eta);
605
606 } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
607 return m_invalid_id;
608 }
609
610 } else {
611
612 if (sample == TileID::SAMP_X) { // MBTS
613
614 if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
615 if (hwid2MBTSconnected(ros,drawer,channel)) {
616
617 int side = hwid2side(ros,channel);
618 int phi = hwid2MBTSphi(drawer,channel);
619 int eta = hwid2MBTSeta(drawer,channel);
620
621 return m_tileTBID->channel_id(side, phi, eta);
622
623 } else
624 return m_invalid_id;
625 } else
626 return m_invalid_id;
627 }
628 }
629
630 int section = hwid2section (ros,channel);
631 int side = hwid2side (ros,channel);
632 int module = hwid2module (drawer);
633
634 int tower = (m_cablingType != UpgradeABC) ? hwid2tower(ros, channel)
635 : hwid2tower_upgradeABC(ros, channel);
636
637 if (m_cablingType == MBTSOnly) {
638 if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
639
640 int module = hwid2module_gapscin (ros, drawer, channel);
641 int tower = hwid2tower_gapscin (ros, drawer, channel);
642
643 if (tower == -1) {
644 return m_invalid_id;
645 } else
646 return m_tileID->cell_id(section, side, module, tower, sample);
647 }
648 }
649
650 return m_tileID->cell_id(section, side, module, tower, sample);
651}
652
654TileCablingService::h2s_cell_id_index_find ( int ros, int drawer, int channel, int & index, int & pmt ) const
655{
656 if ( EB_special(ros,drawer) ) {
657 if ( D4(channel) ) { index = pmt = -1; return m_invalid_id; }
658 EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
659 }
660
661 if ( TileHWID::BEAM_ROS == ros ) {
662
663 int tbtype = hwid2tbtype (drawer);
664 int tbmodule = hwid2tbmodule (drawer,channel);
665 int tbchannel = hwid2tbchannel (drawer,channel);
666 return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
667 }
668
669 int sample = (m_cablingType != UpgradeABC) ? hwid2sample(ros, channel)
670 : hwid2sample_upgradeABC(ros, channel);
671
672 if (sample < 0) {
673 index = pmt = -1;
674 return m_invalid_id; // for any kind of cabling can't have negagive sample
675 }
676
677 if (m_run2plus) {
678
679 if ((ros > 2) && hwid2MBTSconnected_run2plus(ros,drawer,channel)) {
680 int side = hwid2side(ros,channel);
681 int phi = hwid2MBTSphi_run2plus(ros,drawer);
682 int eta = hwid2MBTSeta_run2plus(ros,drawer);
683
684 pmt = 0;
685 index = -2;
686 return m_tileTBID->channel_id(side, phi, eta);
687
688 } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
689 int side = hwid2side(ros,channel);
690 int phi = hwid2E4prphi_run2(drawer);
691 int eta = hwid2E4preta_run2(drawer);
692
693 pmt = 0;
694 index = -3;
695 return m_tileTBID->channel_id(side, phi, eta);
696
697 } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
698 index = pmt = -1;
699 return m_invalid_id;
700 }
701
702 } else if (m_cablingType == MBTSOnly) {
703
704 if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
705 int side = hwid2side(ros,channel);
706 int phi = hwid2MBTSphi_real(ros,drawer,channel);
707 int eta = hwid2MBTSeta_real(ros,drawer,channel);
708
709 pmt = 0;
710 index = -2;
711 return m_tileTBID->channel_id(side, phi, eta);
712
713 } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
714 index = pmt = -1;
715 return m_invalid_id;
716 }
717
718 } else {
719
720 if (sample == TileID::SAMP_X) { // MBTS
721
722 if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
723 if (hwid2MBTSconnected(ros,drawer,channel)) {
724
725 int side = hwid2side(ros,channel);
726 int phi = hwid2MBTSphi(drawer,channel);
727 int eta = hwid2MBTSeta(drawer,channel);
728
729 pmt = 0;
730 index = -2;
731
732 return m_tileTBID->channel_id(side, phi, eta);
733
734 } else {
735 index = pmt = -1;
736 return m_invalid_id;
737 }
738 } else {
739 index = pmt = -1;
740 return m_invalid_id;
741 }
742 }
743 }
744
745 int section = hwid2section (ros,channel);
746 int side = hwid2side (ros,channel);
747 int module = hwid2module (drawer);
748
749 int tower(-1);
750
751 if (m_cablingType != UpgradeABC) {
752 tower = hwid2tower(ros, channel);
753 pmt = hwid2pmt(ros, channel);
754 } else {
755 tower = hwid2tower_upgradeABC(ros, channel);
756 pmt = hwid2pmt_upgradeABC(ros, channel);
757 }
758
759 Identifier cellid;
760
761 if (m_cablingType == MBTSOnly) {
762 if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
763
764 int module = hwid2module_gapscin (ros, drawer, channel);
765 int tower = hwid2tower_gapscin (ros, drawer, channel);
766
767 if (tower == -1) {
768 index = pmt = -1;
769 return m_invalid_id;
770 } else {
771 cellid = m_tileID->cell_id(section, side, module, tower, sample);
772 index = m_tileID->cell_hash(cellid);
773 return cellid;
774 }
775 }
776 }
777
778 cellid = m_tileID->cell_id(section, side, module, tower, sample);
779 index = m_tileID->cell_hash(cellid);
780 return cellid;
781}
782
785{
786 int ros = m_tileHWID->ros (hwid);
787 int drawer = m_tileHWID->drawer (hwid);
788 int channel = m_tileHWID->channel (hwid);
789 if ( EB_special(ros,drawer) ) {
790 if ( D4(channel) ) return m_invalid_id;
791 EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
792 }
793
794 if ( TileHWID::BEAM_ROS == ros ) {
795
796 int tbtype = hwid2tbtype (drawer);
797 int tbmodule = hwid2tbmodule (drawer,channel);
798 int tbchannel = hwid2tbchannel (drawer,channel);
799
800 return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
801 }
802
803 int sample = (m_cablingType != UpgradeABC) ? hwid2sample(ros, channel)
804 : hwid2sample_upgradeABC(ros, channel);
805
806 if (sample < 0)
807 return m_invalid_id; // for any kind of cabling can't have negagive sample
808
809 if (m_run2plus) {
810
811 if ((ros > 2) && hwid2MBTSconnected_run2plus(ros,drawer,channel)) {
812 int side = hwid2side(ros,channel);
813 int phi = hwid2MBTSphi_run2plus(ros,drawer);
814 int eta = hwid2MBTSeta_run2plus(ros,drawer);
815 return m_tileTBID->channel_id(side, phi, eta);
816
817 } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
818 int side = hwid2side(ros,channel);
819 int phi = hwid2E4prphi_run2(drawer);
820 int eta = hwid2E4preta_run2(drawer);
821 return m_tileTBID->channel_id(side, phi, eta);
822
823 } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
824 return m_invalid_id;
825 }
826
827 } else if (m_cablingType == MBTSOnly) {
828
829 if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
830 int side = hwid2side(ros,channel);
831 int phi = hwid2MBTSphi_real(ros,drawer,channel);
832 int eta = hwid2MBTSeta_real(ros,drawer,channel);
833 return m_tileTBID->channel_id(side, phi, eta);
834
835 } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
836 return m_invalid_id;
837 }
838
839 } else {
840
841 if (sample == TileID::SAMP_X) { // MBTS
842
843 if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
844 if (hwid2MBTSconnected(ros,drawer,channel)) {
845
846 int side = hwid2side(ros,channel);
847 int phi = hwid2MBTSphi(drawer,channel);
848 int eta = hwid2MBTSeta(drawer,channel);
849
850 return m_tileTBID->channel_id(side, phi, eta);
851
852 } else
853 return m_invalid_id;
854 } else
855 return m_invalid_id;
856 }
857 }
858
859 int section = hwid2section (ros,channel);
860 int side = hwid2side (ros,channel);
861 int module = hwid2module (drawer);
862
863 int tower(-1);
864 int pmt(-1);
865
866 if (m_cablingType != UpgradeABC) {
867 tower = hwid2tower(ros, channel);
868 pmt = hwid2pmt(ros, channel);
869 } else {
870 tower = hwid2tower_upgradeABC(ros, channel);
871 pmt = hwid2pmt_upgradeABC(ros, channel);
872 }
873
874 if (m_cablingType == MBTSOnly) {
875 if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
876
877 int module = hwid2module_gapscin (ros, drawer, channel);
878 int tower = hwid2tower_gapscin (ros, drawer, channel);
879
880 if (tower == -1) {
881 return m_invalid_id;
882 } else
883 return m_tileID->pmt_id(section, side, module, tower, sample, pmt);
884 }
885 }
886
887 return m_tileID->pmt_id(section, side, module, tower, sample, pmt);
888}
889
892{
893 int ros = m_tileHWID->ros (hwid);
894 int drawer = m_tileHWID->drawer (hwid);
895 int channel = m_tileHWID->channel (hwid);
896 if ( EB_special(ros,drawer) ) {
897 if ( D4(channel) ) return m_invalid_id;
898 EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
899 }
900
901 if ( TileHWID::BEAM_ROS == ros ) {
902
903 int tbtype = hwid2tbtype (drawer);
904 int tbmodule = hwid2tbmodule (drawer,channel);
905 int tbchannel = hwid2tbchannel (drawer,channel);
906
907 return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
908 }
909
910 int sample = (m_cablingType != UpgradeABC) ? hwid2sample(ros, channel)
911 : hwid2sample_upgradeABC(ros, channel);
912
913 if (sample < 0)
914 return m_invalid_id;
915
916 if (m_run2plus) {
917
918 if ((ros > 2) && hwid2MBTSconnected_run2plus(ros,drawer,channel)) {
919 int side = hwid2side(ros,channel);
920 int phi = hwid2MBTSphi_run2plus(ros,drawer);
921 int eta = hwid2MBTSeta_run2plus(ros,drawer);
922 return m_tileTBID->channel_id(side, phi, eta);
923
924 } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
925 int side = hwid2side(ros,channel);
926 int phi = hwid2E4prphi_run2(drawer);
927 int eta = hwid2E4preta_run2(drawer);
928 return m_tileTBID->channel_id(side, phi, eta);
929
930 } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
931 return m_invalid_id;
932 }
933
934 } else if (m_cablingType == MBTSOnly) {
935
936 if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
937 int side = hwid2side(ros,channel);
938 int phi = hwid2MBTSphi_real(ros,drawer,channel);
939 int eta = hwid2MBTSeta_real(ros,drawer,channel);
940 return m_tileTBID->channel_id(side, phi, eta);
941
942 } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
943 return m_invalid_id;
944 }
945
946 } else {
947
948 if (sample == TileID::SAMP_X) { // MBTS
949
950 if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
951 if (hwid2MBTSconnected(ros,drawer,channel)) {
952
953 int side = hwid2side(ros,channel);
954 int phi = hwid2MBTSphi(drawer,channel);
955 int eta = hwid2MBTSeta(drawer,channel);
956
957 return m_tileTBID->channel_id(side, phi, eta);
958
959 } else
960 return m_invalid_id;
961 } else
962 return m_invalid_id;
963 }
964 }
965
966 int section = hwid2section (ros,channel);
967 int side = hwid2side (ros,channel);
968 int module = hwid2module (drawer);
969 int adc = m_tileHWID->adc(hwid);
970
971 int tower(-1);
972 int pmt(-1);
973
974 if (m_cablingType != UpgradeABC) {
975 tower = hwid2tower(ros, channel);
976 pmt = hwid2pmt(ros, channel);
977 } else {
978 tower = hwid2tower_upgradeABC(ros, channel);
979 pmt = hwid2pmt_upgradeABC(ros, channel);
980 }
981
982
983 if (m_cablingType == MBTSOnly) {
984 if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
985
986 int module = hwid2module_gapscin (ros, drawer, channel);
987 int tower = hwid2tower_gapscin (ros, drawer, channel);
988
989 if (tower == -1) {
990 return m_invalid_id;
991 } else
992 return m_tileID->adc_id(section, side, module, tower, sample, pmt, adc);
993 }
994 }
995
996 return m_tileID->adc_id(section, side, module, tower, sample, pmt, adc);
997}
998
999//
1000// Convert TileID to TileHWID
1001//
1002
1005{
1006 int section = m_tileID->section (swid);
1007 int ros, drawer;
1008
1010
1011 int tbtype = m_tileTBID->type(swid);
1012 int tbmodule = m_tileTBID->module(swid);
1013 int tbchannel = m_tileTBID->channel(swid);
1014
1015 if (tbtype < 2) { // MBTS side +/- 1
1016
1017 ros = swid2ros(TileID::EXTBAR,tbtype);
1018
1019 if (m_run2plus) {
1020 drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1021 } else if (m_cablingType == MBTSOnly) {
1022 drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1023 } else {
1024 drawer = MBTS2drawer(tbmodule,tbchannel);
1025 }
1026
1027 return m_tileHWID->drawer_id(ros, drawer);
1028 }
1029
1030 drawer = tbid2drawer(tbtype,tbmodule);
1031
1032 return m_tileHWID->drawer_id(TileHWID::BEAM_ROS,drawer);
1033 }
1034
1035 int side = m_tileID->side (swid);
1036 int module = m_tileID->module (swid);
1037 int tower = m_tileID->tower (swid);
1038 int sample = m_tileID->sample (swid);
1039
1040 if (tower == 0 ) { // special case for D-0 cell
1041 int pmt = m_tileID->pmt (swid);
1042
1043 int channel = (m_cablingType != UpgradeABC)
1044 ? swid2channel(section,side,tower,sample,pmt)
1045 : swid2channel_upgradeABC (section,side,tower,sample,pmt);
1046
1047 // special case for D0 cell, 2 PMTs in different sides
1048 if (isChannelFromOppositeSide(channel)) {
1049 if ( TileID::NEGATIVE == side ) side = TileID::POSITIVE;
1050 else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1051 }
1052 }
1053
1054 ros = swid2ros (section,side);
1055
1056 if (sample == TileID::SAMP_E && (m_run2plus)) {
1057 drawer = swid2drawer_gapscin_run2plus(side, module,tower); // E1 might go to another module
1058 } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1059 drawer = swid2drawer_gapscin (side,module,tower);
1060 if (drawer < 0) drawer = module; // special trick for disconnected E3 and E4
1061 } else {
1062 drawer = swid2drawer (module);
1063 }
1064
1065 return m_tileHWID->drawer_id(ros, drawer);
1066}
1067
1070{
1071 int section = m_tileID->section (swid);
1072 int ros, drawer, channel;
1073
1075
1076 int tbtype = m_tileTBID->type(swid);
1077 int tbmodule = m_tileTBID->module(swid);
1078 int tbchannel = m_tileTBID->channel(swid);
1079
1080 if (tbtype < 2) { // MBTS side +/- 1
1081
1082 ros = swid2ros(TileID::EXTBAR,tbtype);
1083
1084 if (m_run2plus) {
1085 drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1086 return m_tileHWID->channel_id(ros, drawer, MBTS2channel_run2plus(tbchannel));
1087 } else if (m_cablingType == MBTSOnly) {
1088 drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1089 } else {
1090 drawer = MBTS2drawer(tbmodule,tbchannel);
1091 }
1092
1093 return m_tileHWID->channel_id(ros, drawer, m_MBTSchan);
1094 }
1095
1096 drawer = tbid2drawer(tbtype,tbmodule);
1097 channel = tbid2channel(drawer,tbchannel);
1098
1099 return m_tileHWID->channel_id(TileHWID::BEAM_ROS, drawer, channel);
1100 }
1101
1102 int side = m_tileID->side (swid);
1103 int module = m_tileID->module (swid);
1104 int tower = m_tileID->tower (swid);
1105 int sample = m_tileID->sample (swid);
1106 int pmt = m_tileID->pmt (swid);
1107
1108 if (sample == TileID::SAMP_E && (m_run2plus)) {
1109 drawer = swid2drawer_gapscin_run2plus (side, module,tower); // E1 might go to another module
1110
1111 channel = (m_cablingType != UpgradeABC)
1112 ? swid2channel(section,side,tower,sample,pmt)
1113 : swid2channel_upgradeABC (section,side,tower,sample,pmt);
1114
1115 } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1116 drawer = swid2drawer_gapscin (side,module,tower);
1117 channel = swid2channel_gapscin (side,module,tower);
1118 if (channel < 0) {
1119 drawer = module;
1120 channel = (tower<15) ? 45 : 46; // special trick : connect non-existing E3 and E4
1121 }
1122
1123 } else {
1124 drawer = swid2drawer (module);
1125
1126 channel = (m_cablingType != UpgradeABC)
1127 ? swid2channel(section,side,tower,sample,pmt)
1128 : swid2channel_upgradeABC (section,side,tower,sample,pmt);
1129 }
1130
1131 if (channel < 0)
1132 return m_invalid_hwid;
1133
1134 // special case for D0 cell, 2 PMTs in different sides
1135 if (isChannelFromOppositeSide(channel)) {
1136 if ( TileID::NEGATIVE == side ) side = TileID::POSITIVE;
1137 else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1138
1139 channel = (m_cablingType != UpgradeABC)
1140 ? swid2channel(section,side,tower,sample,pmt)
1141 : swid2channel_upgradeABC (section,side,tower,sample,pmt);
1142 }
1143
1144 ros = swid2ros (section,side);
1145 EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
1146
1147 return m_tileHWID->channel_id(ros, drawer, channel);
1148}
1149
1152{
1153 int section = m_tileID->section (swid);
1154 int ros, drawer, channel;
1155
1157
1158 int tbtype = m_tileTBID->type(swid);
1159 int tbmodule = m_tileTBID->module(swid);
1160 int tbchannel = m_tileTBID->channel(swid);
1161
1162 if (tbtype < 2) { // MBTS side +/- 1
1163
1164 ros = swid2ros(TileID::EXTBAR,tbtype);
1165
1166 if (m_run2plus) {
1167 drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1168 return m_tileHWID->adc_id(ros, drawer, MBTS2channel_run2plus(tbchannel), TileHWID::HIGHGAIN);
1169 } else if (m_cablingType == MBTSOnly) {
1170 drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1171 } else {
1172 drawer = MBTS2drawer(tbmodule,tbchannel);
1173 }
1174
1175 return m_tileHWID->adc_id(ros, drawer,m_MBTSchan,TileHWID::HIGHGAIN);
1176 }
1177
1178 drawer = tbid2drawer(tbtype,tbmodule);
1179 channel = tbid2channel(drawer,tbchannel);
1180
1181 return m_tileHWID->channel_id(TileHWID::BEAM_ROS, drawer, channel);
1182 }
1183
1184 int side = m_tileID->side (swid);
1185 int module = m_tileID->module (swid);
1186 int tower = m_tileID->tower (swid);
1187 int sample = m_tileID->sample (swid);
1188 int pmt = m_tileID->pmt (swid);
1189 int adc = m_tileID->adc (swid);
1190
1191 if (sample == TileID::SAMP_E && (m_run2plus)) {
1192 drawer = swid2drawer_gapscin_run2plus (side, module,tower); // E1 might go to another module
1193
1194 channel = ((m_cablingType != UpgradeABC) ? swid2channel(section,side,tower,sample,pmt)
1195 : swid2channel_upgradeABC(section,side,tower,sample,pmt));
1196
1197 } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1198 drawer = swid2drawer_gapscin (side,module,tower);
1199 channel = swid2channel_gapscin (side,module,tower);
1200 if (channel < 0) {
1201 drawer = module;
1202 channel = (tower<15) ? 45 : 46; // special trick : connect non-existing E3 and E4
1203 }
1204
1205 } else {
1206 drawer = swid2drawer (module);
1207
1208 channel = (m_cablingType != UpgradeABC) ? swid2channel(section,side,tower,sample,pmt)
1209 : swid2channel_upgradeABC (section,side,tower,sample,pmt);
1210 }
1211
1212 if (channel < 0)
1213 return m_invalid_hwid;
1214
1215 // special case for D0 cell, 2 PMTs in different sides
1216 if (isChannelFromOppositeSide(channel)) {
1217 if ( TileID::NEGATIVE == side ) side = TileID::POSITIVE;
1218 else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1219
1220 channel = (m_cablingType != UpgradeABC) ? swid2channel(section,side,tower,sample,pmt)
1221 : swid2channel_upgradeABC (section,side,tower,sample,pmt);
1222 }
1223
1224 ros = swid2ros(section,side);
1225 EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
1226
1227 return m_tileHWID->adc_id(ros, drawer, channel, adc);
1228}
1229
1230//
1231// find frag number for given ID
1232//
1233
1234int
1236{
1237 int section = m_tileID->section(swid);
1238 int ros, drawer;
1239
1241
1242 int tbtype = m_tileTBID->type(swid);
1243 int tbmodule = m_tileTBID->module(swid);
1244 int tbchannel = m_tileTBID->channel(swid);
1245
1246 if (tbtype < 2) { // MBTS side +/- 1
1247
1248 ros = swid2ros(TileID::EXTBAR,tbtype);
1249
1250 if (m_run2plus) {
1251 drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1252 } else if (m_cablingType == MBTSOnly) {
1253 drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1254 } else {
1255 drawer = MBTS2drawer(tbmodule,tbchannel);
1256 }
1257
1258 return m_tileHWID->frag(ros, drawer);
1259 }
1260
1261 drawer = tbid2drawer(tbtype,tbmodule);
1262
1263 return m_tileHWID->frag(TileHWID::BEAM_ROS,drawer);
1264 }
1265
1266 int side = m_tileID->side(swid);
1267 int module = m_tileID->module(swid);
1268 int tower = m_tileID->tower(swid);
1269 int sample = m_tileID->sample(swid);
1270
1271 if (tower == 0 ) { // special case for D-0 cell
1272 int pmt = m_tileID->pmt(swid);
1273
1274 int channel = (m_cablingType != UpgradeABC) ? swid2channel(section,side,tower,sample,pmt)
1275 : swid2channel_upgradeABC (section,side,tower,sample,pmt);
1276
1277 // special case for D0 cell, 2 PMTs in different sides
1278 if (isChannelFromOppositeSide(channel)) {
1279 if ( TileID::NEGATIVE == side ) side = TileID::POSITIVE;
1280 else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1281 }
1282 }
1283
1284 ros = swid2ros (section, side);
1285
1286 if (sample == TileID::SAMP_E && (m_run2plus)) {
1287 drawer = swid2drawer_gapscin_run2plus (side, module,tower); // E1 might go to another module
1288 } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1289 drawer = swid2drawer_gapscin(side,module,tower);
1290 if (drawer < 0) drawer = module; // special trick for disconnected E3 and E4
1291 } else {
1292 drawer = swid2drawer(module);
1293 }
1294
1295 return m_tileHWID->frag(ros, drawer);
1296}
1297
1298int
1300{
1301 int ros = m_tileHWID->ros (hwid);
1302 int drawer = m_tileHWID->drawer (hwid);
1303
1304 return m_tileHWID->frag(ros, drawer);
1305}
1306
1307int
1308TileCablingService::frag2channels ( const HWIdentifier & hwid, std::vector<HWIdentifier> & ids) const
1309{
1310 ids.clear();
1311 ids.reserve(m_maxChannels);
1312
1313 int channel = 0;
1314 for ( ; channel < m_maxChannels; ++channel) {
1315 ids.push_back(m_tileHWID->channel_id(hwid, channel));
1316 }
1317
1318 return channel;
1319}
1320
1321int
1322TileCablingService::frag2channels ( int frag, std::vector<HWIdentifier> & ids) const
1323{
1324 return frag2channels (m_tileHWID->drawer_id(frag),ids);
1325}
1326
1327//
1328// All static methods for mapping between TileID and TileHWID
1329//
1330
1331int
1332TileCablingService::hwid2section ( int ros, int channel )
1333{
1334 int section;
1335
1336 if (ros > 2) { // extended barrel ROS
1337
1338 // move cells D4, C10 and gap scin to gap section
1339 if (channel < 6 || channel == 12 || channel == 13)
1341 else
1343 }
1344 else {
1346 }
1347
1348 return section;
1349}
1350
1351int
1352TileCablingService::hwid2side ( int ros, int channel ) const
1353{
1354 int side;
1355
1356 if (channel == 0 && ( ros == LBA || ros == LBC)) { // put both PMTs of cell D0 in positive side
1357
1358 side = TileID::POSITIVE;
1359
1360 } else {
1361
1362 if ( ros & 1 ) { // odd crates are in positive side
1363 side = TileID::POSITIVE;
1364 } else {
1365 side = TileID::NEGATIVE;
1366 }
1367
1368 // at the testbeam "A" and "C" sides have opposite meaning
1369 if (m_testBeam) {
1370 if ( TileID::NEGATIVE == side ) side = TileID::POSITIVE;
1371 else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1372 }
1373 }
1374
1375 return side;
1376}
1377
1378int
1380{
1381 return drawer;
1382}
1383
1384int
1385TileCablingService::hwid2tower ( int ros, int channel ) const
1386{
1387 int twr[96] = {
1388 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2,
1389 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 5,
1390 4, 4, 5, 5, 5, 6, -1, -1, 6, 6, 6, 7,
1391 8, 8, 7, 7, 7, 6, 8, -1, 6, 9, 9, 8,
1392
1393 15, 13, 8, 8, 9, 9, 11, 11, 10, 10, 12, 12,
1394 11, 10, 11, 11, 10, 10, -1, -1, 13, 13, 12, 12,
1395 -1, -1, -1, -1, -1, -1, 13, 14, 14, -1, -1, 13,
1396 14, 12, 12, 14, 15, 15, -1, -1, -1, -1, -1, -1 };
1397
1398 if (ros > 2) {
1399 channel += 48; // extended barrel
1400 twr[48+m_E1chan] = 10; // old and new simulation has different numbers here
1401 twr[48+m_E2chan] = 11;
1402 twr[48+m_E3chan] = 13;
1403 twr[48+m_E4chan] = 15;
1404 }
1405 int tower = twr[channel];
1406
1407 return tower;
1408}
1409
1410int
1411TileCablingService::hwid2tower_upgradeABC( int ros, int channel ) const {
1412
1413 if (channel >= 0) {
1414 if (ros > 2) channel += m_maxChannels; // extended barrel
1415
1416 if ((unsigned int) channel < m_ch2towerUpgradeABC.size()) {
1417 return m_ch2towerUpgradeABC[channel];
1418 }
1419 }
1420
1421 return -1;
1422}
1423
1424
1425int
1426TileCablingService::hwid2sample ( int ros, int channel )
1427{
1428 int smp[96] = {
1429 2, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 1,
1430 1, 2, 2, 0, 1, 1, 0, 0, 0, 1, 1, 0,
1431 2, 2, 0, 1, 1, 0, -1, -1, 0, 1, 1, 0,
1432 0, 0, 0, 1, 1, 2, 1, -1, 2, 0, 0, 1,
1433
1434 3, 3, 2, 2, 1, 1, 0, 0, 1, 1, 0, 0,
1435 3, 3, 1, 1, 2, 2, -1, -1, 0, 0, 1, 1,
1436 -1, -1, -1, -1, -1, -1, 1, 0, 0, -1, -1, 1,
1437 1, 2, 2, 1, 0, 0, -1, -1, -1, -1, -1, 4 }; // last one is MBTS
1438
1439 if (ros > 2) channel += 48; // extended barrel
1440 int sample = smp[channel];
1441
1442 return sample;
1443}
1444
1445int
1447
1448 if (channel >= 0) {
1449 if (ros > 2) channel += m_maxChannels; // extended barrel
1450
1451 if ((unsigned int) channel < m_ch2towerUpgradeABC.size()) {
1452 return m_ch2sampleUpgradeABC[channel];
1453 }
1454 }
1455
1456 return -1;
1457}
1458
1459
1460void
1462{
1463 // mapping from module (offline id) to drawer (onile id)
1464 // for gap and crack scintillators E1-E4
1465 // 0 - means "no shift", drawer = module
1466 // +/-1 - shift by one module: drawer = module +/- 1
1467 // NC - not connected
1468 // note: module number in offline identifer is in range 0-63
1469 // and in most of the cases is equal to drawer number
1470 const int NC = 65;
1471 // PB - possibly broken E3, but for the moment assume that this channel is still alive
1472 const int PB = 0;
1473
1474 int tmp_drawer[512] = {
1475 //Part EBA
1476 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1477 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1478 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,PB, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0,
1479 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0,
1480 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1481 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1482 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1483 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1484
1485 //Part EBC
1486 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1487 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1488 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1489 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1490 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1491 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1492 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0,
1493 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0
1494 };
1495
1496 // mapping from module (offline id) to channel (onile id)
1497 // for gap and crack scintillators E1-E4
1498 // 0 - means "no shift", i.e. E1 in channel 12 E2 in channel 13, E3 in channel 0, E4 in channel 1
1499 // SH - shift by one channel for E3, i.e. E3 is in channel 1 instead of channel 0
1500 // NC - not connected
1501 const int SH = 1;
1502 int tmp_channel[512] = {
1503 //Part EBA
1504 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1505 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1506 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,PB, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0,
1507 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0,
1508 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1509 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1510 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1511 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1512
1513 //Part EBC
1514 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1515 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1516 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1517 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1518 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1519 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1520 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0,
1521 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0
1522 };
1523
1524 //Now in tables like m_[drawer]_table are not shifts - there are real numbers of [drawers]
1525 for (int i = 0; i < 512; i++) {
1526 if (tmp_drawer[i] != NC) {
1527 m_drawer_table[i] = ((i%256)/4) + tmp_drawer[i];
1528 int channel_number;
1529 switch (i%4) {
1530 case 0: case 1: channel_number = i%4 + 12; break;
1531 default: channel_number = i%4 - 2;
1532 }
1533 m_channel_table[i] = channel_number + tmp_channel[i];
1534 } else
1535 m_drawer_table[i] = m_channel_table[i] = -1;
1536 }
1537
1538
1539 //Printing for test
1540 /*
1541 std::cout << " drawer table " << std::endl;
1542
1543 for (int i = 0; i < 128; ++i) {
1544 for (int j = 0; j < 4; j++) {
1545 std::cout << m_drawer_table[i<<2|j] << " ";
1546 }
1547 std::cout << std::endl;
1548 }
1549
1550 std::cout << " channel table " << std::endl;
1551
1552 for (int i = 0; i < 128; ++i) {
1553 for (int j = 0; j < 4; j++) {
1554 std::cout << m_channel_table[i<<2|j] << " ";
1555 }
1556 std::cout << std::endl;
1557 }
1558 */
1559
1560
1561 for (int i = 0; i < 512; i++) m_module_table[i] = m_tower_table[i] = -1;
1562
1563 for (int side = 0; side < 2; side++) {
1564 for (int module_count = 0; module_count < 64; module_count++ ) {
1565 for (int tower_count = 0; tower_count < 4; tower_count++) {
1566 int drawer_number = m_drawer_table[(side<<8)|(module_count<<2)|(tower_count)];
1567 int channel_number = m_channel_table[(side<<8)|(module_count<<2)|(tower_count)];
1568
1569 //Here I have drawer number and channel number
1570 if ((channel_number == 12)||(channel_number == 13)||(channel_number == 0)||(channel_number == 1)){
1571 int tower_number;
1572 switch (tower_count) {
1573 case 2: tower_number = 13; break;
1574 case 3: tower_number = 15; break;
1575 default: tower_number = tower_count + 10;
1576 }
1577 int channel_count;
1578 switch (channel_number) {
1579 case 12: case 13: channel_count = channel_number - 12; break;
1580 default: channel_count = channel_number + 2;
1581 }
1582 //Here I have coordinates in table of drawer and channel
1583 int index = (side<<8)|(drawer_number<<2)|(channel_count);
1584 m_module_table[index] = module_count;
1585 m_tower_table[index] = tower_number;
1586
1587/* std::cout << "m_module_table[(side<<8)|(drawer_number<<2)|(channel_count)] " << m_module_table[index] <<
1588 " m_tower_table[(side<<8)|(drawer_number<<2)|(channel_count)] " << m_tower_table[index] <<
1589 " index " << index << std::endl;
1590*/
1591 //std::cout << "module_count " << module_count << " tower_number " << tower_number << " : side " << side << " tower_count " << tower_count << std::endl;
1592 }
1593 }
1594 }
1595 }
1596/*
1597 //Printing for test
1598 std::cout << " module table " << std::endl;
1599 for (int i = 0; i < 128; ++i) {
1600 for (int j = 0; j < 4; j++) {
1601 std::cout << m_module_table[i<<2|j] << " ";
1602 }
1603 std::cout << std::endl;
1604 }
1605
1606 std::cout << " tower table " << std::endl;
1607 for (int i = 0; i < 128; ++i) {
1608 for (int j = 0; j < 4; j++) {
1609 std::cout << m_tower_table[i<<2|j] << " ";
1610 }
1611 std::cout << std::endl;
1612 }
1613*/
1614}
1615
1616// Layout of gap/crack scintillators:
1617//
1618// E1: cell = 0, tower = 10, channel = 12
1619// E2: cell = 1, tower = 11, channel = 13
1620// E3: cell = 2, tower = 13, channel = 0
1621// E4: cell = 3, tower = 15, channel = 1
1622
1623int
1624TileCablingService::swid2drawer_gapscin_run2plus (int side, int module, int tower) const
1625{
1626 // merged E1 cells in EBA and EBC
1627 // module 07,08 -> 07 (i.e. drawer 07 to drawer 06) --
1628 // module 24,25 -> 25 (i.e. drawer 23 to drawer 24) ++
1629 // module 43,44 -> 44 (i.e. drawer 42 to drawer 43) ++
1630 // module 53,54 -> 53 (i.e. drawer 53 to drawer 52) --
1631 //
1632 // merged cells in EBC only
1633 // module 28,29 -> 28 (i.e. drawer 28 to drawer 27) --
1634 // module 31,32 -> 31 (i.e. drawer 31 to drawer 30) --
1635 // module 34,35 -> 35 (i.e. drawer 33 to drawer 34) ++
1636 // module 37,38 -> 38 (i.e. drawer 36 to drawer 37) ++
1637
1638 // additional merged E1 cells in 2018
1639
1640 // both EBA and EBC
1641 // module 03,04 -> 04 (i.e. drawer 02 to drawer 03) ++
1642 // module 46,47 -> 47 (i.e. drawer 45 to drawer 46) ++
1643 // module 59,60 -> 60 (i.e. drawer 58 to drawer 59) ++
1644
1645 // EBA only
1646 // module 20,21 -> 21 (i.e. drawer 19 to drawer 20) ++
1647
1648 // EBC only
1649 // module 18,19 -> 18 (i.e. drawer 18 to drawer 17) --
1650
1651 int drawer = module;
1652
1653 const int towerE1 = (m_cablingType != UpgradeABC) ? 10 : 42;
1654
1655 if (tower == towerE1) {
1656 if (drawer == 7 || drawer == 53) --drawer;
1657 else if (drawer == 42 || drawer == 23) ++drawer;
1658 else if (m_run2 && side < 0) {
1659 if (drawer == 28 || drawer == 31) --drawer;
1660 else if (drawer == 33 || drawer == 36) ++drawer;
1661 }
1662
1665 if (drawer == 2 || drawer == 45 || drawer == 58 ) ++drawer;
1666 else {
1667 if (side > 0) {
1668 if (drawer == 19 ) ++drawer;
1669 } else {
1670 if (drawer == 18 ) --drawer;
1671 }
1672 }
1673 }
1674 }
1675
1676 return drawer;
1677}
1678
1679
1680
1681int
1682TileCablingService::swid2drawer_gapscin (int side, int module, int tower) const
1683{
1684 side = (side == TileID::POSITIVE) ? 0 : 1;
1685 int cell;
1686 switch (tower){
1687 case 15: cell=3; break;
1688 case 13: cell=2; break;
1689 case 11: cell=1; break;
1690 default: cell=0;
1691 }
1692 int p = (side<<8)|(module<<2)|cell;
1693 return m_drawer_table[p];
1694}
1695
1696int
1697TileCablingService::swid2channel_gapscin (int side, int module, int tower) const
1698{
1699 side = (side == TileID::POSITIVE) ? 0 : 1;
1700 int cell;
1701 switch (tower){
1702 case 15: cell=3; break;
1703 case 13: cell=2; break;
1704 case 11: cell=1; break;
1705 default: cell=0;
1706 }
1707 int p = (side<<8)|(module<<2)|cell;
1708 return m_channel_table[p];
1709}
1710
1711int
1712TileCablingService::hwid2module_gapscin (int ros, int drawer, int channel) const
1713{
1714 int side = (ros < 4) ? 0 : 1; // set side to 1 for ROS=4 which is EBC (negative side)
1715 int cell;
1716 switch (channel) {
1717 case 1: cell=3; break;
1718 case 0: cell=2; break;
1719 case 13: cell=1; break;
1720 default: cell=0;
1721 }
1722 int p = (side<<8)|(drawer<<2)|cell;
1723 return m_module_table[p];
1724}
1725
1726int
1727TileCablingService::hwid2tower_gapscin (int ros, int drawer, int channel) const
1728{
1729 int side = (ros < 4) ? 0 : 1; // set side to 1 for ROS=4 which is EBC (negative side)
1730 int cell;
1731 switch (channel) {
1732 case 1: cell=3; break;
1733 case 0: cell=2; break;
1734 case 13: cell=1; break;
1735 default: cell=0;
1736 }
1737 int p = (side<<8)|(drawer<<2)|cell;
1738 return m_tower_table[p];
1739}
1740
1741//
1742// This method tells us which ITC cells and gap/crack scintillators
1743// are really connected
1744//
1745// It returns false for 36 disconnected crack scintillators, for 2 non-existing D4
1746// and for 16 special C10 (where 1 out of 2 channels is disconnected)
1747//
1748bool
1750{
1751 if (m_tileID->is_tile_gap(id)) { // ITC of gap/crack scin
1752 switch (m_tileID->sample(id)) {
1753
1754 case TileID::SAMP_C: // cell C10
1755 return C10_connected(m_tileID->module(id));
1756
1757 case TileID::SAMP_D: // cell D4 - return false for EBA15 and EBC18
1758 return !(EB_special(((m_tileID->side(id)>0)?EBA:EBC),m_tileID->module(id)));
1759
1760 case TileID::SAMP_E: // E1-E4 - gap/crack scin
1761 return (m_run2plus || swid2channel_gapscin(m_tileID->side(id),
1762 m_tileID->module(id),
1763 m_tileID->tower(id)) != -1);
1764 default:
1765 return false; // other samples do not exist
1766 }
1767 }
1768 return true; // true for all normal cells in barrel and extended barrel
1769}
1770
1771bool
1773{
1774 const bool C = true;
1775 const bool NC = false;
1776
1777 bool cell_present[64] = { // counting from 1 in comments
1778 C, C, C, C, C, C, C, C, // 1-8
1779 C, C, C, C, C, C, C, C, // 9-16
1780 C, C, C, C, C, C, C, C, // 17-24
1781 C, C, C, C, C, C, C, C, // 25-32
1782 C, C, C, C, C, C,NC,NC, // 33-40 39-40 do not exist
1783 NC,NC, C, C, C, C, C, C, // 41-48 41-42 do not exist
1784 C, C, C, C, C, C,NC,NC, // 49-56 55-56 do not exist
1785 NC,NC, C, C, C, C, C, C // 57-64 57-58 do not exist
1786 };
1787
1788 return cell_present[module];
1789}
1790
1791int
1792TileCablingService::hwid2pmt ( int ros, int channel ) const
1793{
1794 int pm[96] = {
1795 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
1796 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
1797 0, 1, 0, 1, 0, 1, -1, -1, 0, 1, 0, 1,
1798 0, 1, 0, 1, 0, 1, 0, -1, 0, 1, 0, 1,
1799
1800 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
1801 0, 0, 0, 1, 0, 1, -1, -1, 0, 1, 0, 1,
1802 -1, -1, -1, -1, -1, -1, 0, 0, 1, -1, -1, 1,
1803 1, 1, 0, 0, 1, 0, -1, -1, -1, -1, -1, -1 };
1804
1805 int pmt;
1806
1807 // in gap scintillators there is only one pmt per cell
1808 if ( ros > 2 && (channel == m_E1chan || channel == m_E2chan || channel == m_E3chan || channel == m_E4chan) ) {
1809 pmt = 0;
1810
1811 } else {
1812
1813 if (ros > 2) channel += 48; // extended barrel
1814
1815 pmt = pm[channel];
1816
1817 // mirroring of odd/even numbers in negative side
1818 // (central symmetry of neg/pos drawers)
1819 if ( (pmt != -1 && TileID::NEGATIVE == hwid2side(ros,channel)) || ((channel==0 && ros==((m_testBeam)?LBA:LBC))))
1820 pmt = 1 - pmt;
1821 }
1822
1823 return pmt;
1824}
1825
1826int
1827TileCablingService::hwid2pmt_upgradeABC(int ros, int channel ) const {
1828
1829 int pmt(-1);
1830
1831 if (channel >= 0) {
1832 if (ros > 2) channel += m_maxChannels; // extended barrel
1833
1834 if ((unsigned int) channel < m_ch2pmtUpgradeABC.size()) {
1835 pmt = m_ch2pmtUpgradeABC[channel];
1836
1837 // mirroring of odd/even numbers in negative side
1838 if ((pmt >= 0 && hwid2side(ros, channel) == TileID::NEGATIVE
1840 || (channel == 0 && ros == LBC)) {
1841 pmt = 1 - pmt;
1842 }
1843 }
1844 }
1845
1846 return pmt;
1847}
1848
1849
1850int
1852{
1853 // odd crates are in positive side
1854 int ros = ( TileID::POSITIVE == side ) ? 1 : 2;
1855
1856 // at the testbeam "A" and "C" sides have opposite meaning
1857 if (m_testBeam)
1858 // even crates are in positive side
1859 ros = ( TileID::POSITIVE == side ) ? 2 : 1;
1860
1861 // another crate for extended barrel and gap section
1862 if ( TileID::BARREL != section ) ros += 2;
1863
1864 return ros;
1865}
1866
1867int
1869{
1870 return module;
1871}
1872
1873int
1874TileCablingService::swid2channel( int section, int side, int tower, int sample, int pmt) const
1875{
1876 // 3 samplings * 2 pmt * 16 towers in barrel and ext barrel ITC
1877 // and 2 pmt * 16 towers for scintillators from gap section (samp=3)
1878 // pmt=m_maxChannels for D0/down means that this pmt belongs to another drawer
1879 // this exeption should be treated correctly in calling routine
1880
1881 int cell[128] = {
1882 //-------------barrel--------------// //-extended barrel-//
1883 4, 8, 10, 18, 20, 26, 32, 38, 36, 46, -1, 6, 10, 20, 31, 41, // sampling A
1884 1, 5, 9, 15, 19, 23, 29, 35, 37, 45, -1, 7, 11, 21, 32, 40, // sampling A
1885
1886 //-----------barrel------------// ITC //-extended barrel-//
1887 2, 6, 12, 16, 22, 28, 34, 40, 42, 4, 8, 14, 22, 30, 39, -1, // sampling BC
1888 3, 7, 11, 17, 21, 27, 33, 39, 47, 5, 9, 15, 23, 35, 36, -1, // sampling BC
1889
1890 //-------barrel--------// ITC /extended barrel/
1891 0, -1, 14, -1, 24, -1, 44, -1, 2, -1, 16, -1, 38, -1, -1, -1, // sampling D
1892 m_maxChannels, -1, 13, -1, 25, -1, 41, -1, 3, -1, 17, -1, 37, -1, -1, -1, // sampling D
1893
1894 //-----gap scin-----//
1895 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, m_E1chan, m_E2chan, -1, m_E3chan, -1, m_E4chan, // gap scin
1896 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 };// pmt=1 doesn't exist
1897
1898 // preserve pmt number for gap scintillators (only pmt=0 exists)
1899 if ( sample != TileID::SAMP_E || section != TileID::GAPDET ) {
1900
1901 // mirroring of odd/even numbers in negative side
1902 if (TileID::NEGATIVE == side) pmt = 1 - pmt;
1903 }
1904
1905 int channel = cell[(sample << 5) | (pmt << 4) | tower];
1906
1907 return channel;
1908}
1909
1910int
1911TileCablingService::swid2channel_upgradeABC( int section, int side, int tower, int sample, int pmt) const
1912{
1913
1914 int channel(-1);
1915
1916 if (sample == TileID::SAMP_A) {
1917 int offset = (48 * (1 + (tower % 4)));
1918 channel = offset + swid2channel( section, side, tower / 4, TileID::SAMP_A, pmt);
1919 } else if (sample == TileID::SAMP_B) {
1920 if (((tower - 2) % 4) == 0) {
1921 int offset = (section == TileID::BARREL) ? 48 : 0;
1922 channel = offset + swid2channel( section, side, (tower - 2) / 4, TileID::SAMP_B, pmt);
1923 }
1924 } else if (sample == TileID::SAMP_D) {
1925 if ((tower % 8) == 0)
1926 channel = swid2channel( section, side, tower / 4, TileID::SAMP_D, pmt);
1927 } else if (sample == TileID::SAMP_X) { // sample C in upgrade
1928 if (((tower - 2) % 4) == 0)
1929 channel = 96 + swid2channel( section, side, (tower - 2) / 4, TileID::SAMP_BC, pmt);
1930 } else {
1931 channel = swid2channel( section, side, tower / 4, sample, pmt);
1932 }
1933
1934 return channel;
1935}
1936
1937
1938int
1940{
1941 // negative means not connected !
1942
1943 int pos[96] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
1944 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
1945 27, 26, 25, 30, 29, 28,-33,-32, 31, 36, 35, 34,
1946 39, 38, 37, 42, 41, 40, 45,-44, 43, 48, 47, 46,
1947
1948 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
1949 13, 14, 15, 16, 17, 18,-19,-20, 21, 22, 23, 24,
1950 -27,-26,-25,-31,-32,-28, 33, 29, 30,-36,-35, 34,
1951 44, 38, 37, 43, 42, 41,-45,-39,-40,-48,-47,-46 };
1952
1953 if (ros > 2) channel += 48; // extended barrel
1954 int hole = pos[channel];
1955 // FIXME:: need to do something for special modules EBA15 and EBC18
1956 // the hole numbers -18 and -19 are not expected numbers for gap scin
1957 return hole;
1958}
1959
1960int
1962{
1963 // negative means not connected !
1964
1965 int ind[96] = {
1966 0, 1, 2, 2, 1, 3, 4, 4, 3, 5, 5, 6,
1967 6, 7, 7, 8, 9, 9, 8, 10, 10, 11, 11, 12,
1968 13, 13, 12, 14, 14, 15, -1, -1, 15, 16, 16, 17,
1969 18, 18, 17, 19, 19, 20, 21, -1, 20, 22, 22, 21,
1970
1971 1, 2, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
1972 3, 4, 10, 10, 11, 11, -1, -1, 12, 12, 13, 13,
1973 -1, -1, -1, -1, -1, -1, 14, 15, 15, -1, -1, 14,
1974 16, 17, 17, 16, 18, 18, -1, -1, -1, -1, -1, -1
1975 };
1976
1977 if (ros > 2) channel += 48; // extended barrel
1978 int index = ind[channel];
1979
1980 return index;
1981}
1982//label
1983//
1984// create cabling for very few ancillary detectors at the testbeam
1985// complete mapping will be loaded from database
1986//
1987
1988int
1990{
1991 // input: drawer
1992 //
1993 // #define BEAM_TDC_FRAG 0x000
1994 // #define BEAM_ADC_FRAG 0x001
1995 // #define MUON_ADC_FRAG 0x002
1996 // #define ADDR_ADC_FRAG 0x003
1997 // #define LASE_PTN_FRAG 0x004
1998 // #define LASE_ADC_FRAG 0x005
1999 // #define ADD_FADC_FRAG 0x006
2000 // #define ECAL_ADC_FRAG 0x007
2001 //
2002 static const int tbtype[8] = {
2011 };
2012
2013 if (drawer<8) return tbtype[drawer];
2014 else return TileTBID::INT_TYPE;
2015}
2016
2017int
2018TileCablingService::hwid2tbmodule ( int drawer, int /* channel */ )
2019{
2020 static const int tbmodule[8] = {
2021 0,
2024 0,
2025 0,
2026 0,
2027 0,
2029 };
2030
2031 if (drawer<8) return tbmodule[drawer];
2032 else return 0;
2033}
2034
2035int
2036TileCablingService::hwid2tbchannel ( int /* drawer */, int channel )
2037{
2038 return channel;
2039}
2040
2041int
2042TileCablingService::tbid2drawer ( int /* tbtype */, int tbmodule )
2043{
2044 switch (tbmodule) {
2045 case TileTBID::CRACK_WALL: return 1;
2046 case TileTBID::BACK_WALL: return 2;
2047 case TileTBID::PHANTOM_CALO: return 7;
2048 default: return 0xFF;
2049 }
2050}
2051
2052int
2053TileCablingService::tbid2channel ( int /* drawer */, int tbchannel )
2054{
2055 return tbchannel;
2056}
2057
2058//
2059// Next 6 methods provide FAKE cabling for MBTS
2060// MBTS is connected to last (47) channel in every 4th drawer
2061// used in simulation only
2062//
2063bool
2064TileCablingService::hwid2MBTSconnected(int ros, int drawer, int channel) const
2065{
2066 return ((ros > 2) && (channel == 47) && (drawer%4 == 0)); // fake cabling, last channel in every 4th drawer
2067}
2068
2069int
2070TileCablingService::hwid2MBTSphi(int drawer, int /* channel */) const
2071{
2072 return (drawer/8);
2073}
2074
2075int
2076TileCablingService::hwid2MBTSeta(int drawer, int /* channel */) const
2077{
2078 return ((drawer%8)/4);
2079}
2080
2081int
2083{
2084 return (phi*8 + eta*4); // fake cabling, every 4th drawer
2085}
2086
2087//
2088// Next 4 methods provide REAL cabling for MBTS
2089// used for reconstruction of real data
2090//
2091bool
2092TileCablingService::hwid2MBTSconnected_real(int ros, int drawer, int channel) const
2093{
2094 return ((ros > 2) && (channel == 0) && hwid2MBTSeta_real(ros,drawer,channel) != -1);
2095}
2096
2097int
2098TileCablingService::hwid2MBTSphi_real(int /* ros */, int drawer, int /* channel */) const
2099{
2100 return (drawer/8); // correct formula even for real MBTS (see MBTS2drawer_real below)
2101}
2102
2103int
2104TileCablingService::hwid2MBTSeta_real(int ros, int drawer, int /* channel */) const
2105{
2106 int eta[128] = {
2107 // EBA
2108 -1, -1, 1, 0, -1, -1, -1, -1,
2109 -1, -1, -1, 1, 0, -1, -1, -1,
2110 -1, -1, -1, -1, -1, -1, 1, 0,
2111 -1, -1, -1, -1, -1, 1, 0, -1,
2112 -1, -1, 1, 0, -1, -1, -1, -1,
2113 -1, -1, -1, 0, 1, -1, -1, -1,
2114 -1, -1, -1, -1, 0, 1, -1, -1,
2115 -1, -1, -1, 1, 0, -1, -1, -1,
2116 // EBC
2117 -1, -1, -1, 1, 0, -1, -1, -1,
2118 -1, -1, -1, 1, 0, -1, -1, -1,
2119 -1, -1, 1, 0, -1, -1, -1, -1,
2120 -1, -1, 1, 0, -1, -1, -1, -1,
2121 -1, -1, -1, 1, 0, -1, -1, -1,
2122 -1, -1, -1, 1, 0, -1, -1, -1,
2123 -1, -1, -1, -1, -1, 1, 0, -1,
2124 -1, -1, -1, -1, 1, 0, -1, -1
2125 };
2126 // no protection against wrong numbers
2127 // assume that ROS can be only 3 or 4
2128 if (ros == EBC) drawer += 64; // negative extended barrel, ROS=4
2129 return eta[drawer];
2130}
2131
2132int
2134{
2135 int drawer[32] = {
2136 //part EBA
2137 3, 12, 23, 30, 35, 43, 52, 60, //E6
2138 2, 11, 22, 29, 34, 44, 53, 59, //E5
2139 //part EBC
2140 4, 12, 19, 27, 36, 44, 54, 61, //E6
2141 3, 11, 18, 26, 35, 43, 53, 60 };//E5
2142
2143 int side = (ros == 3) ? 0 : 1;
2144
2145 return (drawer[(side<<4)|(eta<<3)|phi]);
2146}
2147
2148//
2149// Next 5 methods provide RUN2 cabling for MBTS
2150// used for reconstruction of real data
2151//
2152bool
2153TileCablingService::hwid2MBTSconnected_run2plus(int ros, int drawer, int channel) const
2154{
2155 return ( (ros > 2) &&
2156 ( (channel == 4 && hwid2MBTSeta_run2plus(ros,drawer) == 0) ||
2157 (channel == 12 && hwid2MBTSeta_run2plus(ros,drawer) == 1) ) );
2158}
2159
2160bool
2162{
2163 return ((ros > 2) && hwid2MBTSeta_run2plus(ros,drawer) != -1);
2164}
2165
2166bool
2167TileCablingService::hwid2E4prconnected_run2(int ros, int drawer, int channel) const
2168{
2169 return ((ros > 3) && (channel == 12) && hwid2E4preta_run2(drawer) != -1);
2170}
2171
2172bool
2174{
2175 return ((ros > 3) && hwid2E4preta_run2(drawer) != -1);
2176}
2177
2178
2179/*
2180
2181E4' cabling for run2
2182
2183modules 29,32,34,37
2184drawers 28,31,33,36
2185
2186MBTS cabling for RUN2
2187(in the table drawer = module-1)
2188
2189Outer MBTS (eta=1)
2190=========================
2191 phi | connected to
2192 pos | module/drawer
2193==========|==============
2194 04+12 0 | 08 07
2195 20+28 2 | 24 23
2196 36+44 4 | 43 42
2197 52+60 6 | 54 53
2198
2199
2200Inner MBTS (eta=0)
2201======================
2202 phi | connected to
2203 pos | module/drawer
2204=======|==============
2205 04 0 | 57 56
2206 12 1 | 58 57
2207 20 2 | 39 38
2208 28 3 | 40 39
2209 36 4 | 41 40
2210 44 5 | 42 41
2211 52 6 | 55 54
2212 60 7 | 56 55
2213
2214Outer MBTS (eta=1) in 2018
2215======================
2216 phi | connected to
2217 pos | module/drawer
2218=======|==============
2219 04 0 | 03 02
2220 12 1 | 08 07
2221 20 2 | 20(19) 19(18) EBA(EBC)
2222 28 3 | 24 23
2223 36 4 | 43 42
2224 44 5 | 46 45
2225 52 6 | 54 53
2226 60 7 | 59 58
2227
2228*/
2229
2230int
2232{
2233 int phi[64] = {
2234 -1, -1, -1, -1, -1, -1, -1, 0,
2235 -1, -1, -1, -1, -1, -1, -1, -1,
2236 -1, -1, -1, -1, -1, -1, -1, 2,
2237 -1, -1, -1, -1, -1, -1, -1, -1,
2238 -1, -1, -1, -1, -1, -1, 2, 3,
2239 4, 5, 4, -1, -1, -1, -1, -1,
2240 -1, -1, -1, -1, -1, 6, 6, 7,
2241 0, 1, -1, -1, -1, -1, -1, -1
2242 };
2243
2244 int phiA[64] = {
2245 -1, -1, 0, -1, -1, -1, -1, 1,
2246 -1, -1, -1, -1, -1, -1, -1, -1,
2247 -1, -1, -1, 2, -1, -1, -1, 3,
2248 -1, -1, -1, -1, -1, -1, -1, -1,
2249 -1, -1, -1, -1, -1, -1, 2, 3,
2250 4, 5, 4, -1, -1, 5, -1, -1,
2251 -1, -1, -1, -1, -1, 6, 6, 7,
2252 0, 1, 7, -1, -1, -1, -1, -1
2253 };
2254
2255 int phiC[64] = {
2256 -1, -1, 0, -1, -1, -1, -1, 1,
2257 -1, -1, -1, -1, -1, -1, -1, -1,
2258 -1, -1, 2, -1, -1, -1, -1, 3,
2259 -1, -1, -1, -1, -1, -1, -1, -1,
2260 -1, -1, -1, -1, -1, -1, 2, 3,
2261 4, 5, 4, -1, -1, 5, -1, -1,
2262 -1, -1, -1, -1, -1, 6, 6, 7,
2263 0, 1, 7, -1, -1, -1, -1, -1
2264 };
2265
2268 return (ros<4)?phiA[drawer]:phiC[drawer];
2269 } else {
2270 return phi[drawer];
2271 }
2272}
2273
2274int
2276{
2277 int eta[64] = {
2278 -1, -1, -1, -1, -1, -1, -1, 1,
2279 -1, -1, -1, -1, -1, -1, -1, -1,
2280 -1, -1, -1, -1, -1, -1, -1, 1,
2281 -1, -1, -1, -1, -1, -1, -1, -1,
2282 -1, -1, -1, -1, -1, -1, 0, 0,
2283 0, 0, 1, -1, -1, -1, -1, -1,
2284 -1, -1, -1, -1, -1, 1, 0, 0,
2285 0, 0, -1, -1, -1, -1, -1, -1
2286 };
2287
2288 int etaA[64] = {
2289 -1, -1, 1, -1, -1, -1, -1, 1,
2290 -1, -1, -1, -1, -1, -1, -1, -1,
2291 -1, -1, -1, 1, -1, -1, -1, 1,
2292 -1, -1, -1, -1, -1, -1, -1, -1,
2293 -1, -1, -1, -1, -1, -1, 0, 0,
2294 0, 0, 1, -1, -1, 1, -1, -1,
2295 -1, -1, -1, -1, -1, 1, 0, 0,
2296 0, 0, 1, -1, -1, -1, -1, -1
2297 };
2298
2299 int etaC[64] = {
2300 -1, -1, 1, -1, -1, -1, -1, 1,
2301 -1, -1, -1, -1, -1, -1, -1, -1,
2302 -1, -1, 1, -1, -1, -1, -1, 1,
2303 -1, -1, -1, -1, -1, -1, -1, -1,
2304 -1, -1, -1, -1, -1, -1, 0, 0,
2305 0, 0, 1, -1, -1, 1, -1, -1,
2306 -1, -1, -1, -1, -1, 1, 0, 0,
2307 0, 0, 1, -1, -1, -1, -1, -1
2308 };
2309
2312 return (ros<4)?etaA[drawer]:etaC[drawer];
2313 } else {
2314 return eta[drawer];
2315 }
2316}
2317
2318int
2320{
2321 int phi[64] = {
2322 -1, -1, -1, -1, -1, -1, -1, -1,
2323 -1, -1, -1, -1, -1, -1, -1, -1,
2324 -1, -1, -1, -1, -1, -1, -1, -1,
2325 -1, -1, -1, -1, 0, -1, -1, 1,
2326 -1, 2, -1, -1, 3, -1, -1, -1,
2327 -1, -1, -1, -1, -1, -1, -1, -1,
2328 -1, -1, -1, -1, -1, -1, -1, -1,
2329 -1, -1, -1, -1, -1, -1, -1, -1
2330 };
2331
2332 return phi[drawer];
2333}
2334
2335int
2337{
2338 int eta[64] = {
2339 -1, -1, -1, -1, -1, -1, -1, -1,
2340 -1, -1, -1, -1, -1, -1, -1, -1,
2341 -1, -1, -1, -1, -1, -1, -1, -1,
2342 -1, -1, -1, -1, 2, -1, -1, 2,
2343 -1, 2, -1, -1, 2, -1, -1, -1,
2344 -1, -1, -1, -1, -1, -1, -1, -1,
2345 -1, -1, -1, -1, -1, -1, -1, -1,
2346 -1, -1, -1, -1, -1, -1, -1, -1
2347 };
2348
2349 return eta[drawer];
2350}
2351
2352int
2354{
2355 int drawer[24] = {
2356 56, 57, 38, 39, 40, 41, 54, 55, //E6 (inner)
2357 7, 7, 23, 23, 42, 42, 53, 53, //E5 (outer)
2358 28, 31, 33, 36, 28, 31, 33, 36 };//E4'
2359
2360 int drawerE5A[8] = {2, 7, 19, 23, 42, 45, 53, 58}; //E5 (outer) in EBA in 2018
2361 int drawerE5C[8] = {2, 7, 18, 23, 42, 45, 53, 58}; //E5 (outer) in EBA in 2018
2362
2364 && eta == 1) {
2365 return (side>0)?drawerE5A[phi]:drawerE5C[phi];
2366 } else {
2367 return (drawer[(eta<<3)|phi]);
2368 }
2369}
2370
2371int
2373{
2374 return ((eta==0)?4:12); // both MBTS and E4'
2375}
2376
2377unsigned int
2379{
2380 return m_tileID->is_tile_gapscin(cell_id) ? 1:2;
2381}
2382
2383void
2385
2386 if (m_isCacheFilled) return;
2387
2388 unsigned int nChannels = (TileCalibUtils::MAX_ROS - 1) * TileCalibUtils::MAX_DRAWER * m_maxChannels;
2389
2390 m_ch2cell.resize(nChannels);
2391 m_ch2pmt.resize(nChannels);
2392 m_ch2index.resize(nChannels);
2393
2394 for (unsigned int ros = 1; ros < TileCalibUtils::MAX_ROS; ++ros) {
2395 for (unsigned int drawer = 0; drawer < TileCalibUtils::MAX_DRAWER; ++drawer) {
2396 for (int channel = 0; channel < m_maxChannels; ++channel) {
2397 int index;
2398 int pmt;
2399 Identifier cell_id = h2s_cell_id_index_find(ros, drawer, channel,index, pmt);
2400 int ind = cacheIndex(ros, drawer, channel);
2401 m_ch2cell[ind] = cell_id;
2402 m_ch2pmt[ind] = pmt;
2403 m_ch2index[ind] = index;
2404 }
2405 }
2406 }
2407 m_isCacheFilled = true;
2408}
2409
2411TileCablingService::h2s_cell_id_index ( const HWIdentifier & hwid, int & index, int & pmt ) const
2412{
2413 int ros = m_tileHWID->ros (hwid);
2414 int drawer = m_tileHWID->drawer (hwid);
2415 int channel = m_tileHWID->channel (hwid);
2416
2417 if (m_isCacheFilled && ros != TileHWID::BEAM_ROS) {
2418 return h2s_cell_id_index_from_cache(ros, drawer, channel, index, pmt);
2419 } else {
2420 return h2s_cell_id_index_find(ros, drawer, channel, index, pmt);
2421 }
2422}
2423
2425TileCablingService::h2s_cell_id_index (int ros, int drawer, int channel, int& index, int& pmt ) const
2426{
2427
2428 if (m_isCacheFilled && ros != TileHWID::BEAM_ROS) {
2429 return h2s_cell_id_index_from_cache(ros, drawer, channel, index, pmt);
2430 } else {
2431 return h2s_cell_id_index_find(ros, drawer, channel, index, pmt);
2432 }
2433}
2434
2435
2437TileCablingService::h2s_cell_id_index_from_cache (int ros, int drawer, int channel,
2438 int & index, int & pmt ) const
2439{
2440 int ind = cacheIndex(ros, drawer, channel);
2441 index = m_ch2index[ind];
2442 pmt = m_ch2pmt[ind];
2443 return m_ch2cell[ind];
2444}
2445
2447 return m_MBTSmergedRun2Plus[module];
2448}
2449
2450int TileCablingService::E1_merged_with_run2plus(int ros, int module) const {
2451 return m_E1mergedRun2Plus[(ros - 3) * 64 + module];
2452}
2453
2454bool TileCablingService::isDisconnected(int ros, int drawer, int channel) const {
2455
2456 bool isChannelDisconnected(channel2hole(ros, channel) < 0);
2457
2458 // Modules EBA15 and EBC18 are special
2459 if ((ros == 3 && drawer == 14) || (ros == 4 && drawer == 17)) {
2460 if (channel < 4) {
2461 isChannelDisconnected = true;
2462 } else if (channel == 18 || channel == 19) {
2463 isChannelDisconnected = false;
2464 }
2465 }
2466
2467 return isChannelDisconnected;
2468}
Scalar eta() const
pseudorapidity method
Scalar phi() const
phi method
void section(const std::string &sec)
TileCablingService *TileCablingService::getInstance_nc ATLAS_NOT_THREAD_SAFE()
Install fatal handler with default options.
#define ATLAS_THREAD_SAFE
This class saves the "context" of an expanded identifier (ExpandedIdentifier) for compact or hash ver...
Definition IdContext.h:26
This is a "hash" representation of an Identifier.
static int hwid2module(int drawer)
int hwid2module_gapscin(int ros, int drawer, int channel) const
int hwid2MBTSeta(int drawer, int channel) const
static int hwid2tbtype(int drawer)
bool D4(int channel) const
void EB_special_move_channel(int ros, int drawer, int &channel) const
int frag2channels(const HWIdentifier &id, std::vector< HWIdentifier > &ids) const
static int hwid2tbmodule(int drawer, int channel)
TileCablingType m_cablingType
int MBTS2drawer_run2plus(int side, int phi, int eta) const
Identifier cell2mt_id(const Identifier &id) const
int hwid2MBTSeta_real(int ros, int drawer, int channel) const
int frag(const HWIdentifier &id) const
unsigned int getNChanPerCell(const Identifier &cell_id) const
const TileTBID * m_tileTBID
std::vector< int > m_ch2index
static int hwid2section(int ros, int channel)
static bool C10_connected(int module)
int hwid2tower_gapscin(int ros, int drawer, int channel) const
Identifier h2s_cell_id_index_from_cache(int ros, int drawer, int channel, int &index, int &pmt) const
bool EB_special(int ros, int drawer) const
static const TileCablingService * getInstance()
get pointer to service instance
bool hwid2MBTSconnected_real(int ros, int drawer, int channel) const
Identifier h2s_cell_id_index_find(int ros, int drawer, int channel, int &index, int &pmt) const
int MBTS2channel_run2plus(int eta) const
int swid2channel_gapscin(int side, int module, int tower) const
static int hwid2tbchannel(int drawer, int channel)
std::vector< int > m_ch2sampleUpgradeABC
int MBTS2drawer_real(int side, int phi, int eta) const
static int tbid2drawer(int tbtype, int tbmodule)
const CaloLVL1_ID * m_TT_ID
HWIdentifier s2h_adc_id(const Identifier &id) const
int hwid2side(int ros, int channel) const
Identifier cell2tt_id(const Identifier &id) const
Identifier pmt2mt_id(const Identifier &id) const
bool is_MBTS_merged_run2plus(int module) const
Identifier drawer2MBTS_id(const HWIdentifier &id) const
int hwid2MBTSphi(int drawer, int channel) const
void setConnected(int section, int side, int modMin, int modMax)
bool isChannelFromOppositeSide(int channel) const
int swid2drawer_gapscin_run2plus(int side, int module, int tower) const
Identifier h2s_adc_id(const HWIdentifier &id) const
std::vector< Identifier > m_ch2cell
int MBTS2drawer(int phi, int eta) const
int E1_merged_with_run2plus(int ros, int module) const
static int swid2drawer(int module)
std::vector< int > m_ch2pmtUpgradeABC
int hwid2MBTSphi_real(int ros, int drawer, int channel) const
int hwid2tower_upgradeABC(int ros, int channel) const
Identifier h2s_pmt_id(const HWIdentifier &id) const
int hwid2MBTSphi_run2plus(int ros, int drawer) const
int hwid2pmt(int ros, int channel) const
bool isDisconnected(int ros, int drawer, int channel) const
int hwid2tower(int ros, int channel) const
std::vector< int > m_E1mergedRun2Plus
int hwid2sample_upgradeABC(int ros, int channel) const
int hwid2pmt_upgradeABC(int ros, int channel) const
int swid2channel_upgradeABC(int section, int side, int tower, int sample, int pmt) const
static int hwid2sample(int ros, int channel)
bool hwid2E4prconnected_run2(int ros, int drawer, int channel) const
int hwid2E4preta_run2(int drawer) const
bool isTileGapCrack(int channel) const
HWIdentifier s2h_drawer_id(const Identifier &id) const
Identifier h2s_cell_id(const HWIdentifier &id) const
int swid2ros(int section, int side) const
Identifier pmt2tt_id(const Identifier &id) const
int hwid2E4prphi_run2(int drawer) const
std::vector< int > m_ch2pmt
std::vector< int > m_ch2towerUpgradeABC
static int channel2cellindex(int ros, int channel)
std::vector< bool > m_MBTSmergedRun2Plus
bool hwid2MBTSconnected(int ros, int drawer, int channel) const
bool hwid2MBTSconnected_run2plus(int ros, int drawer, int channel) const
int swid2channel(int section, int side, int tower, int sample, int pmt) const
Identifier h2s_cell_id_index(const HWIdentifier &id, int &index, int &pmt) const
int hwid2MBTSeta_run2plus(int ros, int drawer) const
bool TileGap_connected(const Identifier &id) const
static int tbid2channel(int drawer, int tbchannel)
int cacheIndex(int ros, int drawer, int channel) const
HWIdentifier s2h_channel_id(const Identifier &id) const
void setTestBeam(bool testBeam)
const TileHWID * m_tileHWID
int swid2drawer_gapscin(int side, int module, int tower) const
bool setCablingType(TileCablingType type)
static int channel2hole(int ros, int channel)
Static class providing several utility functions and constants.
static const unsigned int MAX_ROS
Number of ROSs.
static const unsigned int MAX_DRAWER
Number of drawers in ROS 1-4.
@ BEAM_ROS
Definition TileHWID.h:67
@ HIGHGAIN
Definition TileHWID.h:73
struct color C
This module provides a lot of global definitions, forward declarations and includes that are used by ...
Definition PrunDriver.h:15
Definition index.py:1