ATLAS Offline Software
TileCablingService.cxx
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1 /*
2  Copyright (C) 2002-2025 CERN for the benefit of the ATLAS collaboration
3 */
4 
7 
8 #include <string>
9 #include <iostream>
10 #include <algorithm>
11 
12 // Singleton method
13 
14 // Ideally we should just create this fully initialized and not expose
15 // a non-const accessor. However, there's many pieces of code scattered
16 // around that want to twiddle things here; getting rid of those would
17 // entail a significant redesign. For now, separate const and non-const
18 // access, and tag the non-const access as not thread-safe.
19 namespace {
21 }
22 
23 //------------------------------------------------------------
25 {
26  return &cablingService;
27 }
28 
29 //------------------------------------------------------------
30 TileCablingService * TileCablingService::getInstance_nc ATLAS_NOT_THREAD_SAFE()
31 {
32  return &cablingService;
33 }
34 
35 // default constructor
36 
37 //-------------------------------------------------------------
39  : m_tileID(nullptr)
40  , m_tileHWID(nullptr)
41  , m_TT_ID(nullptr)
42  , m_tileTBID(nullptr)
43  , m_cablingType(TileCablingService::OldSim)
44  , m_isCacheFilled(false)
45  , m_MBTSmergedRun2Plus(64, 0)
46  , m_E1mergedRun2Plus(128, 0)
47  , m_run2(false)
48  , m_run2plus(false)
49  , m_run3(false)
50  , m_maxChannels(TileCalibUtils::MAX_CHAN)
51  , m_maxGains(TileCalibUtils::MAX_GAIN)
52 {
53  m_testBeam = false;
54  // old cabling for simulation - no special EB modules, wrong numbers for E1-E4
55  m_EBAspec = -1;
56  m_EBCspec = -1;
57  m_E1chan = 13;
58  m_E2chan = 12;
59  m_E3chan = 1;
60  m_E4chan = 0;
61  m_E3special = 1; // no difference
62  m_E4special = 0; // with normal drawers
63  m_MBTSchan = 47;
64 
65  int ros=0;
66  for ( ; ros<1; ++ros) { // no beam frags
67  for (int drawer=0; drawer<64; ++drawer) {
68  m_connected[ros][drawer] = false;
69  }
70  }
71  for ( ; ros<5; ++ros) { // all drawers connected
72  for (int drawer=0; drawer<64; ++drawer) {
73  m_connected[ros][drawer] = true;
74  }
75  }
76 
78  setRun2Merged();
79 }
80 
81 void
83 {
84  m_E1mergedRun2Plus.clear();
85  m_E1mergedRun2Plus.resize(128,0);
86 
87  // Merged E1 and MBTS for run2
88  // EBA
89  m_E1mergedRun2Plus[6] = 7;
90  m_E1mergedRun2Plus[24] = 23;
91  m_E1mergedRun2Plus[43] = 42;
92  m_E1mergedRun2Plus[52] = 53;
93  // EBC
94  m_E1mergedRun2Plus[64+6] = 7;
95  m_E1mergedRun2Plus[64+24] = 23;
96  m_E1mergedRun2Plus[64+43] = 42;
97  m_E1mergedRun2Plus[64+52] = 53;
98  // additional E4' in EBC
99  m_E1mergedRun2Plus[64+27] = 28;
100  m_E1mergedRun2Plus[64+30] = 31;
101  m_E1mergedRun2Plus[64+34] = 33;
102  m_E1mergedRun2Plus[64+37] = 36;
103 
104  m_MBTSmergedRun2Plus.clear();
105  m_MBTSmergedRun2Plus.resize(64,false);
106 
107  m_MBTSmergedRun2Plus[7] = true;
108  m_MBTSmergedRun2Plus[23] = true;
109  m_MBTSmergedRun2Plus[42] = true;
110  m_MBTSmergedRun2Plus[53] = true;
111 }
112 
113 void
115 {
116  m_E1mergedRun2Plus.clear();
117  m_E1mergedRun2Plus.resize(128,0);
118  m_MBTSmergedRun2Plus.clear();
119  m_MBTSmergedRun2Plus.resize(64,false);
120 
121  // Merged E1 and MBTS for run2
122  // EBA
123  m_E1mergedRun2Plus[6] = 7;
124  m_E1mergedRun2Plus[24] = 23;
125  m_E1mergedRun2Plus[43] = 42;
126  m_E1mergedRun2Plus[52] = 53;
127  // EBC
128  m_E1mergedRun2Plus[64+6] = 7;
129  m_E1mergedRun2Plus[64+24] = 23;
130  m_E1mergedRun2Plus[64+43] = 42;
131  m_E1mergedRun2Plus[64+52] = 53;
132  // additional E4' in EBC
133  m_E1mergedRun2Plus[64+27] = 28;
134  m_E1mergedRun2Plus[64+30] = 31;
135  m_E1mergedRun2Plus[64+34] = 33;
136  m_E1mergedRun2Plus[64+37] = 36;
137 
138  // Additional merged E1 in 2018
139  // EBA
140  m_E1mergedRun2Plus[3] = 2;
141  m_E1mergedRun2Plus[20] = 19;
142  m_E1mergedRun2Plus[46] = 45;
143  m_E1mergedRun2Plus[59] = 58;
144  // EBC
145  m_E1mergedRun2Plus[64+3] = 2;
146  m_E1mergedRun2Plus[64+17] = 18;
147  m_E1mergedRun2Plus[64+46] = 45;
148  m_E1mergedRun2Plus[64+59] = 58;
149 
150  // no merged MBTS in 2018
151  m_MBTSmergedRun2Plus.clear();
152  m_MBTSmergedRun2Plus.resize(64,false);
153 }
154 
155 void
157 {
158  m_E1mergedRun2Plus.clear();
159  m_E1mergedRun2Plus.resize(128, 0);
160  m_MBTSmergedRun2Plus.clear();
161  m_MBTSmergedRun2Plus.resize(64, false);
162 
163  // Merged E1 and MBTS for run2
164  // EBA
165  m_E1mergedRun2Plus[6] = 7;
166  m_E1mergedRun2Plus[24] = 23;
167  m_E1mergedRun2Plus[43] = 42;
168  m_E1mergedRun2Plus[52] = 53;
169  // EBC
170  m_E1mergedRun2Plus[64 + 6] = 7;
171  m_E1mergedRun2Plus[64 + 24] = 23;
172  m_E1mergedRun2Plus[64 + 43] = 42;
173  m_E1mergedRun2Plus[64 + 52] = 53;
174 
175  // Additional merged E1 since 2018
176  // EBA
177  m_E1mergedRun2Plus[3] = 2;
178  m_E1mergedRun2Plus[20] = 19;
179  m_E1mergedRun2Plus[46] = 45;
180  m_E1mergedRun2Plus[59] = 58;
181  // EBC
182  m_E1mergedRun2Plus[64 + 3] = 2;
183  m_E1mergedRun2Plus[64 + 17] = 18;
184  m_E1mergedRun2Plus[64 + 46] = 45;
185  m_E1mergedRun2Plus[64 + 59] = 58;
186 
187  // no merged MBTS since 2018
188  m_MBTSmergedRun2Plus.clear();
189  m_MBTSmergedRun2Plus.resize(64, false);
190 }
191 
192 // destructor
193 
194 //-------------------------------------------------------------
196 {
197 }
198 
199 void
201 {
202  if (testBeam) // don't print anything for full ATLAS configuration
203  std::cout << "==> Setting testbeam flag to TRUE in TileCablingService " << std::endl;
204  m_testBeam = testBeam;
205  if (testBeam) {
207  int ros=0;
208  for ( ; ros<1; ++ros) {
209  int drawer=0;
210  for ( ; drawer<32; ++drawer) { // all 0x0? and 0x1? frags in beam crate
211  m_connected[ros][drawer] = true;
212  }
213  for ( ; drawer<64; ++drawer) {
214  m_connected[ros][drawer] = false;
215  }
216  }
217  for ( ; ros<5; ++ros) { // nothing connected - use setConnected() to declare connected drawers
218  for (int drawer=0; drawer<64; ++drawer) {
219  m_connected[ros][drawer] = false;
220  }
221  }
222  }
223 }
224 
225 bool
227 {
228 // cabling type can be:
229 // -1 for testbeam
230 // 0 for MBTS in spare channels and wrong cabling for gap/crack (like in simulation before rel 14.2.10)
231 // 1 new configuration without MBTS and correct gap/crack cells
232 // 2 new configuration with MBTS instead of crack scintillators
233 // 3 new configuration with MBTS in spare channels
235 
237 
239  // old cabling for simulation - no special EB modules, wrong numbers for E1-E4
240  m_EBAspec = -1;
241  m_EBCspec = -1;
242  m_E1chan = 13;
243  m_E2chan = 12;
244  m_E3chan = 1;
245  m_E4chan = 0;
246  m_E3special = 1; // no difference
247  m_E4special = 0; // with normal drawers
248  m_MBTSchan = 47;
250  setTestBeam(true);
251  } else {
252  // new correct cabling for E1-E4 cells
253  m_EBAspec = 14; // EBA15 - special
254  m_EBCspec = 17; // EBC18 - special
255  m_E1chan = 12;
256  m_E2chan = 13;
257  m_E3chan = 0;
258  m_E4chan = 1;
259  m_E3special = 18;
260  m_E4special = 19;
261 
265 
267  m_run2plus = (m_run2 || m_run3);
268 
270  setRun3Merged();
271  } else if (type == TileCablingService::RUN2aCabling) {
272  setRun2aMerged();
273  } else {
274  setRun2Merged();
275  }
276 
277  if (m_run2plus)
278  m_MBTSchan = -1; // should use function MBTS2channel_run2(int eta)
280  m_MBTSchan = 0;
281  else // Crack and MBTS in spare channel
282  m_MBTSchan = 47;
283 
285 
286  m_maxChannels = 240;
287  const int nBarrelAndExtendedChannels(m_maxChannels * 2);
288 
289  m_ch2towerUpgradeABC.resize(nBarrelAndExtendedChannels, -1);
290  m_ch2sampleUpgradeABC.resize(nBarrelAndExtendedChannels, -1);
291  m_ch2pmtUpgradeABC.resize(nBarrelAndExtendedChannels, -1);
292 
293 
294  IdContext pmtContext = m_tileID->pmt_context();
295  unsigned int maxPmtHash = m_tileID->pmt_hash_max();
296 
297  for (IdentifierHash pmtHash = 0; pmtHash < maxPmtHash; pmtHash += 1) {
298  Identifier swid;
299  if (m_tileID->get_id(pmtHash, swid, &pmtContext) == 0) {
300  int module = m_tileID->module(swid);
301  if (module == 0) { // Use module 0 to fill caches
302  int side = m_tileID->side(swid);
303  if (side == TileID::POSITIVE) { // Use only positive side to fill caches
304  int section = m_tileID->section(swid);
305  int tower = m_tileID->tower(swid);
306  int sample = m_tileID->sample(swid);
307  int pmt = m_tileID->pmt(swid);
308 
309  if (tower == 41 || (tower > 42 && tower < 46)) continue; // Skip dummy towers
310 
312 
313  if (channel >= 0 && (unsigned int) channel < m_ch2towerUpgradeABC.size()) {
315  m_ch2towerUpgradeABC[channel] = tower;
318  }
319 
320  }
321  }
322  }
323  }
324 
325  }
326 
327  }
328  return true;
329 }
330 
331 void
332 TileCablingService::setConnected(int section, int side, int modMin, int modMax)
333 {
334  if (modMax > modMin) {
335  std::cout << "TileCablingService: in section " << section << " side " << side
336  << " modules from " << modMin << " to " << modMax-1 << " are connected" << std::endl;
337  int ros=swid2ros(section,side);
338  for (int module=modMin; module<modMax; ++module) {
340  m_connected[ros][drawer] = true;
341  }
342  } else {
343  std::cout << "TileCablingService: in section " << section << " side " << side
344  << " no modules connected " << std::endl;
345  }
346 }
347 
348 void
349 TileCablingService::setConnected(int ros, int draMin, int draMax)
350 {
351  for (int drawer=draMin; drawer<draMax; ++drawer) {
352  m_connected[ros][drawer] = true;
353  }
354 }
355 
356 //
357 // Convert TileID to Trigger Tower ID
358 //
359 
362 {
363  // take only first pmt - might be wrong for D-cells
364  return pmt2tt_id(m_tileID->pmt_id(id,0));
365 }
366 
369 {
370  if (!id.is_valid()) return m_invalid_id;
371 
372  int mineta[4] = { 0, 0, 9, 9 };
373  int maxeta[4] = { 0, 8, 14, 14 };
374 
375  int section = m_tileID->section (id);
376  int side = m_tileID->side (id);
377  int module = m_tileID->module (id);
378  int tower = m_tileID->tower (id);
379  int sample = m_tileID->sample (id);
380  int pmt = m_tileID->pmt (id);
381 
382  if (m_cablingType == UpgradeABC) {
383  tower /= 4;
385  }
386 
387  int posneg = side; // -1 or +1
388  int sampling = 1; // Hadronic
389  int region = 0; // abs(eta)<2.5
390  int ieta = tower;
391  int iphi = module;
392 
393  if (TileID::SAMP_E == sample) {
394  ieta = maxeta[section] + 1; // all gap scintillators are outside
395  // return m_invalid_id;
396  } else {
397  if (TileID::SAMP_D == sample) {
398  if ( 0 == ieta ) {
399  if (m_testBeam) {
400  if ( 0 == pmt ) { // testbeam - cell D0, first pmt is in another side;
401  if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
402  else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
403  }
404  } else {
405  if ( 1 == pmt ) { // cell D0, second pmt is in another side;
406  if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
407  else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
408  }
409  }
410  } else {
411  if ( ieta > 8 ) pmt = 1-pmt;
412  if ( TileID::NEGATIVE == side ) pmt = 1-pmt;
413  ieta -= pmt; // second pmt in D samling is in previous trigger tower
414  }
415  }
416 
417  // merge several towers in one trigger tower at section boundaries
418  // A10 goes to the same tower as A9 and B9
419  // D4 goes to the same tower as C10 and D5(pmt=1)
420  // A16 goes to the same tower as A15 and B15
421  ieta = std::max(ieta,mineta[section]);
422  ieta = std::min(ieta,maxeta[section]);
423  }
424 
425  Identifier tt_id = m_TT_ID->tower_id(posneg, sampling, region, ieta, iphi);
426 
427  return tt_id;
428 }
429 
430 //
431 // Convert TileID to Muon Trigger Tower ID (valid only for D-cells)
432 //
433 
436 {
437  // take only first pmt - might be wrong for D0 cell
438  return pmt2mt_id(m_tileID->pmt_id(id,0));
439 }
440 
443 {
444 // int section = m_tileID->section (id);
445  int side = m_tileID->side (id);
446  int module = m_tileID->module (id);
447  int tower = m_tileID->tower (id);
448  int sample = m_tileID->sample (id);
449  int pmt = m_tileID->pmt (id);
450 
451  if (m_cablingType == UpgradeABC) {
452  tower /= 4;
454  }
455 
456  if (TileID::SAMP_D == sample) {
457  int posneg = side; // -1 or +1
458  int sampling = 2; // muon signal from last sampling
459  int region = 0; // abs(eta)<2.5
460  int ieta = tower;
461  int iphi = module;
462 
463  if ( 0 == ieta ) {
464  if (m_testBeam) {
465  if ( 0 == pmt ) { // testbeam - cell D0, first pmt is in another side;
466  if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
467  else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
468  }
469  } else {
470  if ( 1 == pmt ) { // cell D0, second pmt is in another side;
471  if ( TileID::NEGATIVE == side ) posneg = TileID::POSITIVE;
472  else if ( TileID::POSITIVE == side ) posneg = TileID::NEGATIVE;
473  }
474  }
475  }
476 
477  Identifier tt_id = m_TT_ID->tower_id(posneg, sampling, region, ieta, iphi) ;
478  return tt_id;
479 
480  } else {
481 
482  return m_invalid_id;
483  }
484 }
485 
486 //
487 // Build MBTS offline ID from drawer HWID
488 // return invalid ID if there is no MBTS in a given drawer
489 //
490 
493 {
494  int ros = m_tileHWID->ros (hwid);
495  int drawer = m_tileHWID->drawer (hwid);
496  int channel = m_MBTSchan;
497 
499 
500  return m_invalid_id;
501 
502  } else if ( m_run2plus) {
503 
505 
506  int side = hwid2side(ros,channel);
509 
510  return m_tileTBID->channel_id(side, phi, eta);
511 
512  } else {
513 
514  return m_invalid_id;
515  }
516 
517  } else if ( MBTSOnly == m_cablingType ) {
518 
520 
521  int side = hwid2side(ros,channel);
524 
525  return m_tileTBID->channel_id(side, phi, eta);
526 
527  } else {
528 
529  return m_invalid_id;
530  }
531 
532  } else {
533 
535 
536  int side = hwid2side(ros,channel);
539 
540  return m_tileTBID->channel_id(side, phi, eta);
541 
542  } else {
543 
544  return m_invalid_id;
545  }
546  }
547 }
548 
549 
550 //
551 // Convert TileHWID to TileID
552 //
553 
556 {
557  int ros = m_tileHWID->ros (hwid);
558  int drawer = m_tileHWID->drawer (hwid);
559  int channel = m_tileHWID->channel (hwid);
560  if ( EB_special(ros,drawer) ) {
561  if ( D4(channel) ) return m_invalid_id;
562  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
563  }
564 
565  if ( TileHWID::BEAM_ROS == ros ) {
566 
567  int tbtype = hwid2tbtype (drawer);
568  int tbmodule = hwid2tbmodule (drawer,channel);
569  int tbchannel = hwid2tbchannel (drawer,channel);
570 
571  return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
572  }
573 
576 
577  if (sample < 0)
578  return m_invalid_id; // for any kind of cabling can't have negagive sample
579 
580  if (m_run2plus) {
581 
583  int side = hwid2side(ros,channel);
586  return m_tileTBID->channel_id(side, phi, eta);
587 
588  } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
589  int side = hwid2side(ros,channel);
592  return m_tileTBID->channel_id(side, phi, eta);
593 
594  } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
595  return m_invalid_id;
596  }
597 
598  } else if (m_cablingType == MBTSOnly) {
599 
600  if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
601  int side = hwid2side(ros,channel);
604  return m_tileTBID->channel_id(side, phi, eta);
605 
606  } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
607  return m_invalid_id;
608  }
609 
610  } else {
611 
612  if (sample == TileID::SAMP_X) { // MBTS
613 
614  if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
616 
617  int side = hwid2side(ros,channel);
620 
621  return m_tileTBID->channel_id(side, phi, eta);
622 
623  } else
624  return m_invalid_id;
625  } else
626  return m_invalid_id;
627  }
628  }
629 
631  int side = hwid2side (ros,channel);
632  int module = hwid2module (drawer);
633 
634  int tower = (m_cablingType != UpgradeABC) ? hwid2tower(ros, channel)
636 
637  if (m_cablingType == MBTSOnly) {
638  if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
639 
641  int tower = hwid2tower_gapscin (ros, drawer, channel);
642 
643  if (tower == -1) {
644  return m_invalid_id;
645  } else
646  return m_tileID->cell_id(section, side, module, tower, sample);
647  }
648  }
649 
650  return m_tileID->cell_id(section, side, module, tower, sample);
651 }
652 
655 {
656  if ( EB_special(ros,drawer) ) {
657  if ( D4(channel) ) { index = pmt = -1; return m_invalid_id; }
658  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
659  }
660 
661  if ( TileHWID::BEAM_ROS == ros ) {
662 
663  int tbtype = hwid2tbtype (drawer);
664  int tbmodule = hwid2tbmodule (drawer,channel);
665  int tbchannel = hwid2tbchannel (drawer,channel);
666  return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
667  }
668 
671 
672  if (sample < 0) {
673  index = pmt = -1;
674  return m_invalid_id; // for any kind of cabling can't have negagive sample
675  }
676 
677  if (m_run2plus) {
678 
680  int side = hwid2side(ros,channel);
683 
684  pmt = 0;
685  index = -2;
686  return m_tileTBID->channel_id(side, phi, eta);
687 
688  } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
689  int side = hwid2side(ros,channel);
692 
693  pmt = 0;
694  index = -3;
695  return m_tileTBID->channel_id(side, phi, eta);
696 
697  } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
698  index = pmt = -1;
699  return m_invalid_id;
700  }
701 
702  } else if (m_cablingType == MBTSOnly) {
703 
704  if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
705  int side = hwid2side(ros,channel);
708 
709  pmt = 0;
710  index = -2;
711  return m_tileTBID->channel_id(side, phi, eta);
712 
713  } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
714  index = pmt = -1;
715  return m_invalid_id;
716  }
717 
718  } else {
719 
720  if (sample == TileID::SAMP_X) { // MBTS
721 
722  if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
724 
725  int side = hwid2side(ros,channel);
728 
729  pmt = 0;
730  index = -2;
731 
732  return m_tileTBID->channel_id(side, phi, eta);
733 
734  } else {
735  index = pmt = -1;
736  return m_invalid_id;
737  }
738  } else {
739  index = pmt = -1;
740  return m_invalid_id;
741  }
742  }
743  }
744 
746  int side = hwid2side (ros,channel);
747  int module = hwid2module (drawer);
748 
749  int tower(-1);
750 
751  if (m_cablingType != UpgradeABC) {
752  tower = hwid2tower(ros, channel);
753  pmt = hwid2pmt(ros, channel);
754  } else {
757  }
758 
759  Identifier cellid;
760 
761  if (m_cablingType == MBTSOnly) {
762  if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
763 
765  int tower = hwid2tower_gapscin (ros, drawer, channel);
766 
767  if (tower == -1) {
768  index = pmt = -1;
769  return m_invalid_id;
770  } else {
771  cellid = m_tileID->cell_id(section, side, module, tower, sample);
772  index = m_tileID->cell_hash(cellid);
773  return cellid;
774  }
775  }
776  }
777 
778  cellid = m_tileID->cell_id(section, side, module, tower, sample);
779  index = m_tileID->cell_hash(cellid);
780  return cellid;
781 }
782 
785 {
786  int ros = m_tileHWID->ros (hwid);
787  int drawer = m_tileHWID->drawer (hwid);
788  int channel = m_tileHWID->channel (hwid);
789  if ( EB_special(ros,drawer) ) {
790  if ( D4(channel) ) return m_invalid_id;
791  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
792  }
793 
794  if ( TileHWID::BEAM_ROS == ros ) {
795 
796  int tbtype = hwid2tbtype (drawer);
797  int tbmodule = hwid2tbmodule (drawer,channel);
798  int tbchannel = hwid2tbchannel (drawer,channel);
799 
800  return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
801  }
802 
805 
806  if (sample < 0)
807  return m_invalid_id; // for any kind of cabling can't have negagive sample
808 
809  if (m_run2plus) {
810 
812  int side = hwid2side(ros,channel);
815  return m_tileTBID->channel_id(side, phi, eta);
816 
817  } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
818  int side = hwid2side(ros,channel);
821  return m_tileTBID->channel_id(side, phi, eta);
822 
823  } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
824  return m_invalid_id;
825  }
826 
827  } else if (m_cablingType == MBTSOnly) {
828 
829  if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
830  int side = hwid2side(ros,channel);
833  return m_tileTBID->channel_id(side, phi, eta);
834 
835  } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
836  return m_invalid_id;
837  }
838 
839  } else {
840 
841  if (sample == TileID::SAMP_X) { // MBTS
842 
843  if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
845 
846  int side = hwid2side(ros,channel);
849 
850  return m_tileTBID->channel_id(side, phi, eta);
851 
852  } else
853  return m_invalid_id;
854  } else
855  return m_invalid_id;
856  }
857  }
858 
860  int side = hwid2side (ros,channel);
861  int module = hwid2module (drawer);
862 
863  int tower(-1);
864  int pmt(-1);
865 
866  if (m_cablingType != UpgradeABC) {
867  tower = hwid2tower(ros, channel);
868  pmt = hwid2pmt(ros, channel);
869  } else {
872  }
873 
874  if (m_cablingType == MBTSOnly) {
875  if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
876 
878  int tower = hwid2tower_gapscin (ros, drawer, channel);
879 
880  if (tower == -1) {
881  return m_invalid_id;
882  } else
883  return m_tileID->pmt_id(section, side, module, tower, sample, pmt);
884  }
885  }
886 
887  return m_tileID->pmt_id(section, side, module, tower, sample, pmt);
888 }
889 
892 {
893  int ros = m_tileHWID->ros (hwid);
894  int drawer = m_tileHWID->drawer (hwid);
895  int channel = m_tileHWID->channel (hwid);
896  if ( EB_special(ros,drawer) ) {
897  if ( D4(channel) ) return m_invalid_id;
898  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
899  }
900 
901  if ( TileHWID::BEAM_ROS == ros ) {
902 
903  int tbtype = hwid2tbtype (drawer);
904  int tbmodule = hwid2tbmodule (drawer,channel);
905  int tbchannel = hwid2tbchannel (drawer,channel);
906 
907  return m_tileTBID->channel_id(tbtype, tbmodule, tbchannel);
908  }
909 
912 
913  if (sample < 0)
914  return m_invalid_id;
915 
916  if (m_run2plus) {
917 
919  int side = hwid2side(ros,channel);
922  return m_tileTBID->channel_id(side, phi, eta);
923 
924  } else if (m_run2 && (ros > 3) && hwid2E4prconnected_run2(ros,drawer,channel)) {
925  int side = hwid2side(ros,channel);
928  return m_tileTBID->channel_id(side, phi, eta);
929 
930  } else if (sample == TileID::SAMP_X && m_cablingType != TileCablingService::UpgradeABC) { // can't have MBTS anymore
931  return m_invalid_id;
932  }
933 
934  } else if (m_cablingType == MBTSOnly) {
935 
936  if ((ros > 2) && hwid2MBTSconnected_real(ros,drawer,channel)) {
937  int side = hwid2side(ros,channel);
940  return m_tileTBID->channel_id(side, phi, eta);
941 
942  } else if (sample == TileID::SAMP_X) { // can't have MBTS anymore
943  return m_invalid_id;
944  }
945 
946  } else {
947 
948  if (sample == TileID::SAMP_X) { // MBTS
949 
950  if (m_cablingType == OldSim || m_cablingType == CrackAndMBTS) { // cablings with MBTS in spare channel
952 
953  int side = hwid2side(ros,channel);
956 
957  return m_tileTBID->channel_id(side, phi, eta);
958 
959  } else
960  return m_invalid_id;
961  } else
962  return m_invalid_id;
963  }
964  }
965 
967  int side = hwid2side (ros,channel);
968  int module = hwid2module (drawer);
969  int adc = m_tileHWID->adc(hwid);
970 
971  int tower(-1);
972  int pmt(-1);
973 
974  if (m_cablingType != UpgradeABC) {
975  tower = hwid2tower(ros, channel);
976  pmt = hwid2pmt(ros, channel);
977  } else {
980  }
981 
982 
983  if (m_cablingType == MBTSOnly) {
984  if( ros > 2 && isTileGapCrack(channel) ) { // E3 might be disconnected - check this
985 
987  int tower = hwid2tower_gapscin (ros, drawer, channel);
988 
989  if (tower == -1) {
990  return m_invalid_id;
991  } else
992  return m_tileID->adc_id(section, side, module, tower, sample, pmt, adc);
993  }
994  }
995 
996  return m_tileID->adc_id(section, side, module, tower, sample, pmt, adc);
997 }
998 
999 //
1000 // Convert TileID to TileHWID
1001 //
1002 
1005 {
1006  int section = m_tileID->section (swid);
1007  int ros, drawer;
1008 
1009  if ( TileTBID::TILE_TESTBEAM == section ) {
1010 
1011  int tbtype = m_tileTBID->type(swid);
1012  int tbmodule = m_tileTBID->module(swid);
1013  int tbchannel = m_tileTBID->channel(swid);
1014 
1015  if (tbtype < 2) { // MBTS side +/- 1
1016 
1017  ros = swid2ros(TileID::EXTBAR,tbtype);
1018 
1019  if (m_run2plus) {
1020  drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1021  } else if (m_cablingType == MBTSOnly) {
1022  drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1023  } else {
1024  drawer = MBTS2drawer(tbmodule,tbchannel);
1025  }
1026 
1027  return m_tileHWID->drawer_id(ros, drawer);
1028  }
1029 
1030  drawer = tbid2drawer(tbtype,tbmodule);
1031 
1033  }
1034 
1035  int side = m_tileID->side (swid);
1036  int module = m_tileID->module (swid);
1037  int tower = m_tileID->tower (swid);
1038  int sample = m_tileID->sample (swid);
1039 
1040  if (tower == 0 ) { // special case for D-0 cell
1041  int pmt = m_tileID->pmt (swid);
1042 
1043  int channel = (m_cablingType != UpgradeABC)
1046 
1047  // special case for D0 cell, 2 PMTs in different sides
1050  else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1051  }
1052  }
1053 
1054  ros = swid2ros (section,side);
1055 
1056  if (sample == TileID::SAMP_E && (m_run2plus)) {
1057  drawer = swid2drawer_gapscin_run2plus(side, module,tower); // E1 might go to another module
1058  } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1060  if (drawer < 0) drawer = module; // special trick for disconnected E3 and E4
1061  } else {
1063  }
1064 
1065  return m_tileHWID->drawer_id(ros, drawer);
1066 }
1067 
1070 {
1071  int section = m_tileID->section (swid);
1072  int ros, drawer, channel;
1073 
1074  if ( TileTBID::TILE_TESTBEAM == section ) {
1075 
1076  int tbtype = m_tileTBID->type(swid);
1077  int tbmodule = m_tileTBID->module(swid);
1078  int tbchannel = m_tileTBID->channel(swid);
1079 
1080  if (tbtype < 2) { // MBTS side +/- 1
1081 
1082  ros = swid2ros(TileID::EXTBAR,tbtype);
1083 
1084  if (m_run2plus) {
1085  drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1086  return m_tileHWID->channel_id(ros, drawer, MBTS2channel_run2plus(tbchannel));
1087  } else if (m_cablingType == MBTSOnly) {
1088  drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1089  } else {
1090  drawer = MBTS2drawer(tbmodule,tbchannel);
1091  }
1092 
1094  }
1095 
1096  drawer = tbid2drawer(tbtype,tbmodule);
1097  channel = tbid2channel(drawer,tbchannel);
1098 
1100  }
1101 
1102  int side = m_tileID->side (swid);
1103  int module = m_tileID->module (swid);
1104  int tower = m_tileID->tower (swid);
1105  int sample = m_tileID->sample (swid);
1106  int pmt = m_tileID->pmt (swid);
1107 
1108  if (sample == TileID::SAMP_E && (m_run2plus)) {
1109  drawer = swid2drawer_gapscin_run2plus (side, module,tower); // E1 might go to another module
1110 
1114 
1115  } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1118  if (channel < 0) {
1119  drawer = module;
1120  channel = (tower<15) ? 45 : 46; // special trick : connect non-existing E3 and E4
1121  }
1122 
1123  } else {
1125 
1129  }
1130 
1131  if (channel < 0)
1132  return m_invalid_hwid;
1133 
1134  // special case for D0 cell, 2 PMTs in different sides
1137  else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1138 
1142  }
1143 
1144  ros = swid2ros (section,side);
1145  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
1146 
1147  return m_tileHWID->channel_id(ros, drawer, channel);
1148 }
1149 
1152 {
1153  int section = m_tileID->section (swid);
1154  int ros, drawer, channel;
1155 
1156  if ( TileTBID::TILE_TESTBEAM == section ) {
1157 
1158  int tbtype = m_tileTBID->type(swid);
1159  int tbmodule = m_tileTBID->module(swid);
1160  int tbchannel = m_tileTBID->channel(swid);
1161 
1162  if (tbtype < 2) { // MBTS side +/- 1
1163 
1164  ros = swid2ros(TileID::EXTBAR,tbtype);
1165 
1166  if (m_run2plus) {
1167  drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1169  } else if (m_cablingType == MBTSOnly) {
1170  drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1171  } else {
1172  drawer = MBTS2drawer(tbmodule,tbchannel);
1173  }
1174 
1176  }
1177 
1178  drawer = tbid2drawer(tbtype,tbmodule);
1179  channel = tbid2channel(drawer,tbchannel);
1180 
1182  }
1183 
1184  int side = m_tileID->side (swid);
1185  int module = m_tileID->module (swid);
1186  int tower = m_tileID->tower (swid);
1187  int sample = m_tileID->sample (swid);
1188  int pmt = m_tileID->pmt (swid);
1189  int adc = m_tileID->adc (swid);
1190 
1191  if (sample == TileID::SAMP_E && (m_run2plus)) {
1192  drawer = swid2drawer_gapscin_run2plus (side, module,tower); // E1 might go to another module
1193 
1196 
1197  } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1200  if (channel < 0) {
1201  drawer = module;
1202  channel = (tower<15) ? 45 : 46; // special trick : connect non-existing E3 and E4
1203  }
1204 
1205  } else {
1207 
1210  }
1211 
1212  if (channel < 0)
1213  return m_invalid_hwid;
1214 
1215  // special case for D0 cell, 2 PMTs in different sides
1218  else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1219 
1222  }
1223 
1224  ros = swid2ros(section,side);
1225  EB_special_move_channel(ros,drawer,channel); // move channel 18,19 to 0,1 for EBA15, EBC18
1226 
1227  return m_tileHWID->adc_id(ros, drawer, channel, adc);
1228 }
1229 
1230 //
1231 // find frag number for given ID
1232 //
1233 
1234 int
1235 TileCablingService::frag ( const Identifier & swid ) const
1236 {
1237  int section = m_tileID->section(swid);
1238  int ros, drawer;
1239 
1240  if ( TileTBID::TILE_TESTBEAM == section ) {
1241 
1242  int tbtype = m_tileTBID->type(swid);
1243  int tbmodule = m_tileTBID->module(swid);
1244  int tbchannel = m_tileTBID->channel(swid);
1245 
1246  if (tbtype < 2) { // MBTS side +/- 1
1247 
1248  ros = swid2ros(TileID::EXTBAR,tbtype);
1249 
1250  if (m_run2plus) {
1251  drawer = MBTS2drawer_run2plus(tbtype,tbmodule,tbchannel);
1252  } else if (m_cablingType == MBTSOnly) {
1253  drawer = MBTS2drawer_real(ros, tbmodule,tbchannel);
1254  } else {
1255  drawer = MBTS2drawer(tbmodule,tbchannel);
1256  }
1257 
1258  return m_tileHWID->frag(ros, drawer);
1259  }
1260 
1261  drawer = tbid2drawer(tbtype,tbmodule);
1262 
1264  }
1265 
1266  int side = m_tileID->side(swid);
1267  int module = m_tileID->module(swid);
1268  int tower = m_tileID->tower(swid);
1269  int sample = m_tileID->sample(swid);
1270 
1271  if (tower == 0 ) { // special case for D-0 cell
1272  int pmt = m_tileID->pmt(swid);
1273 
1276 
1277  // special case for D0 cell, 2 PMTs in different sides
1280  else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1281  }
1282  }
1283 
1284  ros = swid2ros (section, side);
1285 
1286  if (sample == TileID::SAMP_E && (m_run2plus)) {
1287  drawer = swid2drawer_gapscin_run2plus (side, module,tower); // E1 might go to another module
1288  } else if (sample == TileID::SAMP_E && m_cablingType == MBTSOnly) {
1290  if (drawer < 0) drawer = module; // special trick for disconnected E3 and E4
1291  } else {
1293  }
1294 
1295  return m_tileHWID->frag(ros, drawer);
1296 }
1297 
1298 int
1300 {
1301  int ros = m_tileHWID->ros (hwid);
1302  int drawer = m_tileHWID->drawer (hwid);
1303 
1304  return m_tileHWID->frag(ros, drawer);
1305 }
1306 
1307 int
1308 TileCablingService::frag2channels ( const HWIdentifier & hwid, std::vector<HWIdentifier> & ids) const
1309 {
1310  ids.clear();
1311  ids.reserve(m_maxChannels);
1312 
1313  int channel = 0;
1314  for ( ; channel < m_maxChannels; ++channel) {
1315  ids.push_back(m_tileHWID->channel_id(hwid, channel));
1316  }
1317 
1318  return channel;
1319 }
1320 
1321 int
1322 TileCablingService::frag2channels ( int frag, std::vector<HWIdentifier> & ids) const
1323 {
1325 }
1326 
1327 //
1328 // All static methods for mapping between TileID and TileHWID
1329 //
1330 
1331 int
1333 {
1334  int section;
1335 
1336  if (ros > 2) { // extended barrel ROS
1337 
1338  // move cells D4, C10 and gap scin to gap section
1339  if (channel < 6 || channel == 12 || channel == 13)
1341  else
1343  }
1344  else {
1346  }
1347 
1348  return section;
1349 }
1350 
1351 int
1353 {
1354  int side;
1355 
1356  if (channel == 0 && ( ros == LBA || ros == LBC)) { // put both PMTs of cell D0 in positive side
1357 
1359 
1360  } else {
1361 
1362  if ( ros & 1 ) { // odd crates are in positive side
1364  } else {
1366  }
1367 
1368  // at the testbeam "A" and "C" sides have opposite meaning
1369  if (m_testBeam) {
1371  else if ( TileID::POSITIVE == side ) side = TileID::NEGATIVE;
1372  }
1373  }
1374 
1375  return side;
1376 }
1377 
1378 int
1380 {
1381  return drawer;
1382 }
1383 
1384 int
1386 {
1387  int twr[96] = {
1388  0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2,
1389  2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 5,
1390  4, 4, 5, 5, 5, 6, -1, -1, 6, 6, 6, 7,
1391  8, 8, 7, 7, 7, 6, 8, -1, 6, 9, 9, 8,
1392 
1393  15, 13, 8, 8, 9, 9, 11, 11, 10, 10, 12, 12,
1394  11, 10, 11, 11, 10, 10, -1, -1, 13, 13, 12, 12,
1395  -1, -1, -1, -1, -1, -1, 13, 14, 14, -1, -1, 13,
1396  14, 12, 12, 14, 15, 15, -1, -1, -1, -1, -1, -1 };
1397 
1398  if (ros > 2) {
1399  channel += 48; // extended barrel
1400  twr[48+m_E1chan] = 10; // old and new simulation has different numbers here
1401  twr[48+m_E2chan] = 11;
1402  twr[48+m_E3chan] = 13;
1403  twr[48+m_E4chan] = 15;
1404  }
1405  int tower = twr[channel];
1406 
1407  return tower;
1408 }
1409 
1410 int
1412 
1413  if (channel >= 0) {
1414  if (ros > 2) channel += m_maxChannels; // extended barrel
1415 
1416  if ((unsigned int) channel < m_ch2towerUpgradeABC.size()) {
1417  return m_ch2towerUpgradeABC[channel];
1418  }
1419  }
1420 
1421  return -1;
1422 }
1423 
1424 
1425 int
1427 {
1428  int smp[96] = {
1429  2, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 1,
1430  1, 2, 2, 0, 1, 1, 0, 0, 0, 1, 1, 0,
1431  2, 2, 0, 1, 1, 0, -1, -1, 0, 1, 1, 0,
1432  0, 0, 0, 1, 1, 2, 1, -1, 2, 0, 0, 1,
1433 
1434  3, 3, 2, 2, 1, 1, 0, 0, 1, 1, 0, 0,
1435  3, 3, 1, 1, 2, 2, -1, -1, 0, 0, 1, 1,
1436  -1, -1, -1, -1, -1, -1, 1, 0, 0, -1, -1, 1,
1437  1, 2, 2, 1, 0, 0, -1, -1, -1, -1, -1, 4 }; // last one is MBTS
1438 
1439  if (ros > 2) channel += 48; // extended barrel
1440  int sample = smp[channel];
1441 
1442  return sample;
1443 }
1444 
1445 int
1447 
1448  if (channel >= 0) {
1449  if (ros > 2) channel += m_maxChannels; // extended barrel
1450 
1451  if ((unsigned int) channel < m_ch2towerUpgradeABC.size()) {
1453  }
1454  }
1455 
1456  return -1;
1457 }
1458 
1459 
1460 void
1462 {
1463  // mapping from module (offline id) to drawer (onile id)
1464  // for gap and crack scintillators E1-E4
1465  // 0 - means "no shift", drawer = module
1466  // +/-1 - shift by one module: drawer = module +/- 1
1467  // NC - not connected
1468  // note: module number in offline identifer is in range 0-63
1469  // and in most of the cases is equal to drawer number
1470  const int NC = 65;
1471  // PB - possibly broken E3, but for the moment assume that this channel is still alive
1472  const int PB = 0;
1473 
1474  int tmp_drawer[512] = {
1475  //Part EBA
1476  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1477  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1478  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,PB, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0,
1479  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0,
1480  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1481  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1482  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1483  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,-1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1484 
1485  //Part EBC
1486  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1487  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1488  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1489  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1490  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1491  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,+1, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1492  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0,
1493  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0
1494  };
1495 
1496  // mapping from module (offline id) to channel (onile id)
1497  // for gap and crack scintillators E1-E4
1498  // 0 - means "no shift", i.e. E1 in channel 12 E2 in channel 13, E3 in channel 0, E4 in channel 1
1499  // SH - shift by one channel for E3, i.e. E3 is in channel 1 instead of channel 0
1500  // NC - not connected
1501  const int SH = 1;
1502  int tmp_channel[512] = {
1503  //Part EBA
1504  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1505  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1506  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,PB, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0,
1507  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0,
1508  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1509  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1510  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1511  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,SH, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1512 
1513  //Part EBC
1514  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1515  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1516  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1517  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1518  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1519  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,SH, 0, 0, 0,NC,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1520  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0,
1521  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,NC,NC, 0, 0,NC, 0, 0, 0, 0, 0, 0, 0, 0, 0
1522  };
1523 
1524  //Now in tables like m_[drawer]_table are not shifts - there are real numbers of [drawers]
1525  for (int i = 0; i < 512; i++) {
1526  if (tmp_drawer[i] != NC) {
1527  m_drawer_table[i] = ((i%256)/4) + tmp_drawer[i];
1528  int channel_number;
1529  switch (i%4) {
1530  case 0: case 1: channel_number = i%4 + 12; break;
1531  default: channel_number = i%4 - 2;
1532  }
1533  m_channel_table[i] = channel_number + tmp_channel[i];
1534  } else
1535  m_drawer_table[i] = m_channel_table[i] = -1;
1536  }
1537 
1538 
1539  //Printing for test
1540  /*
1541  std::cout << " drawer table " << std::endl;
1542 
1543  for (int i = 0; i < 128; ++i) {
1544  for (int j = 0; j < 4; j++) {
1545  std::cout << m_drawer_table[i<<2|j] << " ";
1546  }
1547  std::cout << std::endl;
1548  }
1549 
1550  std::cout << " channel table " << std::endl;
1551 
1552  for (int i = 0; i < 128; ++i) {
1553  for (int j = 0; j < 4; j++) {
1554  std::cout << m_channel_table[i<<2|j] << " ";
1555  }
1556  std::cout << std::endl;
1557  }
1558  */
1559 
1560 
1561  for (int i = 0; i < 512; i++) m_module_table[i] = m_tower_table[i] = -1;
1562 
1563  for (int side = 0; side < 2; side++) {
1564  for (int module_count = 0; module_count < 64; module_count++ ) {
1565  for (int tower_count = 0; tower_count < 4; tower_count++) {
1566  int drawer_number = m_drawer_table[(side<<8)|(module_count<<2)|(tower_count)];
1567  int channel_number = m_channel_table[(side<<8)|(module_count<<2)|(tower_count)];
1568 
1569  //Here I have drawer number and channel number
1570  if ((channel_number == 12)||(channel_number == 13)||(channel_number == 0)||(channel_number == 1)){
1571  int tower_number;
1572  switch (tower_count) {
1573  case 2: tower_number = 13; break;
1574  case 3: tower_number = 15; break;
1575  default: tower_number = tower_count + 10;
1576  }
1577  int channel_count;
1578  switch (channel_number) {
1579  case 12: case 13: channel_count = channel_number - 12; break;
1580  default: channel_count = channel_number + 2;
1581  }
1582  //Here I have coordinates in table of drawer and channel
1583  int index = (side<<8)|(drawer_number<<2)|(channel_count);
1584  m_module_table[index] = module_count;
1585  m_tower_table[index] = tower_number;
1586 
1587 /* std::cout << "m_module_table[(side<<8)|(drawer_number<<2)|(channel_count)] " << m_module_table[index] <<
1588  " m_tower_table[(side<<8)|(drawer_number<<2)|(channel_count)] " << m_tower_table[index] <<
1589  " index " << index << std::endl;
1590 */
1591  //std::cout << "module_count " << module_count << " tower_number " << tower_number << " : side " << side << " tower_count " << tower_count << std::endl;
1592  }
1593  }
1594  }
1595  }
1596 /*
1597  //Printing for test
1598  std::cout << " module table " << std::endl;
1599  for (int i = 0; i < 128; ++i) {
1600  for (int j = 0; j < 4; j++) {
1601  std::cout << m_module_table[i<<2|j] << " ";
1602  }
1603  std::cout << std::endl;
1604  }
1605 
1606  std::cout << " tower table " << std::endl;
1607  for (int i = 0; i < 128; ++i) {
1608  for (int j = 0; j < 4; j++) {
1609  std::cout << m_tower_table[i<<2|j] << " ";
1610  }
1611  std::cout << std::endl;
1612  }
1613 */
1614 }
1615 
1616 // Layout of gap/crack scintillators:
1617 //
1618 // E1: cell = 0, tower = 10, channel = 12
1619 // E2: cell = 1, tower = 11, channel = 13
1620 // E3: cell = 2, tower = 13, channel = 0
1621 // E4: cell = 3, tower = 15, channel = 1
1622 
1623 int
1625 {
1626  // merged E1 cells in EBA and EBC
1627  // module 07,08 -> 07 (i.e. drawer 07 to drawer 06) --
1628  // module 24,25 -> 25 (i.e. drawer 23 to drawer 24) ++
1629  // module 43,44 -> 44 (i.e. drawer 42 to drawer 43) ++
1630  // module 53,54 -> 53 (i.e. drawer 53 to drawer 52) --
1631  //
1632  // merged cells in EBC only
1633  // module 28,29 -> 28 (i.e. drawer 28 to drawer 27) --
1634  // module 31,32 -> 31 (i.e. drawer 31 to drawer 30) --
1635  // module 34,35 -> 35 (i.e. drawer 33 to drawer 34) ++
1636  // module 37,38 -> 38 (i.e. drawer 36 to drawer 37) ++
1637 
1638  // additional merged E1 cells in 2018
1639 
1640  // both EBA and EBC
1641  // module 03,04 -> 04 (i.e. drawer 02 to drawer 03) ++
1642  // module 46,47 -> 47 (i.e. drawer 45 to drawer 46) ++
1643  // module 59,60 -> 60 (i.e. drawer 58 to drawer 59) ++
1644 
1645  // EBA only
1646  // module 20,21 -> 21 (i.e. drawer 19 to drawer 20) ++
1647 
1648  // EBC only
1649  // module 18,19 -> 18 (i.e. drawer 18 to drawer 17) --
1650 
1651  int drawer = module;
1652 
1653  const int towerE1 = (m_cablingType != UpgradeABC) ? 10 : 42;
1654 
1655  if (tower == towerE1) {
1656  if (drawer == 7 || drawer == 53) --drawer;
1657  else if (drawer == 42 || drawer == 23) ++drawer;
1658  else if (m_run2 && side < 0) {
1659  if (drawer == 28 || drawer == 31) --drawer;
1660  else if (drawer == 33 || drawer == 36) ++drawer;
1661  }
1662 
1665  if (drawer == 2 || drawer == 45 || drawer == 58 ) ++drawer;
1666  else {
1667  if (side > 0) {
1668  if (drawer == 19 ) ++drawer;
1669  } else {
1670  if (drawer == 18 ) --drawer;
1671  }
1672  }
1673  }
1674  }
1675 
1676  return drawer;
1677 }
1678 
1679 
1680 
1681 int
1683 {
1684  side = (side == TileID::POSITIVE) ? 0 : 1;
1685  int cell;
1686  switch (tower){
1687  case 15: cell=3; break;
1688  case 13: cell=2; break;
1689  case 11: cell=1; break;
1690  default: cell=0;
1691  }
1692  int p = (side<<8)|(module<<2)|cell;
1693  return m_drawer_table[p];
1694 }
1695 
1696 int
1698 {
1699  side = (side == TileID::POSITIVE) ? 0 : 1;
1700  int cell;
1701  switch (tower){
1702  case 15: cell=3; break;
1703  case 13: cell=2; break;
1704  case 11: cell=1; break;
1705  default: cell=0;
1706  }
1707  int p = (side<<8)|(module<<2)|cell;
1708  return m_channel_table[p];
1709 }
1710 
1711 int
1713 {
1714  int side = (ros < 4) ? 0 : 1; // set side to 1 for ROS=4 which is EBC (negative side)
1715  int cell;
1716  switch (channel) {
1717  case 1: cell=3; break;
1718  case 0: cell=2; break;
1719  case 13: cell=1; break;
1720  default: cell=0;
1721  }
1722  int p = (side<<8)|(drawer<<2)|cell;
1723  return m_module_table[p];
1724 }
1725 
1726 int
1728 {
1729  int side = (ros < 4) ? 0 : 1; // set side to 1 for ROS=4 which is EBC (negative side)
1730  int cell;
1731  switch (channel) {
1732  case 1: cell=3; break;
1733  case 0: cell=2; break;
1734  case 13: cell=1; break;
1735  default: cell=0;
1736  }
1737  int p = (side<<8)|(drawer<<2)|cell;
1738  return m_tower_table[p];
1739 }
1740 
1741 //
1742 // This method tells us which ITC cells and gap/crack scintillators
1743 // are really connected
1744 //
1745 // It returns false for 36 disconnected crack scintillators, for 2 non-existing D4
1746 // and for 16 special C10 (where 1 out of 2 channels is disconnected)
1747 //
1748 bool
1750 {
1751  if (m_tileID->is_tile_gap(id)) { // ITC of gap/crack scin
1752  switch (m_tileID->sample(id)) {
1753 
1754  case TileID::SAMP_C: // cell C10
1755  return C10_connected(m_tileID->module(id));
1756 
1757  case TileID::SAMP_D: // cell D4 - return false for EBA15 and EBC18
1758  return !(EB_special(((m_tileID->side(id)>0)?EBA:EBC),m_tileID->module(id)));
1759 
1760  case TileID::SAMP_E: // E1-E4 - gap/crack scin
1761  return (m_run2plus || swid2channel_gapscin(m_tileID->side(id),
1762  m_tileID->module(id),
1763  m_tileID->tower(id)) != -1);
1764  default:
1765  return false; // other samples do not exist
1766  }
1767  }
1768  return true; // true for all normal cells in barrel and extended barrel
1769 }
1770 
1771 bool
1773 {
1774  const bool C = true;
1775  const bool NC = false;
1776 
1777  bool cell_present[64] = { // counting from 1 in comments
1778  C, C, C, C, C, C, C, C, // 1-8
1779  C, C, C, C, C, C, C, C, // 9-16
1780  C, C, C, C, C, C, C, C, // 17-24
1781  C, C, C, C, C, C, C, C, // 25-32
1782  C, C, C, C, C, C,NC,NC, // 33-40 39-40 do not exist
1783  NC,NC, C, C, C, C, C, C, // 41-48 41-42 do not exist
1784  C, C, C, C, C, C,NC,NC, // 49-56 55-56 do not exist
1785  NC,NC, C, C, C, C, C, C // 57-64 57-58 do not exist
1786  };
1787 
1788  return cell_present[module];
1789 }
1790 
1791 int
1793 {
1794  int pm[96] = {
1795  0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
1796  0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
1797  0, 1, 0, 1, 0, 1, -1, -1, 0, 1, 0, 1,
1798  0, 1, 0, 1, 0, 1, 0, -1, 0, 1, 0, 1,
1799 
1800  0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
1801  0, 0, 0, 1, 0, 1, -1, -1, 0, 1, 0, 1,
1802  -1, -1, -1, -1, -1, -1, 0, 0, 1, -1, -1, 1,
1803  1, 1, 0, 0, 1, 0, -1, -1, -1, -1, -1, -1 };
1804 
1805  int pmt;
1806 
1807  // in gap scintillators there is only one pmt per cell
1808  if ( ros > 2 && (channel == m_E1chan || channel == m_E2chan || channel == m_E3chan || channel == m_E4chan) ) {
1809  pmt = 0;
1810 
1811  } else {
1812 
1813  if (ros > 2) channel += 48; // extended barrel
1814 
1815  pmt = pm[channel];
1816 
1817  // mirroring of odd/even numbers in negative side
1818  // (central symmetry of neg/pos drawers)
1819  if ( (pmt != -1 && TileID::NEGATIVE == hwid2side(ros,channel)) || ((channel==0 && ros==((m_testBeam)?LBA:LBC))))
1820  pmt = 1 - pmt;
1821  }
1822 
1823  return pmt;
1824 }
1825 
1826 int
1828 
1829  int pmt(-1);
1830 
1831  if (channel >= 0) {
1832  if (ros > 2) channel += m_maxChannels; // extended barrel
1833 
1834  if ((unsigned int) channel < m_ch2pmtUpgradeABC.size()) {
1836 
1837  // mirroring of odd/even numbers in negative side
1838  if ((pmt >= 0 && hwid2side(ros, channel) == TileID::NEGATIVE
1840  || (channel == 0 && ros == LBC)) {
1841  pmt = 1 - pmt;
1842  }
1843  }
1844  }
1845 
1846  return pmt;
1847 }
1848 
1849 
1850 int
1852 {
1853  // odd crates are in positive side
1854  int ros = ( TileID::POSITIVE == side ) ? 1 : 2;
1855 
1856  // at the testbeam "A" and "C" sides have opposite meaning
1857  if (m_testBeam)
1858  // even crates are in positive side
1859  ros = ( TileID::POSITIVE == side ) ? 2 : 1;
1860 
1861  // another crate for extended barrel and gap section
1862  if ( TileID::BARREL != section ) ros += 2;
1863 
1864  return ros;
1865 }
1866 
1867 int
1869 {
1870  return module;
1871 }
1872 
1873 int
1874 TileCablingService::swid2channel( int section, int side, int tower, int sample, int pmt) const
1875 {
1876  // 3 samplings * 2 pmt * 16 towers in barrel and ext barrel ITC
1877  // and 2 pmt * 16 towers for scintillators from gap section (samp=3)
1878  // pmt=m_maxChannels for D0/down means that this pmt belongs to another drawer
1879  // this exeption should be treated correctly in calling routine
1880 
1881  int cell[128] = {
1882  //-------------barrel--------------// //-extended barrel-//
1883  4, 8, 10, 18, 20, 26, 32, 38, 36, 46, -1, 6, 10, 20, 31, 41, // sampling A
1884  1, 5, 9, 15, 19, 23, 29, 35, 37, 45, -1, 7, 11, 21, 32, 40, // sampling A
1885 
1886  //-----------barrel------------// ITC //-extended barrel-//
1887  2, 6, 12, 16, 22, 28, 34, 40, 42, 4, 8, 14, 22, 30, 39, -1, // sampling BC
1888  3, 7, 11, 17, 21, 27, 33, 39, 47, 5, 9, 15, 23, 35, 36, -1, // sampling BC
1889 
1890  //-------barrel--------// ITC /extended barrel/
1891  0, -1, 14, -1, 24, -1, 44, -1, 2, -1, 16, -1, 38, -1, -1, -1, // sampling D
1892  m_maxChannels, -1, 13, -1, 25, -1, 41, -1, 3, -1, 17, -1, 37, -1, -1, -1, // sampling D
1893 
1894  //-----gap scin-----//
1895  -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, m_E1chan, m_E2chan, -1, m_E3chan, -1, m_E4chan, // gap scin
1896  -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 };// pmt=1 doesn't exist
1897 
1898  // preserve pmt number for gap scintillators (only pmt=0 exists)
1899  if ( sample != TileID::SAMP_E || section != TileID::GAPDET ) {
1900 
1901  // mirroring of odd/even numbers in negative side
1902  if (TileID::NEGATIVE == side) pmt = 1 - pmt;
1903  }
1904 
1905  int channel = cell[(sample << 5) | (pmt << 4) | tower];
1906 
1907  return channel;
1908 }
1909 
1910 int
1912 {
1913 
1914  int channel(-1);
1915 
1916  if (sample == TileID::SAMP_A) {
1917  int offset = (48 * (1 + (tower % 4)));
1919  } else if (sample == TileID::SAMP_B) {
1920  if (((tower - 2) % 4) == 0) {
1921  int offset = (section == TileID::BARREL) ? 48 : 0;
1922  channel = offset + swid2channel( section, side, (tower - 2) / 4, TileID::SAMP_B, pmt);
1923  }
1924  } else if (sample == TileID::SAMP_D) {
1925  if ((tower % 8) == 0)
1926  channel = swid2channel( section, side, tower / 4, TileID::SAMP_D, pmt);
1927  } else if (sample == TileID::SAMP_X) { // sample C in upgrade
1928  if (((tower - 2) % 4) == 0)
1929  channel = 96 + swid2channel( section, side, (tower - 2) / 4, TileID::SAMP_BC, pmt);
1930  } else {
1931  channel = swid2channel( section, side, tower / 4, sample, pmt);
1932  }
1933 
1934  return channel;
1935 }
1936 
1937 
1938 int
1940 {
1941  // negative means not connected !
1942 
1943  int pos[96] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
1944  13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
1945  27, 26, 25, 30, 29, 28,-33,-32, 31, 36, 35, 34,
1946  39, 38, 37, 42, 41, 40, 45,-44, 43, 48, 47, 46,
1947 
1948  1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
1949  13, 14, 15, 16, 17, 18,-19,-20, 21, 22, 23, 24,
1950  -27,-26,-25,-31,-32,-28, 33, 29, 30,-36,-35, 34,
1951  44, 38, 37, 43, 42, 41,-45,-39,-40,-48,-47,-46 };
1952 
1953  if (ros > 2) channel += 48; // extended barrel
1954  int hole = pos[channel];
1955  // FIXME:: need to do something for special modules EBA15 and EBC18
1956  // the hole numbers -18 and -19 are not expected numbers for gap scin
1957  return hole;
1958 }
1959 
1960 int
1962 {
1963  // negative means not connected !
1964 
1965  int ind[96] = {
1966  0, 1, 2, 2, 1, 3, 4, 4, 3, 5, 5, 6,
1967  6, 7, 7, 8, 9, 9, 8, 10, 10, 11, 11, 12,
1968  13, 13, 12, 14, 14, 15, -1, -1, 15, 16, 16, 17,
1969  18, 18, 17, 19, 19, 20, 21, -1, 20, 22, 22, 21,
1970 
1971  1, 2, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
1972  3, 4, 10, 10, 11, 11, -1, -1, 12, 12, 13, 13,
1973  -1, -1, -1, -1, -1, -1, 14, 15, 15, -1, -1, 14,
1974  16, 17, 17, 16, 18, 18, -1, -1, -1, -1, -1, -1
1975  };
1976 
1977  if (ros > 2) channel += 48; // extended barrel
1978  int index = ind[channel];
1979 
1980  return index;
1981 }
1982 //label
1983 //
1984 // create cabling for very few ancillary detectors at the testbeam
1985 // complete mapping will be loaded from database
1986 //
1987 
1988 int
1990 {
1991  // input: drawer
1992  //
1993  // #define BEAM_TDC_FRAG 0x000
1994  // #define BEAM_ADC_FRAG 0x001
1995  // #define MUON_ADC_FRAG 0x002
1996  // #define ADDR_ADC_FRAG 0x003
1997  // #define LASE_PTN_FRAG 0x004
1998  // #define LASE_ADC_FRAG 0x005
1999  // #define ADD_FADC_FRAG 0x006
2000  // #define ECAL_ADC_FRAG 0x007
2001  //
2002  static const int tbtype[8] = {
2011  };
2012 
2013  if (drawer<8) return tbtype[drawer];
2014  else return TileTBID::INT_TYPE;
2015 }
2016 
2017 int
2018 TileCablingService::hwid2tbmodule ( int drawer, int /* channel */ )
2019 {
2020  static const int tbmodule[8] = {
2021  0,
2024  0,
2025  0,
2026  0,
2027  0,
2029  };
2030 
2031  if (drawer<8) return tbmodule[drawer];
2032  else return 0;
2033 }
2034 
2035 int
2037 {
2038  return channel;
2039 }
2040 
2041 int
2042 TileCablingService::tbid2drawer ( int /* tbtype */, int tbmodule )
2043 {
2044  switch (tbmodule) {
2045  case TileTBID::CRACK_WALL: return 1;
2046  case TileTBID::BACK_WALL: return 2;
2047  case TileTBID::PHANTOM_CALO: return 7;
2048  default: return 0xFF;
2049  }
2050 }
2051 
2052 int
2053 TileCablingService::tbid2channel ( int /* drawer */, int tbchannel )
2054 {
2055  return tbchannel;
2056 }
2057 
2058 //
2059 // Next 6 methods provide FAKE cabling for MBTS
2060 // MBTS is connected to last (47) channel in every 4th drawer
2061 // used in simulation only
2062 //
2063 bool
2065 {
2066  return ((ros > 2) && (channel == 47) && (drawer%4 == 0)); // fake cabling, last channel in every 4th drawer
2067 }
2068 
2069 int
2070 TileCablingService::hwid2MBTSphi(int drawer, int /* channel */) const
2071 {
2072  return (drawer/8);
2073 }
2074 
2075 int
2076 TileCablingService::hwid2MBTSeta(int drawer, int /* channel */) const
2077 {
2078  return ((drawer%8)/4);
2079 }
2080 
2081 int
2083 {
2084  return (phi*8 + eta*4); // fake cabling, every 4th drawer
2085 }
2086 
2087 //
2088 // Next 4 methods provide REAL cabling for MBTS
2089 // used for reconstruction of real data
2090 //
2091 bool
2093 {
2094  return ((ros > 2) && (channel == 0) && hwid2MBTSeta_real(ros,drawer,channel) != -1);
2095 }
2096 
2097 int
2098 TileCablingService::hwid2MBTSphi_real(int /* ros */, int drawer, int /* channel */) const
2099 {
2100  return (drawer/8); // correct formula even for real MBTS (see MBTS2drawer_real below)
2101 }
2102 
2103 int
2104 TileCablingService::hwid2MBTSeta_real(int ros, int drawer, int /* channel */) const
2105 {
2106  int eta[128] = {
2107  // EBA
2108  -1, -1, 1, 0, -1, -1, -1, -1,
2109  -1, -1, -1, 1, 0, -1, -1, -1,
2110  -1, -1, -1, -1, -1, -1, 1, 0,
2111  -1, -1, -1, -1, -1, 1, 0, -1,
2112  -1, -1, 1, 0, -1, -1, -1, -1,
2113  -1, -1, -1, 0, 1, -1, -1, -1,
2114  -1, -1, -1, -1, 0, 1, -1, -1,
2115  -1, -1, -1, 1, 0, -1, -1, -1,
2116  // EBC
2117  -1, -1, -1, 1, 0, -1, -1, -1,
2118  -1, -1, -1, 1, 0, -1, -1, -1,
2119  -1, -1, 1, 0, -1, -1, -1, -1,
2120  -1, -1, 1, 0, -1, -1, -1, -1,
2121  -1, -1, -1, 1, 0, -1, -1, -1,
2122  -1, -1, -1, 1, 0, -1, -1, -1,
2123  -1, -1, -1, -1, -1, 1, 0, -1,
2124  -1, -1, -1, -1, 1, 0, -1, -1
2125  };
2126  // no protection against wrong numbers
2127  // assume that ROS can be only 3 or 4
2128  if (ros == EBC) drawer += 64; // negative extended barrel, ROS=4
2129  return eta[drawer];
2130 }
2131 
2132 int
2134 {
2135  int drawer[32] = {
2136  //part EBA
2137  3, 12, 23, 30, 35, 43, 52, 60, //E6
2138  2, 11, 22, 29, 34, 44, 53, 59, //E5
2139  //part EBC
2140  4, 12, 19, 27, 36, 44, 54, 61, //E6
2141  3, 11, 18, 26, 35, 43, 53, 60 };//E5
2142 
2143  int side = (ros == 3) ? 0 : 1;
2144 
2145  return (drawer[(side<<4)|(eta<<3)|phi]);
2146 }
2147 
2148 //
2149 // Next 5 methods provide RUN2 cabling for MBTS
2150 // used for reconstruction of real data
2151 //
2152 bool
2154 {
2155  return ( (ros > 2) &&
2156  ( (channel == 4 && hwid2MBTSeta_run2plus(ros,drawer) == 0) ||
2157  (channel == 12 && hwid2MBTSeta_run2plus(ros,drawer) == 1) ) );
2158 }
2159 
2160 bool
2162 {
2163  return ((ros > 2) && hwid2MBTSeta_run2plus(ros,drawer) != -1);
2164 }
2165 
2166 bool
2168 {
2169  return ((ros > 3) && (channel == 12) && hwid2E4preta_run2(drawer) != -1);
2170 }
2171 
2172 bool
2174 {
2175  return ((ros > 3) && hwid2E4preta_run2(drawer) != -1);
2176 }
2177 
2178 
2179 /*
2180 
2181 E4' cabling for run2
2182 
2183 modules 29,32,34,37
2184 drawers 28,31,33,36
2185 
2186 MBTS cabling for RUN2
2187 (in the table drawer = module-1)
2188 
2189 Outer MBTS (eta=1)
2190 =========================
2191  phi | connected to
2192  pos | module/drawer
2193 ==========|==============
2194  04+12 0 | 08 07
2195  20+28 2 | 24 23
2196  36+44 4 | 43 42
2197  52+60 6 | 54 53
2198 
2199 
2200 Inner MBTS (eta=0)
2201 ======================
2202  phi | connected to
2203  pos | module/drawer
2204 =======|==============
2205  04 0 | 57 56
2206  12 1 | 58 57
2207  20 2 | 39 38
2208  28 3 | 40 39
2209  36 4 | 41 40
2210  44 5 | 42 41
2211  52 6 | 55 54
2212  60 7 | 56 55
2213 
2214 Outer MBTS (eta=1) in 2018
2215 ======================
2216  phi | connected to
2217  pos | module/drawer
2218 =======|==============
2219  04 0 | 03 02
2220  12 1 | 08 07
2221  20 2 | 20(19) 19(18) EBA(EBC)
2222  28 3 | 24 23
2223  36 4 | 43 42
2224  44 5 | 46 45
2225  52 6 | 54 53
2226  60 7 | 59 58
2227 
2228 */
2229 
2230 int
2232 {
2233  int phi[64] = {
2234  -1, -1, -1, -1, -1, -1, -1, 0,
2235  -1, -1, -1, -1, -1, -1, -1, -1,
2236  -1, -1, -1, -1, -1, -1, -1, 2,
2237  -1, -1, -1, -1, -1, -1, -1, -1,
2238  -1, -1, -1, -1, -1, -1, 2, 3,
2239  4, 5, 4, -1, -1, -1, -1, -1,
2240  -1, -1, -1, -1, -1, 6, 6, 7,
2241  0, 1, -1, -1, -1, -1, -1, -1
2242  };
2243 
2244  int phiA[64] = {
2245  -1, -1, 0, -1, -1, -1, -1, 1,
2246  -1, -1, -1, -1, -1, -1, -1, -1,
2247  -1, -1, -1, 2, -1, -1, -1, 3,
2248  -1, -1, -1, -1, -1, -1, -1, -1,
2249  -1, -1, -1, -1, -1, -1, 2, 3,
2250  4, 5, 4, -1, -1, 5, -1, -1,
2251  -1, -1, -1, -1, -1, 6, 6, 7,
2252  0, 1, 7, -1, -1, -1, -1, -1
2253  };
2254 
2255  int phiC[64] = {
2256  -1, -1, 0, -1, -1, -1, -1, 1,
2257  -1, -1, -1, -1, -1, -1, -1, -1,
2258  -1, -1, 2, -1, -1, -1, -1, 3,
2259  -1, -1, -1, -1, -1, -1, -1, -1,
2260  -1, -1, -1, -1, -1, -1, 2, 3,
2261  4, 5, 4, -1, -1, 5, -1, -1,
2262  -1, -1, -1, -1, -1, 6, 6, 7,
2263  0, 1, 7, -1, -1, -1, -1, -1
2264  };
2265 
2268  return (ros<4)?phiA[drawer]:phiC[drawer];
2269  } else {
2270  return phi[drawer];
2271  }
2272 }
2273 
2274 int
2276 {
2277  int eta[64] = {
2278  -1, -1, -1, -1, -1, -1, -1, 1,
2279  -1, -1, -1, -1, -1, -1, -1, -1,
2280  -1, -1, -1, -1, -1, -1, -1, 1,
2281  -1, -1, -1, -1, -1, -1, -1, -1,
2282  -1, -1, -1, -1, -1, -1, 0, 0,
2283  0, 0, 1, -1, -1, -1, -1, -1,
2284  -1, -1, -1, -1, -1, 1, 0, 0,
2285  0, 0, -1, -1, -1, -1, -1, -1
2286  };
2287 
2288  int etaA[64] = {
2289  -1, -1, 1, -1, -1, -1, -1, 1,
2290  -1, -1, -1, -1, -1, -1, -1, -1,
2291  -1, -1, -1, 1, -1, -1, -1, 1,
2292  -1, -1, -1, -1, -1, -1, -1, -1,
2293  -1, -1, -1, -1, -1, -1, 0, 0,
2294  0, 0, 1, -1, -1, 1, -1, -1,
2295  -1, -1, -1, -1, -1, 1, 0, 0,
2296  0, 0, 1, -1, -1, -1, -1, -1
2297  };
2298 
2299  int etaC[64] = {
2300  -1, -1, 1, -1, -1, -1, -1, 1,
2301  -1, -1, -1, -1, -1, -1, -1, -1,
2302  -1, -1, 1, -1, -1, -1, -1, 1,
2303  -1, -1, -1, -1, -1, -1, -1, -1,
2304  -1, -1, -1, -1, -1, -1, 0, 0,
2305  0, 0, 1, -1, -1, 1, -1, -1,
2306  -1, -1, -1, -1, -1, 1, 0, 0,
2307  0, 0, 1, -1, -1, -1, -1, -1
2308  };
2309 
2312  return (ros<4)?etaA[drawer]:etaC[drawer];
2313  } else {
2314  return eta[drawer];
2315  }
2316 }
2317 
2318 int
2320 {
2321  int phi[64] = {
2322  -1, -1, -1, -1, -1, -1, -1, -1,
2323  -1, -1, -1, -1, -1, -1, -1, -1,
2324  -1, -1, -1, -1, -1, -1, -1, -1,
2325  -1, -1, -1, -1, 0, -1, -1, 1,
2326  -1, 2, -1, -1, 3, -1, -1, -1,
2327  -1, -1, -1, -1, -1, -1, -1, -1,
2328  -1, -1, -1, -1, -1, -1, -1, -1,
2329  -1, -1, -1, -1, -1, -1, -1, -1
2330  };
2331 
2332  return phi[drawer];
2333 }
2334 
2335 int
2337 {
2338  int eta[64] = {
2339  -1, -1, -1, -1, -1, -1, -1, -1,
2340  -1, -1, -1, -1, -1, -1, -1, -1,
2341  -1, -1, -1, -1, -1, -1, -1, -1,
2342  -1, -1, -1, -1, 2, -1, -1, 2,
2343  -1, 2, -1, -1, 2, -1, -1, -1,
2344  -1, -1, -1, -1, -1, -1, -1, -1,
2345  -1, -1, -1, -1, -1, -1, -1, -1,
2346  -1, -1, -1, -1, -1, -1, -1, -1
2347  };
2348 
2349  return eta[drawer];
2350 }
2351 
2352 int
2354 {
2355  int drawer[24] = {
2356  56, 57, 38, 39, 40, 41, 54, 55, //E6 (inner)
2357  7, 7, 23, 23, 42, 42, 53, 53, //E5 (outer)
2358  28, 31, 33, 36, 28, 31, 33, 36 };//E4'
2359 
2360  int drawerE5A[8] = {2, 7, 19, 23, 42, 45, 53, 58}; //E5 (outer) in EBA in 2018
2361  int drawerE5C[8] = {2, 7, 18, 23, 42, 45, 53, 58}; //E5 (outer) in EBA in 2018
2362 
2364  && eta == 1) {
2365  return (side>0)?drawerE5A[phi]:drawerE5C[phi];
2366  } else {
2367  return (drawer[(eta<<3)|phi]);
2368  }
2369 }
2370 
2371 int
2373 {
2374  return ((eta==0)?4:12); // both MBTS and E4'
2375 }
2376 
2377 unsigned int
2379 {
2380  return m_tileID->is_tile_gapscin(cell_id) ? 1:2;
2381 }
2382 
2383 void
2385 
2386  if (m_isCacheFilled) return;
2387 
2389 
2390  m_ch2cell.resize(nChannels);
2391  m_ch2pmt.resize(nChannels);
2392  m_ch2index.resize(nChannels);
2393 
2394  for (unsigned int ros = 1; ros < TileCalibUtils::MAX_ROS; ++ros) {
2395  for (unsigned int drawer = 0; drawer < TileCalibUtils::MAX_DRAWER; ++drawer) {
2396  for (int channel = 0; channel < m_maxChannels; ++channel) {
2397  int index;
2398  int pmt;
2400  int ind = cacheIndex(ros, drawer, channel);
2401  m_ch2cell[ind] = cell_id;
2402  m_ch2pmt[ind] = pmt;
2403  m_ch2index[ind] = index;
2404  }
2405  }
2406  }
2407  m_isCacheFilled = true;
2408 }
2409 
2410 Identifier
2411 TileCablingService::h2s_cell_id_index ( const HWIdentifier & hwid, int & index, int & pmt ) const
2412 {
2413  int ros = m_tileHWID->ros (hwid);
2414  int drawer = m_tileHWID->drawer (hwid);
2415  int channel = m_tileHWID->channel (hwid);
2416 
2419  } else {
2421  }
2422 }
2423 
2424 Identifier
2426 {
2427 
2430  } else {
2432  }
2433 }
2434 
2435 
2436 Identifier
2438  int & index, int & pmt ) const
2439 {
2440  int ind = cacheIndex(ros, drawer, channel);
2441  index = m_ch2index[ind];
2442  pmt = m_ch2pmt[ind];
2443  return m_ch2cell[ind];
2444 }
2445 
2447  return m_MBTSmergedRun2Plus[module];
2448 }
2449 
2451  return m_E1mergedRun2Plus[(ros - 3) * 64 + module];
2452 }
2453 
2455 
2456  bool isChannelDisconnected(channel2hole(ros, channel) < 0);
2457 
2458  // Modules EBA15 and EBC18 are special
2459  if ((ros == 3 && drawer == 14) || (ros == 4 && drawer == 17)) {
2460  if (channel < 4) {
2461  isChannelDisconnected = true;
2462  } else if (channel == 18 || channel == 19) {
2463  isChannelDisconnected = false;
2464  }
2465  }
2466 
2467  return isChannelDisconnected;
2468 }
TileCablingService::cell2mt_id
Identifier cell2mt_id(const Identifier &id) const
Definition: TileCablingService.cxx:435
TileCablingService::m_TT_ID
const CaloLVL1_ID * m_TT_ID
Definition: TileCablingService.h:181
TileCablingService::RUN3Cabling
@ RUN3Cabling
Definition: TileCablingService.h:91
TileCablingService::h2s_cell_id_index_from_cache
Identifier h2s_cell_id_index_from_cache(int ros, int drawer, int channel, int &index, int &pmt) const
Definition: TileCablingService.cxx:2437
TileCablingService::MBTSOnly
@ MBTSOnly
Definition: TileCablingService.h:87
TileCablingService::m_MBTSchan
int m_MBTSchan
Definition: TileCablingService.h:213
RPDUtils::nChannels
unsigned constexpr int nChannels
Definition: RPDUtils.h:23
TileCablingService::CrackOnly
@ CrackOnly
Definition: TileCablingService.h:86
TileCablingService::m_run2plus
bool m_run2plus
Definition: TileCablingService.h:262
TileTBID::channel_id
Identifier channel_id(int type, int module, int channel) const
identifer for one channel of a Tile testbeam detector
Definition: TileTBID.cxx:198
TileCablingService::TileGap_connected
bool TileGap_connected(const Identifier &id) const
Definition: TileCablingService.cxx:1749
Tile_Base_ID::SAMP_B
@ SAMP_B
Definition: Tile_Base_ID.h:53
TileCablingService::h2s_cell_id_index_find
Identifier h2s_cell_id_index_find(int ros, int drawer, int channel, int &index, int &pmt) const
Definition: TileCablingService.cxx:654
TileCablingService::m_ch2sampleUpgradeABC
std::vector< int > m_ch2sampleUpgradeABC
Definition: TileCablingService.h:258
TileCablingService::m_isCacheFilled
bool m_isCacheFilled
Definition: TileCablingService.h:238
ReadCellNoiseFromCool.cell
cell
Definition: ReadCellNoiseFromCool.py:53
TileCablingService::setTestBeam
void setTestBeam(bool testBeam)
Definition: TileCablingService.cxx:200
plotting.yearwise_efficiency.channel
channel
Definition: yearwise_efficiency.py:24
phi
Scalar phi() const
phi method
Definition: AmgMatrixBasePlugin.h:67
TileTBID::TILE_TESTBEAM
@ TILE_TESTBEAM
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:82
TileCablingService::pmt2tt_id
Identifier pmt2tt_id(const Identifier &id) const
Definition: TileCablingService.cxx:368
TileTBID::TDC_TYPE
@ TDC_TYPE
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:85
TileCablingService::hwid2MBTSconnected
bool hwid2MBTSconnected(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2064
TileCablingService::getInstance
static const TileCablingService * getInstance()
get pointer to service instance
Definition: TileCablingService.cxx:24
TileCablingService::m_maxChannels
int m_maxChannels
Definition: TileCablingService.h:265
TileTBID::INT_TYPE
@ INT_TYPE
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:87
Tile_Base_ID::is_tile_gap
bool is_tile_gap(const Identifier &id) const
Definition: Tile_Base_ID.cxx:227
TileCablingService::hwid2pmt_upgradeABC
int hwid2pmt_upgradeABC(int ros, int channel) const
Definition: TileCablingService.cxx:1827
TileCablingService::setRun2aMerged
void setRun2aMerged()
Definition: TileCablingService.cxx:114
eta
Scalar eta() const
pseudorapidity method
Definition: AmgMatrixBasePlugin.h:83
index
Definition: index.py:1
max
constexpr double max()
Definition: ap_fixedTest.cxx:33
Tile_Base_ID::pmt
int pmt(const Identifier &id) const
Definition: Tile_Base_ID.cxx:184
TileCablingService::m_run2
bool m_run2
Definition: TileCablingService.h:261
TileCablingService::cacheIndex
int cacheIndex(int ros, int drawer, int channel) const
Definition: TileCablingService.h:248
TileCablingService::TestBeam
@ TestBeam
Definition: TileCablingService.h:84
min
constexpr double min()
Definition: ap_fixedTest.cxx:26
Tile_Base_ID::SAMP_A
@ SAMP_A
Definition: Tile_Base_ID.h:52
TileCalibUtils
Static class providing several utility functions and constants.
Definition: TileCalibUtils.h:15
DMTest::C
C_v1 C
Definition: C.h:26
MuonGM::round
float round(const float toRound, const unsigned int decimals)
Definition: Mdt.cxx:27
Tile_Base_ID::SAMP_BC
@ SAMP_BC
Definition: Tile_Base_ID.h:53
Tile_Base_ID::side
int side(const Identifier &id) const
Definition: Tile_Base_ID.cxx:157
TileHWID::BEAM_ROS
@ BEAM_ROS
Definition: TileHWID.h:67
Tile_Base_ID::sample
int sample(const Identifier &id) const
Definition: Tile_Base_ID.cxx:175
TileCablingService::m_tileID
const TileID * m_tileID
Definition: TileCablingService.h:179
TileCablingService::hwid2tower_gapscin
int hwid2tower_gapscin(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:1727
TileCablingService::pmt2mt_id
Identifier pmt2mt_id(const Identifier &id) const
Definition: TileCablingService.cxx:442
TRT_PAI_gasdata::NC
const int NC
Number of levels for Carbon.
Definition: TRT_PAI_gasdata.h:237
TileTBID::PHANTOM_CALO
@ PHANTOM_CALO
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:94
TileCablingService::fillConnectionTables
void fillConnectionTables()
Definition: TileCablingService.cxx:1461
TileHWID::frag
int frag(const HWIdentifier &id) const
extract frag field from HW identifier
Definition: TileHWID.h:181
TileCablingService::isChannelFromOppositeSide
bool isChannelFromOppositeSide(int channel) const
Definition: TileCablingService.h:252
TileCablingService::m_E1mergedRun2Plus
std::vector< int > m_E1mergedRun2Plus
Definition: TileCablingService.h:255
TileCablingService::h2s_cell_id_index
Identifier h2s_cell_id_index(const HWIdentifier &id, int &index, int &pmt) const
Definition: TileCablingService.cxx:2411
Tile_Base_ID::GAPDET
@ GAPDET
Definition: Tile_Base_ID.h:47
TileCalibUtils.h
Tile_Base_ID::tower
int tower(const Identifier &id) const
Definition: Tile_Base_ID.cxx:169
TileCablingService::m_invalid_hwid
HWIdentifier m_invalid_hwid
Definition: TileCablingService.h:177
ReadBchFromCrest.ros
ros
Definition: ReadBchFromCrest.py:73
TileCablingService::m_drawer_table
int m_drawer_table[512]
Definition: TileCablingService.h:231
Tile_Base_ID::SAMP_E
@ SAMP_E
Definition: Tile_Base_ID.h:54
TileTBID::type
int type(const Identifier &id) const
extract type field from TileTB identifier
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:146
TileTBID::ADC_TYPE
@ ADC_TYPE
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:84
HWIdentifier
Definition: HWIdentifier.h:13
Tile_Base_ID::pmt_hash_max
size_type pmt_hash_max() const
Definition: Tile_Base_ID.cxx:1322
TileHWID::HIGHGAIN
@ HIGHGAIN
Definition: TileHWID.h:73
Tile_Base_ID::BARREL
@ BARREL
Definition: Tile_Base_ID.h:47
TileCablingService::hwid2module
static int hwid2module(int drawer)
Definition: TileCablingService.cxx:1379
TileCablingService::RUN2aCabling
@ RUN2aCabling
Definition: TileCablingService.h:90
TileCablingService::fillH2SIdCache
void fillH2SIdCache(void)
Definition: TileCablingService.cxx:2384
TileCablingService::m_ch2pmt
std::vector< int > m_ch2pmt
Definition: TileCablingService.h:240
Example_ReadSampleNoise.drawer
drawer
Definition: Example_ReadSampleNoise.py:39
python.CaloAddPedShiftConfig.type
type
Definition: CaloAddPedShiftConfig.py:42
TileTBID::module
int module(const Identifier &id) const
extract module field from TileTB identifier
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:150
TileHWID::channel
int channel(const HWIdentifier &id) const
extract channel field from HW identifier
Definition: TileHWID.h:189
TileCablingService::EBA
@ EBA
Definition: TileCablingService.h:202
TileCablingService::tbid2drawer
static int tbid2drawer(int tbtype, int tbmodule)
Definition: TileCablingService.cxx:2042
TileCablingService::m_E3special
int m_E3special
Definition: TileCablingService.h:211
TileCalibUtils::MAX_DRAWER
static const unsigned int MAX_DRAWER
Number of drawers in ROS 1-4.
Definition: TileCalibUtils.h:139
TileCablingService::setCablingType
bool setCablingType(TileCablingType type)
Definition: TileCablingService.cxx:226
TileCablingService::hwid2tower
int hwid2tower(int ros, int channel) const
Definition: TileCablingService.cxx:1385
Tile_Base_ID::SAMP_C
@ SAMP_C
Definition: Tile_Base_ID.h:53
TileHWID::ros
int ros(const HWIdentifier &id) const
extract ros field from HW identifier
Definition: TileHWID.h:167
TileCablingService::setConnected
void setConnected(int section, int side, int modMin, int modMax)
Definition: TileCablingService.cxx:332
TileCablingService::m_tileTBID
const TileTBID * m_tileTBID
Definition: TileCablingService.h:182
TileCablingService::swid2drawer
static int swid2drawer(int module)
Definition: TileCablingService.cxx:1868
TRT::Hit::side
@ side
Definition: HitInfo.h:83
TileCablingService::m_ch2pmtUpgradeABC
std::vector< int > m_ch2pmtUpgradeABC
Definition: TileCablingService.h:257
TileCablingService::~TileCablingService
virtual ~TileCablingService()
Definition: TileCablingService.cxx:195
TileCablingService::hwid2MBTSconnected_run2plus
bool hwid2MBTSconnected_run2plus(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2153
TileCablingService::TileCablingService
TileCablingService()
Definition: TileCablingService.cxx:38
TileCablingService::frag
int frag(const HWIdentifier &id) const
Definition: TileCablingService.cxx:1299
TileCablingService::m_tileHWID
const TileHWID * m_tileHWID
Definition: TileCablingService.h:180
TileCablingService::hwid2tower_upgradeABC
int hwid2tower_upgradeABC(int ros, int channel) const
Definition: TileCablingService.cxx:1411
python.PyAthena.module
module
Definition: PyAthena.py:131
Tile_Base_ID::EXTBAR
@ EXTBAR
Definition: Tile_Base_ID.h:47
TileCablingService::m_E3chan
int m_E3chan
Definition: TileCablingService.h:209
TileCablingService::hwid2sample_upgradeABC
int hwid2sample_upgradeABC(int ros, int channel) const
Definition: TileCablingService.cxx:1446
TileCablingService::m_EBCspec
int m_EBCspec
Definition: TileCablingService.h:206
TileCablingService::MBTS2channel_run2plus
int MBTS2channel_run2plus(int eta) const
Definition: TileCablingService.cxx:2372
TileHWID::adc
int adc(const HWIdentifier &id) const
extract adc field from HW identifier
Definition: TileHWID.h:193
TileCablingService::m_testBeam
bool m_testBeam
Definition: TileCablingService.h:189
Tile_Base_ID::get_id
virtual int get_id(const IdentifierHash &hash_id, Identifier &id, const IdContext *context=0) const
create compact id from hash id (return == 0 for OK)
Definition: Tile_Base_ID.cxx:1081
TileCablingService::hwid2MBTSphi
int hwid2MBTSphi(int drawer, int channel) const
Definition: TileCablingService.cxx:2070
Tile_Base_ID::adc
int adc(const Identifier &id) const
Definition: Tile_Base_ID.cxx:190
python.utils.AtlRunQueryDQUtils.p
p
Definition: AtlRunQueryDQUtils.py:209
TileCablingService::h2s_cell_id
Identifier h2s_cell_id(const HWIdentifier &id) const
Definition: TileCablingService.cxx:555
Tile_Base_ID::is_tile_gapscin
bool is_tile_gapscin(const Identifier &id) const
Definition: Tile_Base_ID.cxx:272
TileCablingService::hwid2MBTSeta_run2plus
int hwid2MBTSeta_run2plus(int ros, int drawer) const
Definition: TileCablingService.cxx:2275
TileCablingService::m_run3
bool m_run3
Definition: TileCablingService.h:263
TileCablingService::hwid2MBTSphi_run2plus
int hwid2MBTSphi_run2plus(int ros, int drawer) const
Definition: TileCablingService.cxx:2231
Tile_Base_ID::module
int module(const Identifier &id) const
Definition: Tile_Base_ID.cxx:163
FullCPAlgorithmsTest_eljob.sample
sample
Definition: FullCPAlgorithmsTest_eljob.py:116
TileCablingService.h
lumiFormat.i
int i
Definition: lumiFormat.py:85
TileCablingService::hwid2section
static int hwid2section(int ros, int channel)
Definition: TileCablingService.cxx:1332
TileCablingService::swid2drawer_gapscin
int swid2drawer_gapscin(int side, int module, int tower) const
Definition: TileCablingService.cxx:1682
TileCablingService::hwid2tbchannel
static int hwid2tbchannel(int drawer, int channel)
Definition: TileCablingService.cxx:2036
TileCablingService::h2s_adc_id
Identifier h2s_adc_id(const HWIdentifier &id) const
Definition: TileCablingService.cxx:891
TileCablingService::drawer2MBTS_id
Identifier drawer2MBTS_id(const HWIdentifier &id) const
Definition: TileCablingService.cxx:492
TileCablingService::hwid2E4prphi_run2
int hwid2E4prphi_run2(int drawer) const
Definition: TileCablingService.cxx:2319
TileCablingService::hwid2tbmodule
static int hwid2tbmodule(int drawer, int channel)
Definition: TileCablingService.cxx:2018
TileCablingService::hwid2side
int hwid2side(int ros, int channel) const
Definition: TileCablingService.cxx:1352
TileCablingService::m_maxGains
int m_maxGains
Definition: TileCablingService.h:266
TileCablingService::m_connected
bool m_connected[5][64]
Definition: TileCablingService.h:192
TileCablingService::hwid2MBTSeta_real
int hwid2MBTSeta_real(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2104
Tile_Base_ID::POSITIVE
@ POSITIVE
Definition: Tile_Base_ID.h:55
Tile_Base_ID::adc_hash_max
size_type adc_hash_max() const
Definition: Tile_Base_ID.cxx:1327
TileCablingService::m_module_table
int m_module_table[512]
Definition: TileCablingService.h:233
TileCablingService::MBTS2drawer
int MBTS2drawer(int phi, int eta) const
Definition: TileCablingService.cxx:2082
TileCablingService::hwid2module_gapscin
int hwid2module_gapscin(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:1712
TileCablingService::CrackAndMBTS
@ CrackAndMBTS
Definition: TileCablingService.h:88
TileCablingService::hwid2sample
static int hwid2sample(int ros, int channel)
Definition: TileCablingService.cxx:1426
TileCalibUtils::MAX_ROS
static const unsigned int MAX_ROS
Number of ROSs
Definition: TileCalibUtils.h:138
TileTBID::FADC_TYPE
@ FADC_TYPE
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:86
TileCablingService
Definition: TileCablingService.h:23
TileCablingService::hwid2E4preta_run2
int hwid2E4preta_run2(int drawer) const
Definition: TileCablingService.cxx:2336
TileCablingService::LBC
@ LBC
Definition: TileCablingService.h:201
TileCablingService::s2h_drawer_id
HWIdentifier s2h_drawer_id(const Identifier &id) const
Definition: TileCablingService.cxx:1004
TileTBID::channel
int channel(const Identifier &id) const
extract channel field from TileTB identifier
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:154
TileCablingService::m_ch2towerUpgradeABC
std::vector< int > m_ch2towerUpgradeABC
Definition: TileCablingService.h:259
TileCablingService::swid2channel
int swid2channel(int section, int side, int tower, int sample, int pmt) const
Definition: TileCablingService.cxx:1874
TileCablingService::hwid2E4prconnected_run2
bool hwid2E4prconnected_run2(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2167
TileCablingService::m_MBTSmergedRun2Plus
std::vector< bool > m_MBTSmergedRun2Plus
Definition: TileCablingService.h:252
Tile_Base_ID::adc_id
Identifier adc_id(const Identifier &cell_id, int pmt, int adc) const
Definition: Tile_Base_ID.cxx:806
TileCablingService::m_channel_table
int m_channel_table[512]
Definition: TileCablingService.h:232
TileCablingService::hwid2MBTSeta
int hwid2MBTSeta(int drawer, int channel) const
Definition: TileCablingService.cxx:2076
TileCablingService::setRun3Merged
void setRun3Merged()
Definition: TileCablingService.cxx:156
TileHWID::drawer_id
HWIdentifier drawer_id(int frag) const
ROS HWIdentifer.
Definition: TileHWID.cxx:189
TileCablingService::m_tower_table
int m_tower_table[512]
Definition: TileCablingService.h:234
TileCablingService::m_ch2cell
std::vector< Identifier > m_ch2cell
Definition: TileCablingService.h:239
TileCablingService::is_MBTS_merged_run2plus
bool is_MBTS_merged_run2plus(int module) const
Definition: TileCablingService.cxx:2446
python.subdetectors.mmg.ids
ids
Definition: mmg.py:8
TileCablingService::D4
bool D4(int channel) const
Definition: TileCablingService.h:174
TileHWID::channel_id
HWIdentifier channel_id(int ros, int drawer, int channel) const
channel HWIdentifer
Definition: TileHWID.cxx:201
Tile_Base_ID::NEGATIVE
@ NEGATIVE
Definition: Tile_Base_ID.h:55
TileCablingService::hwid2tbtype
static int hwid2tbtype(int drawer)
Definition: TileCablingService.cxx:1989
TileCablingService::s2h_adc_id
HWIdentifier s2h_adc_id(const Identifier &id) const
Definition: TileCablingService.cxx:1151
TileCablingService::TileCablingType
TileCablingType
Definition: TileCablingService.h:84
TileCablingService::m_E1chan
int m_E1chan
Definition: TileCablingService.h:207
TileCablingService::m_E4special
int m_E4special
Definition: TileCablingService.h:212
TileCablingService::channel2cellindex
static int channel2cellindex(int ros, int channel)
Definition: TileCablingService.cxx:1961
TileCablingService::m_E4chan
int m_E4chan
Definition: TileCablingService.h:210
TileTBID::CRACK_WALL
@ CRACK_WALL
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:93
TileCablingService::hwid2MBTSconnected_real
bool hwid2MBTSconnected_real(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2092
python.LumiBlobConversion.pos
pos
Definition: LumiBlobConversion.py:16
TileTBID::BACK_WALL
@ BACK_WALL
Definition: Calorimeter/CaloIdentifier/CaloIdentifier/TileTBID.h:91
TileCablingService::swid2drawer_gapscin_run2plus
int swid2drawer_gapscin_run2plus(int side, int module, int tower) const
Definition: TileCablingService.cxx:1624
TileCablingService::EB_special
bool EB_special(int ros, int drawer) const
Definition: TileCablingService.h:214
TileCablingService::m_EBAspec
int m_EBAspec
Definition: TileCablingService.h:205
TileHWID::adc_id
HWIdentifier adc_id(int ros, int drawer, int channel, int adc) const
adc HWIdentifer
Definition: TileHWID.cxx:231
Tile_Base_ID::SAMP_D
@ SAMP_D
Definition: Tile_Base_ID.h:54
TileCablingService::UpgradeABC
@ UpgradeABC
Definition: TileCablingService.h:94
DeMoScan.index
string index
Definition: DeMoScan.py:362
TileCablingService::C10_connected
static bool C10_connected(int module)
Definition: TileCablingService.cxx:1772
TileCablingService::isDisconnected
bool isDisconnected(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2454
TileCablingService::hwid2pmt
int hwid2pmt(int ros, int channel) const
Definition: TileCablingService.cxx:1792
TileCablingService::m_cablingType
TileCablingType m_cablingType
Definition: TileCablingService.h:228
TileCablingService::swid2channel_upgradeABC
int swid2channel_upgradeABC(int section, int side, int tower, int sample, int pmt) const
Definition: TileCablingService.cxx:1911
TileHWID::drawer
int drawer(const HWIdentifier &id) const
extract drawer field from HW identifier
Definition: TileHWID.h:171
TileCablingService::EB_special_move_channel
void EB_special_move_channel(int ros, int drawer, int &channel) const
Definition: TileCablingService.h:217
ReadFloatFromCool.adc
adc
Definition: ReadFloatFromCool.py:48
TileCablingService::EBC
@ EBC
Definition: TileCablingService.h:203
Tile_Base_ID::pmt_id
Identifier pmt_id(const Identifier &any_id) const
Definition: Tile_Base_ID.cxx:644
TileCablingService::getNChanPerCell
unsigned int getNChanPerCell(const Identifier &cell_id) const
Definition: TileCablingService.cxx:2378
TileCablingService::channel2hole
static int channel2hole(int ros, int channel)
Definition: TileCablingService.cxx:1939
TileCablingService::OldSim
@ OldSim
Definition: TileCablingService.h:85
TileCablingService::m_E2chan
int m_E2chan
Definition: TileCablingService.h:208
convertTimingResiduals.offset
offset
Definition: convertTimingResiduals.py:71
TileCablingService::m_ch2index
std::vector< int > m_ch2index
Definition: TileCablingService.h:241
ATLAS_NOT_THREAD_SAFE
TileCablingService *TileCablingService::getInstance_nc ATLAS_NOT_THREAD_SAFE()
Install fatal handler with default options.
Definition: TileCablingService.cxx:30
Trk::hole
@ hole
Definition: MeasurementType.h:36
TileCablingService::h2s_pmt_id
Identifier h2s_pmt_id(const HWIdentifier &id) const
Definition: TileCablingService.cxx:784
TileCablingService::isTileGapCrack
bool isTileGapCrack(int channel) const
Definition: TileCablingService.h:173
SH
This module provides a lot of global definitions, forward declarations and includes that are used by ...
Definition: PrunDriver.h:15
Tile_Base_ID::cell_hash
IdentifierHash cell_hash(const Identifier &cell_id) const
fast conversion from ID to hash for cells
Definition: Tile_Base_ID.cxx:1034
TileCablingService::frag2channels
int frag2channels(const HWIdentifier &id, std::vector< HWIdentifier > &ids) const
Definition: TileCablingService.cxx:1308
ATLAS_THREAD_SAFE
#define ATLAS_THREAD_SAFE
Definition: checker_macros.h:211
Tile_Base_ID::section
int section(const Identifier &id) const
Definition: Tile_Base_ID.cxx:151
TileCablingService::setRun2Merged
void setRun2Merged()
Definition: TileCablingService.cxx:82
TileCablingService::RUN2Cabling
@ RUN2Cabling
Definition: TileCablingService.h:89
ReadBchFromCrest.pmt
pmt
Definition: ReadBchFromCrest.py:65
IdentifierHash
This is a "hash" representation of an Identifier. This encodes a 32 bit index which can be used to lo...
Definition: IdentifierHash.h:25
section
void section(const std::string &sec)
Definition: TestTriggerMenuAccess.cxx:22
TBElementID::SH
@ SH
Definition: TBElementID.h:19
TileCablingService::MBTS2drawer_run2plus
int MBTS2drawer_run2plus(int side, int phi, int eta) const
Definition: TileCablingService.cxx:2353
Tile_Base_ID::cell_id
Identifier cell_id(const Identifier &any_id) const
Definition: Tile_Base_ID.cxx:585
TileCablingService::hwid2MBTSphi_real
int hwid2MBTSphi_real(int ros, int drawer, int channel) const
Definition: TileCablingService.cxx:2098
CaloLVL1_ID::tower_id
Identifier tower_id(int pos_neg_z, int sampling, int region, int eta, int phi) const
build a tower identifier
Definition: CaloLVL1_ID.h:429
TileCablingService::LBA
@ LBA
Definition: TileCablingService.h:200
TileCablingService::swid2channel_gapscin
int swid2channel_gapscin(int side, int module, int tower) const
Definition: TileCablingService.cxx:1697
TileCablingService::cell2tt_id
Identifier cell2tt_id(const Identifier &id) const
Definition: TileCablingService.cxx:361
IdContext
This class saves the "context" of an expanded identifier (ExpandedIdentifier) for compact or hash ver...
Definition: IdContext.h:26
TileCablingService::swid2ros
int swid2ros(int section, int side) const
Definition: TileCablingService.cxx:1851
Tile_Base_ID::pmt_context
IdContext pmt_context() const
id for PMTs
Definition: Tile_Base_ID.cxx:1069
TileCablingService::E1_merged_with_run2plus
int E1_merged_with_run2plus(int ros, int module) const
Definition: TileCablingService.cxx:2450
TileCablingService::MBTS2drawer_real
int MBTS2drawer_real(int side, int phi, int eta) const
Definition: TileCablingService.cxx:2133
TileCablingService::tbid2channel
static int tbid2channel(int drawer, int tbchannel)
Definition: TileCablingService.cxx:2053
TileCablingService::m_invalid_id
Identifier m_invalid_id
Definition: TileCablingService.h:176
TileCablingService::s2h_channel_id
HWIdentifier s2h_channel_id(const Identifier &id) const
Definition: TileCablingService.cxx:1069
Tile_Base_ID::SAMP_X
@ SAMP_X
Definition: Tile_Base_ID.h:54
Identifier
Definition: IdentifierFieldParser.cxx:14