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TestVectorTool.cxx
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1 /*
2  Copyright (C) 2002-2025 CERN for the benefit of the ATLAS collaboration
3 */
4 
14 #include <fstream>
15 
17 {
18  ATH_MSG_INFO("Initializing TestVectorTool tool");
19  ATH_CHECK(detStore()->retrieve(m_pixelid, "PixelID"));
20 
21  return StatusCode::SUCCESS;
22 }
23 
24 StatusCode TestVectorTool::prepareTV(const std::string &inputFile, std::vector<uint64_t> &testVector) const
25 {
26  ATH_MSG_DEBUG("Preparing input test vector from " << inputFile);
27 
28  // Check if the input file ends with .txt or .bin
29  if (inputFile.find(".txt") == std::string::npos && inputFile.find(".bin") == std::string::npos)
30  {
31  ATH_MSG_ERROR("Input TV file must be either .txt or .bin");
32  return StatusCode::FAILURE;
33  }
34 
35  // clear the test vector before reading
36  testVector.clear();
37 
38  // if .txt
39  if (inputFile.find(".txt") != std::string::npos)
40  {
41  std::ifstream file(inputFile, std::ios::in);
42  if (!file.is_open())
43  {
44  ATH_MSG_ERROR("Cannot open file " << inputFile);
45  return StatusCode::FAILURE;
46  }
47 
48  uint64_t cache;
49  while (file >> std::hex >> cache)
50  {
51  testVector.push_back(cache);
52  }
53 
54  // close the file
55  file.close();
56  }
57  else
58  {
59  std::ifstream file(inputFile, std::ios::binary);
60  if (!file.is_open())
61  {
62  ATH_MSG_ERROR("Cannot open input TV file " << inputFile);
63  return StatusCode::FAILURE;
64  }
65 
66  uint64_t cache;
67  while (file.read(reinterpret_cast<char *>(&cache), sizeof(uint64_t)))
68  {
69  // Reverse the byte order
70  cache = __builtin_bswap64(cache);
71  testVector.push_back(cache);
72  }
73 
74  // close the file
75  file.close();
76  }
77 
78  return StatusCode::SUCCESS;
79 }
80 
81 StatusCode TestVectorTool::compare(const std::vector<uint64_t> &tv_1, const std::vector<uint64_t> &tv_2) const
82 {
83  ATH_MSG_DEBUG("Comparing two test vectors");
84 
85  std::vector<uint64_t>::size_type size = -1;
86 
87  if (tv_1.size() != tv_2.size())
88  {
89  ATH_MSG_WARNING("The two test vectors have different sizes: " << tv_1.size() << " and " << tv_2.size());
90  // Use the shorter one for comparison
91  size = tv_1.size() < tv_2.size() ? tv_1.size() : tv_2.size();
92  }
93  else
94  {
95  ATH_MSG_DEBUG("The two test vectors have the same size: " << tv_1.size());
96  size = tv_1.size();
97  }
98 
99  bool pass = true;
100  for (std::vector<uint64_t>::size_type i = 0; i < size; i++)
101  {
102  if (tv_1[i] != tv_2[i])
103  {
104  ATH_MSG_DEBUG("The two test vectors are different at index " << i);
105  pass = false;
106  }
107  }
108 
109  if (pass)
110  {
111  ATH_MSG_DEBUG("The two test vectors are the same");
112  }
113  else
114  {
115  ATH_MSG_WARNING("The two test vectors are different!");
116  }
117 
118  return StatusCode::SUCCESS;
119 }
120 
121 StatusCode TestVectorTool::compare(const EFTrackingFPGAIntegration::TVHolder &tvHolder, const std::vector<uint64_t> &tv_comp) const
122 {
123  ATH_MSG_DEBUG("Comparing the FPGA output to the reference vector for " << tvHolder.name);
124 
125  std::vector<uint64_t>::size_type size = -1;
126 
127  if (tvHolder.refTV.size() != tv_comp.size())
128  {
129  ATH_MSG_WARNING("The two test vectors have different sizes: " << tvHolder.refTV.size() << " and " << tv_comp.size());
130  // Use the shorter one for comparison
131  size = tvHolder.refTV.size() < tv_comp.size() ? tvHolder.refTV.size() : tv_comp.size();
132  }
133  else
134  {
135  ATH_MSG_DEBUG("The two test vectors have the same size: " << tvHolder.refTV.size());
136  size = tvHolder.refTV.size();
137  }
138 
139  bool pass = true;
140  for (std::vector<uint64_t>::size_type i = 0; i < size; i++)
141  {
142  if (tvHolder.refTV[i] != tv_comp[i])
143  {
144  ATH_MSG_DEBUG("The two test vectors are different at index " << i);
145  pass = false;
146  }
147  }
148 
149  if (pass)
150  {
151  ATH_MSG_DEBUG(tvHolder.name << " FPGA output matches the reference vector");
152  }
153  else
154  {
155  ATH_MSG_WARNING(tvHolder.name << " FPGA output does not match the reference vector");
156  }
157 
158  return StatusCode::SUCCESS;
159 }
160 
161 StatusCode TestVectorTool::encodePixelL2G(const xAOD::PixelClusterContainer *pixelClusters, std::vector<uint64_t> &encodedData) const
162 {
163  ATH_MSG_DEBUG("Encoding xAOD pixel clusters to L2G EDM TV");
164 
165  // Fill the event header
166  // Event header w1
168  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_HDR_w1(header_w1));
169 
170  // Event header w2
171  auto header_w2 = FPGADataFormatUtilities::fill_EVT_HDR_w2(242000, 0);
172  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_HDR_w2(header_w2));
173 
174  // Event header w3
175  auto header_w3 = FPGADataFormatUtilities::fill_EVT_HDR_w3(0, 0);
176  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_HDR_w3(header_w3));
177 
178  // L2G conetent
179  // Loop over the pixel clusters
180  unsigned int isLast = 0;
181  for (unsigned int i = 0; i < pixelClusters->size(); i++)
182  {
183  // Pixel cluster w1
185  pixelClusters->at(i)->identifierHash(),
186  0);
187  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w1(pixelCluster_w1));
188 
189 
190 
191  // Determine the size of rdo list and retrieve accordingly
192  uint64_t rdoList[4] = {0, 0, 0, 0}; // Current dataformat only supports 4 RDOs
193 
194  unsigned int rdoListSize = pixelClusters->at(i)->rdoList().size();
195  rdoListSize = rdoListSize > 4 ? 4 : rdoListSize; // restrict to 4 RDOs if more
196  for (unsigned int j = 0; j < rdoListSize; j++)
197  {
198  rdoList[j] = pixelClusters->at(i)->rdoList().at(j).get_compact();
199  }
200 
201  // Pixel cluster w2
202  auto pixelCluster_w2 = FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w2(rdoList[0]);
203  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w2(pixelCluster_w2));
204 
205  // Pixel cluster w3
206  auto pixelCluster_w3 = FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w3(rdoList[1]);
207  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w3(pixelCluster_w3));
208 
209  // Pixel cluster w4
210  auto pixelCluster_w4 = FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w4(rdoList[2]);
211  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w4(pixelCluster_w4));
212 
213  // Pixel cluster w5
214  auto pixelCluster_w5 = FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w5(rdoList[3]);
215  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w5(pixelCluster_w5));
216 
217  // Pixel cluster w6
218  auto pixelCluster_w6 = FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w6(pixelClusters->at(i)->localPosition<2>()(0, 0),
219  pixelClusters->at(i)->localPosition<2>()(1, 0),
220  pixelClusters->at(i)->channelsInPhi(),
221  pixelClusters->at(i)->channelsInEta(),
222  pixelClusters->at(i)->widthInEta()
223  );
224  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w6(pixelCluster_w6));
225 
226  // Pixel cluster w7
227  const auto& [omegax, omegay] = TrackingUtilities::computeOmegas(*pixelClusters->at(i),
228  *m_pixelid);
229  auto pixelCluster_w7 = FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w7(pixelClusters->at(i)->localCovariance<2>()(0, 0),
230  pixelClusters->at(i)->localCovariance<2>()(1, 1),
231  omegax,
232  omegay
233  );
234  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w7(pixelCluster_w7));
235 
236  // Pixel cluster w8
237  auto pixelCluster_w8 = FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w8(pixelClusters->at(i)->globalPosition()[0],
238  pixelClusters->at(i)->globalPosition()[1],
239  0);
240  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w8(pixelCluster_w8));
241 
242  // Pixel cluster w9
243  auto pixelCluster_w9 = FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w9(pixelClusters->at(i)->identifier());
244  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w9(pixelCluster_w9));
245 
246  // Pixel cluster w10
247  isLast = i == (pixelClusters->size() - 1) ? 1 : 0;
248  auto pixelCluster_w10 = FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w10(pixelClusters->at(i)->globalPosition()[2],
249  pixelClusters->at(i)->totalToT(),
250  isLast,
251  0);
252  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w10(pixelCluster_w10));
253  }
254 
255  // Fill the event footer
256  // Event footer w1
258  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_FTR_w1(footer_w1));
259 
260  // Event footer w2
261  auto footer_w2 = FPGADataFormatUtilities::fill_EVT_FTR_w2(0);
262  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_FTR_w2(footer_w2));
263 
264  // Event footer w3
265  auto footer_w3 = FPGADataFormatUtilities::fill_EVT_FTR_w3(encodedData.size(), 44939973);
266  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_FTR_w3(footer_w3));
267 
268  return StatusCode::SUCCESS;
269 }
270 
271 StatusCode TestVectorTool::encodeStripL2G(const xAOD::StripClusterContainer *stripClusters, std::vector<uint64_t> &encodedData) const
272 {
273  ATH_MSG_DEBUG("Encoding xAOD strip clusters to L2G EDM TV");
274 
275  // Fill the event header
276  // Event header w1
278  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_HDR_w1(header_w1));
279 
280  // Event header w2
281  auto header_w2 = FPGADataFormatUtilities::fill_EVT_HDR_w2(242000, 0);
282  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_HDR_w2(header_w2));
283 
284  // Event header w3
285  auto header_w3 = FPGADataFormatUtilities::fill_EVT_HDR_w3(0, 0);
286  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_HDR_w3(header_w3));
287 
288  // L2G conetent
289  // Loop over the strip clusters
290  unsigned int isLast = 0;
291  for (unsigned int i = 0; i < stripClusters->size(); i++)
292  {
293  // Strip cluster w1
295  stripClusters->at(i)->identifierHash(),
296  0);
297  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w1(stripCluster_w1));
298 
299 
300 
301  // Determine the size of rdo list and retrieve accordingly
302  uint64_t rdoList[4] = {0, 0, 0, 0}; // Current dataformat only supports 4 RDOs
303 
304  unsigned int rdoListSize = stripClusters->at(i)->rdoList().size();
305  rdoListSize = rdoListSize > 4 ? 4 : rdoListSize; // restrict to 4 RDOs if more
306  for (unsigned int j = 0; j < rdoListSize; j++)
307  {
308  rdoList[j] = stripClusters->at(i)->rdoList().at(j).get_compact();
309  }
310 
311  // Strip cluster w3
312  auto stripCluster_w2 = FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w2(rdoList[0]);
313  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w2(stripCluster_w2));
314 
315  // Strip cluster w3
316  auto stripCluster_w3 = FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w3(rdoList[1]);
317  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w3(stripCluster_w3));
318 
319  // Strip cluster w4
320  auto stripCluster_w4 = FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w4(rdoList[2]);
321  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w4(stripCluster_w4));
322 
323  // Strip cluster w5
324  auto stripCluster_w5 = FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w5(rdoList[3]);
325  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w5(stripCluster_w5));
326 
327  // Strip cluster w6
328  auto stripCluster_w6 = FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w6(stripClusters->at(i)->localPosition<1>()(0, 0),
329  0, // Strip cluster has no local position y
330  stripClusters->at(i)->localCovariance<1>()(0, 0),
331  0);
332  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w6(stripCluster_w6));
333 
334  // Strip cluster w7
335  auto stripCluster_w7 = FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w7(stripClusters->at(i)->globalPosition()[0],
336  stripClusters->at(i)->globalPosition()[1],
337  stripClusters->at(i)->channelsInPhi(),
338  0);
339  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w7(stripCluster_w7));
340 
341  // Strip cluster w8
342  auto stripCluster_w8 = FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w8(stripClusters->at(i)->identifier());
343  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w8(stripCluster_w8));
344 
345  // Strip cluster w9
346  isLast = i == (stripClusters->size() - 1) ? 1 : 0;
347  auto stripCluster_w9 = FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w9(stripClusters->at(i)->globalPosition()[2],
348  isLast, i, 0);
349  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w9(stripCluster_w9));
350  }
351 
352  // Fill the event footer
353  // Event footer w1
355  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_FTR_w1(footer_w1));
356 
357  // Event footer w2
358  auto footer_w2 = FPGADataFormatUtilities::fill_EVT_FTR_w2(0);
359  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_FTR_w2(footer_w2));
360 
361  // Event footer w3
362  // 44939973 in the crc field is a dummy value for now
363  auto footer_w3 = FPGADataFormatUtilities::fill_EVT_FTR_w3(encodedData.size(), 44939973);
364  encodedData.push_back(FPGADataFormatUtilities::get_dataformat_EVT_FTR_w3(footer_w3));
365 
366  return StatusCode::SUCCESS;
367 }
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Compare two TV in the form of std::vector<uint64_t>
Definition: TestVectorTool.cxx:81
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Definition: AthMsgStreamMacros.h:33
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Definition: FPGADataFormatUtilities.h:106
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uint64_t get_dataformat_EDM_PIXELCLUSTER_w8(const EDM_PIXELCLUSTER_w8 &in)
Definition: FPGADataFormatUtilities.h:1963
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uint64_t get_dataformat_EVT_FTR_w3(const EVT_FTR_w3 &in)
Definition: FPGADataFormatUtilities.h:255
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Definition: CaloCondBlobAlgs_fillNoiseFromASCII.py:17
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Definition: FPGADataFormatUtilities.h:176
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Definition: lumiFormat.py:85
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StatusCode encodePixelL2G(const xAOD::PixelClusterContainer *pixelClusters, std::vector< uint64_t > &encodedData) const
Encode xAOD pixel cluster to L2G EDM TV.
Definition: TestVectorTool.cxx:161
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::StatusCode StatusCode
StatusCode definition for legacy code.
Definition: PhysicsAnalysis/D3PDTools/EventLoop/EventLoop/StatusCode.h:22
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#define ATH_MSG_DEBUG(x)
Definition: AthMsgStreamMacros.h:29
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EDM_STRIPCLUSTER_w2 fill_EDM_STRIPCLUSTER_w2(const uint64_t &rdo_list_w1)
Definition: FPGADataFormatUtilities.h:1538
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EDM_PIXELCLUSTER_w4 fill_EDM_PIXELCLUSTER_w4(const uint64_t &rdo_list_w3)
Definition: FPGADataFormatUtilities.h:2006
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Definition: tile_monitor.h:29
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uint64_t get_dataformat_EDM_PIXELCLUSTER_w9(const EDM_PIXELCLUSTER_w9 &in)
Definition: FPGADataFormatUtilities.h:1971
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EDM_STRIPCLUSTER_w1 fill_EDM_STRIPCLUSTER_w1(const uint64_t &flag, const uint64_t &id_hash, const uint64_t &spare)
Definition: FPGADataFormatUtilities.h:1530
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Definition: EventInfo_v1.cxx:123
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Definition: AthCheckMacros.h:40
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Definition: FPGADataFormatUtilities.h:136
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Definition: TestVectorTool.h:30
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uint64_t get_dataformat_EDM_PIXELCLUSTER_w5(const EDM_PIXELCLUSTER_w5 &in)
Definition: FPGADataFormatUtilities.h:1938
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FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w6
uint64_t get_dataformat_EDM_PIXELCLUSTER_w6(const EDM_PIXELCLUSTER_w6 &in)
Definition: FPGADataFormatUtilities.h:1944
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Derived DataVector<T>.
Definition: DataVector.h:794
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uint64_t get_dataformat_EDM_STRIPCLUSTER_w2(const EDM_STRIPCLUSTER_w2 &in)
Definition: FPGADataFormatUtilities.h:1473
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Definition: PyKernel.py:41
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StatusCode encodeStripL2G(const xAOD::StripClusterContainer *stripClusters, std::vector< uint64_t > &encodedData) const
Encode xAOD strip cluster to L2G EDM TV.
Definition: TestVectorTool.cxx:271
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const int EDM_PIXELCLUSTER_FLAG
Definition: FPGADataFormatUtilities.h:1676
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EDM_PIXELCLUSTER_w2 fill_EDM_PIXELCLUSTER_w2(const uint64_t &rdo_list_w1)
Definition: FPGADataFormatUtilities.h:1994
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uint64_t get_dataformat_EVT_FTR_w1(const EVT_FTR_w1 &in)
Definition: FPGADataFormatUtilities.h:241
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EDM_PIXELCLUSTER_w7 fill_EDM_PIXELCLUSTER_w7(const double &localcovariance_xx, const double &localcovariance_yy, const double &omega_x, const double &omega_y)
Definition: FPGADataFormatUtilities.h:2028
FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w4
uint64_t get_dataformat_EDM_STRIPCLUSTER_w4(const EDM_STRIPCLUSTER_w4 &in)
Definition: FPGADataFormatUtilities.h:1485
FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w3
uint64_t get_dataformat_EDM_PIXELCLUSTER_w3(const EDM_PIXELCLUSTER_w3 &in)
Definition: FPGADataFormatUtilities.h:1926
FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w6
uint64_t get_dataformat_EDM_STRIPCLUSTER_w6(const EDM_STRIPCLUSTER_w6 &in)
Definition: FPGADataFormatUtilities.h:1497
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#define ATH_MSG_WARNING(x)
Definition: AthMsgStreamMacros.h:32
FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w4
EDM_STRIPCLUSTER_w4 fill_EDM_STRIPCLUSTER_w4(const uint64_t &rdo_list_w3)
Definition: FPGADataFormatUtilities.h:1550
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uint64_t get_dataformat_EDM_PIXELCLUSTER_w10(const EDM_PIXELCLUSTER_w10 &in)
Definition: FPGADataFormatUtilities.h:1977
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EDM_STRIPCLUSTER_w8 fill_EDM_STRIPCLUSTER_w8(const uint64_t &identifier)
Definition: FPGADataFormatUtilities.h:1580
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uint64_t get_dataformat_EDM_STRIPCLUSTER_w9(const EDM_STRIPCLUSTER_w9 &in)
Definition: FPGADataFormatUtilities.h:1521
TestVectorTool.h
DataVector::at
const T * at(size_type n) const
Access an element, as an rvalue.
FPGADataFormatUtilities::fill_EVT_FTR_w2
EVT_FTR_w2 fill_EVT_FTR_w2(const uint64_t &error_flags)
Definition: FPGADataFormatUtilities.h:270
FPGADataFormatUtilities::fill_EVT_FTR_w1
EVT_FTR_w1 fill_EVT_FTR_w1(const uint64_t &flag, const uint64_t &spare, const uint64_t &hdr_crc)
Definition: FPGADataFormatUtilities.h:262
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EDM_PIXELCLUSTER_w3 fill_EDM_PIXELCLUSTER_w3(const uint64_t &rdo_list_w2)
Definition: FPGADataFormatUtilities.h:2000
DataVector::size
size_type size() const noexcept
Returns the number of elements in the collection.
FPGADataFormatUtilities::get_dataformat_EVT_HDR_w1
uint64_t get_dataformat_EVT_HDR_w1(const EVT_HDR_w1 &in)
Definition: FPGADataFormatUtilities.h:97