#include <cstdint>

Include dependency graph for FPGADataFormatUtilities.h:

This graph shows which files directly or indirectly include this file:

Classes
struct	FPGADataFormatUtilities::EVT_HDR_w1

struct	FPGADataFormatUtilities::EVT_HDR_w2

struct	FPGADataFormatUtilities::EVT_HDR_w3

struct	FPGADataFormatUtilities::EVT_FTR_w1

struct	FPGADataFormatUtilities::EVT_FTR_w2

struct	FPGADataFormatUtilities::EVT_FTR_w3

struct	FPGADataFormatUtilities::M_HDR_w1

struct	FPGADataFormatUtilities::SLICE_HDR_w1

struct	FPGADataFormatUtilities::RD_HDR_w1

struct	FPGADataFormatUtilities::RD_HDR_w2

struct	FPGADataFormatUtilities::GTRACK_HDR_w1

struct	FPGADataFormatUtilities::GTRACK_HDR_w2

struct	FPGADataFormatUtilities::GTRACK_HDR_w3

struct	FPGADataFormatUtilities::PIXEL_CLUSTER

struct	FPGADataFormatUtilities::STRIP_CLUSTER

struct	FPGADataFormatUtilities::GHITZ_w1

struct	FPGADataFormatUtilities::GHITZ_w2

struct	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w1

struct	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w2

struct	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w3

struct	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w4

struct	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w5

struct	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w6

struct	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w7

struct	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w8

struct	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w9

struct	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w1

struct	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w2

struct	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w3

struct	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w4

struct	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w5

struct	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w6

struct	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w7

struct	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w8

struct	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w9

struct	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w10

struct	FPGADataFormatUtilities::PIXEL_EF_RDO

struct	FPGADataFormatUtilities::STRIP_EF_RDO

Namespaces
	FPGADataFormatUtilities

Functions
consteval uint64_t	FPGADataFormatUtilities::SELECTBITS (uint8_t len, uint8_t startbit)

EVT_HDR_w1	FPGADataFormatUtilities::get_bitfields_EVT_HDR_w1 (const uint64_t &in)

EVT_HDR_w2	FPGADataFormatUtilities::get_bitfields_EVT_HDR_w2 (const uint64_t &in)

EVT_HDR_w3	FPGADataFormatUtilities::get_bitfields_EVT_HDR_w3 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EVT_HDR_w1 (const EVT_HDR_w1 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EVT_HDR_w2 (const EVT_HDR_w2 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EVT_HDR_w3 (const EVT_HDR_w3 &in)

EVT_HDR_w1	FPGADataFormatUtilities::fill_EVT_HDR_w1 (const uint64_t &flag, const uint64_t &l0id, const uint64_t &bcid, const uint64_t &spare)

EVT_HDR_w2	FPGADataFormatUtilities::fill_EVT_HDR_w2 (const uint64_t &runnumber, const uint64_t &time)

EVT_HDR_w3	FPGADataFormatUtilities::fill_EVT_HDR_w3 (const uint64_t &status, const uint64_t &crc)

uint64_t	FPGADataFormatUtilities::to_real_EVT_HDR_w1_flag (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_HDR_w1_l0id (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_HDR_w1_bcid (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_HDR_w1_spare (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_HDR_w2_runnumber (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_HDR_w2_time (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_HDR_w3_status (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_HDR_w3_crc (const uint64_t &in)

EVT_FTR_w1	FPGADataFormatUtilities::get_bitfields_EVT_FTR_w1 (const uint64_t &in)

EVT_FTR_w2	FPGADataFormatUtilities::get_bitfields_EVT_FTR_w2 (const uint64_t &in)

EVT_FTR_w3	FPGADataFormatUtilities::get_bitfields_EVT_FTR_w3 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EVT_FTR_w1 (const EVT_FTR_w1 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EVT_FTR_w2 (const EVT_FTR_w2 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EVT_FTR_w3 (const EVT_FTR_w3 &in)

EVT_FTR_w1	FPGADataFormatUtilities::fill_EVT_FTR_w1 (const uint64_t &flag, const uint64_t &spare, const uint64_t &hdr_crc)

EVT_FTR_w2	FPGADataFormatUtilities::fill_EVT_FTR_w2 (const uint64_t &error_flags)

EVT_FTR_w3	FPGADataFormatUtilities::fill_EVT_FTR_w3 (const uint64_t &word_count, const uint64_t &crc)

uint64_t	FPGADataFormatUtilities::to_real_EVT_FTR_w1_flag (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_FTR_w1_spare (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_FTR_w1_hdr_crc (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_FTR_w2_error_flags (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_FTR_w3_word_count (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EVT_FTR_w3_crc (const uint64_t &in)

M_HDR_w1	FPGADataFormatUtilities::get_bitfields_M_HDR_w1 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_M_HDR_w1 (const M_HDR_w1 &in)

M_HDR_w1	FPGADataFormatUtilities::fill_M_HDR_w1 (const uint64_t &flag, const uint64_t &modid, const uint64_t &modhash, const uint64_t &spare)

uint64_t	FPGADataFormatUtilities::to_real_M_HDR_w1_flag (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_M_HDR_w1_modid (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_M_HDR_w1_modhash (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_M_HDR_w1_spare (const uint64_t &in)

SLICE_HDR_w1	FPGADataFormatUtilities::get_bitfields_SLICE_HDR_w1 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_SLICE_HDR_w1 (const SLICE_HDR_w1 &in)

SLICE_HDR_w1	FPGADataFormatUtilities::fill_SLICE_HDR_w1 (const uint64_t &flag, const uint64_t &sliceid, const uint64_t &eta_region, const uint64_t &phi_region, const uint64_t &spare)

uint64_t	FPGADataFormatUtilities::to_real_SLICE_HDR_w1_flag (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_SLICE_HDR_w1_sliceid (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_SLICE_HDR_w1_eta_region (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_SLICE_HDR_w1_phi_region (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_SLICE_HDR_w1_spare (const uint64_t &in)

RD_HDR_w1	FPGADataFormatUtilities::get_bitfields_RD_HDR_w1 (const uint64_t &in)

RD_HDR_w2	FPGADataFormatUtilities::get_bitfields_RD_HDR_w2 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_RD_HDR_w1 (const RD_HDR_w1 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_RD_HDR_w2 (const RD_HDR_w2 &in)

RD_HDR_w1	FPGADataFormatUtilities::fill_RD_HDR_w1 (const uint64_t &flag, const uint64_t &type, const uint64_t &eta_region, const uint64_t &phi_region, const uint64_t &slice, const uint64_t &hough_x_bin, const uint64_t &hough_y_bin, const uint64_t &second_stage, const uint64_t &layer_bitmask, const uint64_t &spare)

RD_HDR_w2	FPGADataFormatUtilities::fill_RD_HDR_w2 (const uint64_t &global_phi, const uint64_t &global_eta, const uint64_t &spare)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w1_flag (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w1_type (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w1_eta_region (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w1_phi_region (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w1_slice (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w1_hough_x_bin (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w1_hough_y_bin (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w1_second_stage (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w1_layer_bitmask (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w1_spare (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w2_global_phi (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w2_global_eta (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_RD_HDR_w2_spare (const uint64_t &in)

GTRACK_HDR_w1	FPGADataFormatUtilities::get_bitfields_GTRACK_HDR_w1 (const uint64_t &in)

GTRACK_HDR_w2	FPGADataFormatUtilities::get_bitfields_GTRACK_HDR_w2 (const uint64_t &in)

GTRACK_HDR_w3	FPGADataFormatUtilities::get_bitfields_GTRACK_HDR_w3 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_GTRACK_HDR_w1 (const GTRACK_HDR_w1 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_GTRACK_HDR_w2 (const GTRACK_HDR_w2 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_GTRACK_HDR_w3 (const GTRACK_HDR_w3 &in)

GTRACK_HDR_w1	FPGADataFormatUtilities::fill_GTRACK_HDR_w1 (const uint64_t &flag, const uint64_t &type, const uint64_t &eta_region, const uint64_t &phi_region, const uint64_t &phi_bin, const uint64_t &z_bin, const uint64_t &second_stage, const uint64_t &layer_bitmask)

GTRACK_HDR_w2	FPGADataFormatUtilities::fill_GTRACK_HDR_w2 (const double &score, const double &d0, const double &z0, const uint64_t &spare)

GTRACK_HDR_w3	FPGADataFormatUtilities::fill_GTRACK_HDR_w3 (const double &qoverpt, const double &phi, const double &eta, const uint64_t &spare)

uint64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w1_flag (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w1_type (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w1_eta_region (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w1_phi_region (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w1_phi_bin (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w1_z_bin (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w1_second_stage (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w1_layer_bitmask (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_GTRACK_HDR_w2_score (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_GTRACK_HDR_w2_d0 (const int64_t &in)

double	FPGADataFormatUtilities::to_real_GTRACK_HDR_w2_z0 (const int64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w2_spare (const uint64_t &in)

int64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w3_qoverpt (const int64_t &in)

int64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w3_phi (const int64_t &in)

int64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w3_eta (const int64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GTRACK_HDR_w3_spare (const uint64_t &in)

PIXEL_CLUSTER	FPGADataFormatUtilities::get_bitfields_PIXEL_CLUSTER (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_PIXEL_CLUSTER (const PIXEL_CLUSTER &in)

PIXEL_CLUSTER	FPGADataFormatUtilities::fill_PIXEL_CLUSTER (const uint64_t &last, const uint64_t &col, const uint64_t &row, const double &centroid_col, const double &centroid_row, const uint64_t &spare)

uint64_t	FPGADataFormatUtilities::to_real_PIXEL_CLUSTER_last (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_PIXEL_CLUSTER_col (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_PIXEL_CLUSTER_row (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_PIXEL_CLUSTER_centroid_col (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_PIXEL_CLUSTER_centroid_row (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_PIXEL_CLUSTER_spare (const uint64_t &in)

STRIP_CLUSTER	FPGADataFormatUtilities::get_bitfields_STRIP_CLUSTER (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_STRIP_CLUSTER_up32 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_STRIP_CLUSTER_low32 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_STRIP_CLUSTER (const STRIP_CLUSTER &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_STRIP_CLUSTER_64 (const uint64_t &up, const uint64_t &low)

STRIP_CLUSTER	FPGADataFormatUtilities::fill_STRIP_CLUSTER (const uint64_t &last, const uint64_t &row, const uint64_t &nstrips, const uint64_t &strip_index, const uint64_t &spare)

uint64_t	FPGADataFormatUtilities::to_real_STRIP_CLUSTER_last (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_STRIP_CLUSTER_row (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_STRIP_CLUSTER_nstrips (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_STRIP_CLUSTER_strip_index (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_STRIP_CLUSTER_spare (const uint64_t &in)

GHITZ_w1	FPGADataFormatUtilities::get_bitfields_GHITZ_w1 (const uint64_t &in)

GHITZ_w2	FPGADataFormatUtilities::get_bitfields_GHITZ_w2 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_GHITZ_w1 (const GHITZ_w1 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_GHITZ_w2 (const GHITZ_w2 &in)

GHITZ_w1	FPGADataFormatUtilities::fill_GHITZ_w1 (const uint64_t &last, const uint64_t &lyr, const double &rad, const double &phi, const double &z, const uint64_t &lastofslice, const uint64_t &spare)

GHITZ_w2	FPGADataFormatUtilities::fill_GHITZ_w2 (const uint64_t &cluster1, const uint64_t &cluster2, const uint64_t &row, const uint64_t &spare)

uint64_t	FPGADataFormatUtilities::to_real_GHITZ_w1_last (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GHITZ_w1_lyr (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_GHITZ_w1_rad (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_GHITZ_w1_phi (const int64_t &in)

double	FPGADataFormatUtilities::to_real_GHITZ_w1_z (const int64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GHITZ_w1_lastofslice (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GHITZ_w1_spare (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GHITZ_w2_cluster1 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GHITZ_w2_cluster2 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GHITZ_w2_row (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_GHITZ_w2_spare (const uint64_t &in)

EDM_STRIPCLUSTER_w1	FPGADataFormatUtilities::get_bitfields_EDM_STRIPCLUSTER_w1 (const uint64_t &in)

EDM_STRIPCLUSTER_w2	FPGADataFormatUtilities::get_bitfields_EDM_STRIPCLUSTER_w2 (const uint64_t &in)

EDM_STRIPCLUSTER_w3	FPGADataFormatUtilities::get_bitfields_EDM_STRIPCLUSTER_w3 (const uint64_t &in)

EDM_STRIPCLUSTER_w4	FPGADataFormatUtilities::get_bitfields_EDM_STRIPCLUSTER_w4 (const uint64_t &in)

EDM_STRIPCLUSTER_w5	FPGADataFormatUtilities::get_bitfields_EDM_STRIPCLUSTER_w5 (const uint64_t &in)

EDM_STRIPCLUSTER_w6	FPGADataFormatUtilities::get_bitfields_EDM_STRIPCLUSTER_w6 (const uint64_t &in)

EDM_STRIPCLUSTER_w7	FPGADataFormatUtilities::get_bitfields_EDM_STRIPCLUSTER_w7 (const uint64_t &in)

EDM_STRIPCLUSTER_w8	FPGADataFormatUtilities::get_bitfields_EDM_STRIPCLUSTER_w8 (const uint64_t &in)

EDM_STRIPCLUSTER_w9	FPGADataFormatUtilities::get_bitfields_EDM_STRIPCLUSTER_w9 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w1 (const EDM_STRIPCLUSTER_w1 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w2 (const EDM_STRIPCLUSTER_w2 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w3 (const EDM_STRIPCLUSTER_w3 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w4 (const EDM_STRIPCLUSTER_w4 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w5 (const EDM_STRIPCLUSTER_w5 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w6 (const EDM_STRIPCLUSTER_w6 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w7 (const EDM_STRIPCLUSTER_w7 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w8 (const EDM_STRIPCLUSTER_w8 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_STRIPCLUSTER_w9 (const EDM_STRIPCLUSTER_w9 &in)

EDM_STRIPCLUSTER_w1	FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w1 (const uint64_t &flag, const uint64_t &id_hash, const uint64_t &spare)

EDM_STRIPCLUSTER_w2	FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w2 (const uint64_t &rdo_list_w1)

EDM_STRIPCLUSTER_w3	FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w3 (const uint64_t &rdo_list_w2)

EDM_STRIPCLUSTER_w4	FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w4 (const uint64_t &rdo_list_w3)

EDM_STRIPCLUSTER_w5	FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w5 (const uint64_t &rdo_list_w4)

EDM_STRIPCLUSTER_w6	FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w6 (const double &localposition_x, const double &localposition_y, const double &localcovariance_xx, const uint64_t &spare)

EDM_STRIPCLUSTER_w7	FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w7 (const double &globalposition_x, const double &globalposition_y, const uint64_t &channels_in_phi, const uint64_t &spare)

EDM_STRIPCLUSTER_w8	FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w8 (const uint64_t &identifier)

EDM_STRIPCLUSTER_w9	FPGADataFormatUtilities::fill_EDM_STRIPCLUSTER_w9 (const double &globalposition_z, const uint64_t &lastword, const uint64_t &index, const uint64_t &spare)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w1_flag (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w1_id_hash (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w1_spare (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w2_rdo_list_w1 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w3_rdo_list_w2 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w4_rdo_list_w3 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w5_rdo_list_w4 (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w6_localposition_x (const int64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w6_localposition_y (const int64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w6_localcovariance_xx (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w6_spare (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w7_globalposition_x (const int64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w7_globalposition_y (const int64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w7_channels_in_phi (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w7_spare (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w8_identifier (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w9_globalposition_z (const int64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w9_lastword (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w9_index (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_STRIPCLUSTER_w9_spare (const uint64_t &in)

EDM_PIXELCLUSTER_w1	FPGADataFormatUtilities::get_bitfields_EDM_PIXELCLUSTER_w1 (const uint64_t &in)

EDM_PIXELCLUSTER_w2	FPGADataFormatUtilities::get_bitfields_EDM_PIXELCLUSTER_w2 (const uint64_t &in)

EDM_PIXELCLUSTER_w3	FPGADataFormatUtilities::get_bitfields_EDM_PIXELCLUSTER_w3 (const uint64_t &in)

EDM_PIXELCLUSTER_w4	FPGADataFormatUtilities::get_bitfields_EDM_PIXELCLUSTER_w4 (const uint64_t &in)

EDM_PIXELCLUSTER_w5	FPGADataFormatUtilities::get_bitfields_EDM_PIXELCLUSTER_w5 (const uint64_t &in)

EDM_PIXELCLUSTER_w6	FPGADataFormatUtilities::get_bitfields_EDM_PIXELCLUSTER_w6 (const uint64_t &in)

EDM_PIXELCLUSTER_w7	FPGADataFormatUtilities::get_bitfields_EDM_PIXELCLUSTER_w7 (const uint64_t &in)

EDM_PIXELCLUSTER_w8	FPGADataFormatUtilities::get_bitfields_EDM_PIXELCLUSTER_w8 (const uint64_t &in)

EDM_PIXELCLUSTER_w9	FPGADataFormatUtilities::get_bitfields_EDM_PIXELCLUSTER_w9 (const uint64_t &in)

EDM_PIXELCLUSTER_w10	FPGADataFormatUtilities::get_bitfields_EDM_PIXELCLUSTER_w10 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w1 (const EDM_PIXELCLUSTER_w1 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w2 (const EDM_PIXELCLUSTER_w2 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w3 (const EDM_PIXELCLUSTER_w3 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w4 (const EDM_PIXELCLUSTER_w4 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w5 (const EDM_PIXELCLUSTER_w5 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w6 (const EDM_PIXELCLUSTER_w6 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w7 (const EDM_PIXELCLUSTER_w7 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w8 (const EDM_PIXELCLUSTER_w8 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w9 (const EDM_PIXELCLUSTER_w9 &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_EDM_PIXELCLUSTER_w10 (const EDM_PIXELCLUSTER_w10 &in)

EDM_PIXELCLUSTER_w1	FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w1 (const uint64_t &flag, const uint64_t &id_hash, const uint64_t &spare)

EDM_PIXELCLUSTER_w2	FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w2 (const uint64_t &rdo_list_w1)

EDM_PIXELCLUSTER_w3	FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w3 (const uint64_t &rdo_list_w2)

EDM_PIXELCLUSTER_w4	FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w4 (const uint64_t &rdo_list_w3)

EDM_PIXELCLUSTER_w5	FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w5 (const uint64_t &rdo_list_w4)

EDM_PIXELCLUSTER_w6	FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w6 (const double &localposition_x, const double &localposition_y, const uint64_t &channels_in_phi, const uint64_t &channels_in_eta, const uint64_t &width_in_eta)

EDM_PIXELCLUSTER_w7	FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w7 (const double &localcovariance_xx, const double &localcovariance_yy, const double &omega_x, const double &omega_y)

EDM_PIXELCLUSTER_w8	FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w8 (const double &globalposition_x, const double &globalposition_y, const uint64_t &spare)

EDM_PIXELCLUSTER_w9	FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w9 (const uint64_t &identifier)

EDM_PIXELCLUSTER_w10	FPGADataFormatUtilities::fill_EDM_PIXELCLUSTER_w10 (const double &globalposition_z, const uint64_t &total_tot, const uint64_t &lastword, const uint64_t &index)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w1_flag (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w1_id_hash (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w1_spare (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w2_rdo_list_w1 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w3_rdo_list_w2 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w4_rdo_list_w3 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w5_rdo_list_w4 (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w6_localposition_x (const int64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w6_localposition_y (const int64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w6_channels_in_phi (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w6_channels_in_eta (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w6_width_in_eta (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w7_localcovariance_xx (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w7_localcovariance_yy (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w7_omega_x (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w7_omega_y (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w8_globalposition_x (const int64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w8_globalposition_y (const int64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w8_spare (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w9_identifier (const uint64_t &in)

double	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w10_globalposition_z (const int64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w10_total_tot (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w10_lastword (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_EDM_PIXELCLUSTER_w10_index (const uint64_t &in)

PIXEL_EF_RDO	FPGADataFormatUtilities::get_bitfields_PIXEL_EF_RDO (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_PIXEL_EF_RDO (const PIXEL_EF_RDO &in)

PIXEL_EF_RDO	FPGADataFormatUtilities::fill_PIXEL_EF_RDO (const uint64_t &last, const uint64_t &row, const uint64_t &col, const uint64_t &tot, const uint64_t &lvl1, const uint64_t &spare)

uint64_t	FPGADataFormatUtilities::to_real_PIXEL_EF_RDO_last (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_PIXEL_EF_RDO_row (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_PIXEL_EF_RDO_col (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_PIXEL_EF_RDO_tot (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_PIXEL_EF_RDO_lvl1 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_PIXEL_EF_RDO_spare (const uint64_t &in)

STRIP_EF_RDO	FPGADataFormatUtilities::get_bitfields_STRIP_EF_RDO (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_STRIP_EF_RDO_up32 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_STRIP_EF_RDO_low32 (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_STRIP_EF_RDO (const STRIP_EF_RDO &in)

uint64_t	FPGADataFormatUtilities::get_dataformat_STRIP_EF_RDO_64 (const uint64_t &up, const uint64_t &low)

STRIP_EF_RDO	FPGADataFormatUtilities::fill_STRIP_EF_RDO (const uint64_t &last, const uint64_t &chipid, const uint64_t &strip_num, const uint64_t &cluster_map, const uint64_t &spare)

uint64_t	FPGADataFormatUtilities::to_real_STRIP_EF_RDO_last (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_STRIP_EF_RDO_chipid (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_STRIP_EF_RDO_strip_num (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_STRIP_EF_RDO_cluster_map (const uint64_t &in)

uint64_t	FPGADataFormatUtilities::to_real_STRIP_EF_RDO_spare (const uint64_t &in)

Variables
const int	FPGADataFormatUtilities::EVT_HDR_FLAG = 0xab

const int	FPGADataFormatUtilities::EVT_HDR_W1_FLAG_bits = 8

const int	FPGADataFormatUtilities::EVT_HDR_W1_FLAG_lsb = 56

const float	FPGADataFormatUtilities::EVT_HDR_W1_FLAG_mf = 1.

const int	FPGADataFormatUtilities::EVT_HDR_W1_L0ID_bits = 40

const int	FPGADataFormatUtilities::EVT_HDR_W1_L0ID_lsb = 16

const float	FPGADataFormatUtilities::EVT_HDR_W1_L0ID_mf = 1.

const int	FPGADataFormatUtilities::EVT_HDR_W1_BCID_bits = 12

const int	FPGADataFormatUtilities::EVT_HDR_W1_BCID_lsb = 4

const float	FPGADataFormatUtilities::EVT_HDR_W1_BCID_mf = 1.

const int	FPGADataFormatUtilities::EVT_HDR_W1_SPARE_bits = 4

const int	FPGADataFormatUtilities::EVT_HDR_W1_SPARE_lsb = 0

const float	FPGADataFormatUtilities::EVT_HDR_W1_SPARE_mf = 1.

const int	FPGADataFormatUtilities::EVT_HDR_W2_RUNNUMBER_bits = 32

const int	FPGADataFormatUtilities::EVT_HDR_W2_RUNNUMBER_lsb = 32

const float	FPGADataFormatUtilities::EVT_HDR_W2_RUNNUMBER_mf = 1.

const int	FPGADataFormatUtilities::EVT_HDR_W2_TIME_bits = 32

const int	FPGADataFormatUtilities::EVT_HDR_W2_TIME_lsb = 0

const float	FPGADataFormatUtilities::EVT_HDR_W2_TIME_mf = 1.

const int	FPGADataFormatUtilities::EVT_HDR_W3_STATUS_bits = 32

const int	FPGADataFormatUtilities::EVT_HDR_W3_STATUS_lsb = 32

const float	FPGADataFormatUtilities::EVT_HDR_W3_STATUS_mf = 1.

const int	FPGADataFormatUtilities::EVT_HDR_W3_CRC_bits = 32

const int	FPGADataFormatUtilities::EVT_HDR_W3_CRC_lsb = 0

const float	FPGADataFormatUtilities::EVT_HDR_W3_CRC_mf = 1.

const int	FPGADataFormatUtilities::EVT_FTR_FLAG = 0xcd

const int	FPGADataFormatUtilities::EVT_FTR_W1_FLAG_bits = 8

const int	FPGADataFormatUtilities::EVT_FTR_W1_FLAG_lsb = 56

const float	FPGADataFormatUtilities::EVT_FTR_W1_FLAG_mf = 1.

const int	FPGADataFormatUtilities::EVT_FTR_W1_SPARE_bits = 24

const int	FPGADataFormatUtilities::EVT_FTR_W1_SPARE_lsb = 32

const float	FPGADataFormatUtilities::EVT_FTR_W1_SPARE_mf = 1.

const int	FPGADataFormatUtilities::EVT_FTR_W1_HDR_CRC_bits = 32

const int	FPGADataFormatUtilities::EVT_FTR_W1_HDR_CRC_lsb = 0

const float	FPGADataFormatUtilities::EVT_FTR_W1_HDR_CRC_mf = 1.

const int	FPGADataFormatUtilities::EVT_FTR_W2_ERROR_FLAGS_bits = 64

const int	FPGADataFormatUtilities::EVT_FTR_W2_ERROR_FLAGS_lsb = 0

const float	FPGADataFormatUtilities::EVT_FTR_W2_ERROR_FLAGS_mf = 1.

const int	FPGADataFormatUtilities::EVT_FTR_W3_WORD_COUNT_bits = 32

const int	FPGADataFormatUtilities::EVT_FTR_W3_WORD_COUNT_lsb = 32

const float	FPGADataFormatUtilities::EVT_FTR_W3_WORD_COUNT_mf = 1.

const int	FPGADataFormatUtilities::EVT_FTR_W3_CRC_bits = 32

const int	FPGADataFormatUtilities::EVT_FTR_W3_CRC_lsb = 0

const float	FPGADataFormatUtilities::EVT_FTR_W3_CRC_mf = 1.

const int	FPGADataFormatUtilities::M_HDR_FLAG = 0x55

const int	FPGADataFormatUtilities::M_HDR_W1_FLAG_bits = 8

const int	FPGADataFormatUtilities::M_HDR_W1_FLAG_lsb = 56

const float	FPGADataFormatUtilities::M_HDR_W1_FLAG_mf = 1.

const int	FPGADataFormatUtilities::M_HDR_W1_MODID_bits = 32

const int	FPGADataFormatUtilities::M_HDR_W1_MODID_lsb = 24

const float	FPGADataFormatUtilities::M_HDR_W1_MODID_mf = 1.

const int	FPGADataFormatUtilities::M_HDR_W1_MODHASH_bits = 16

const int	FPGADataFormatUtilities::M_HDR_W1_MODHASH_lsb = 8

const float	FPGADataFormatUtilities::M_HDR_W1_MODHASH_mf = 1.

const int	FPGADataFormatUtilities::M_HDR_W1_SPARE_bits = 8

const int	FPGADataFormatUtilities::M_HDR_W1_SPARE_lsb = 0

const float	FPGADataFormatUtilities::M_HDR_W1_SPARE_mf = 1.

const int	FPGADataFormatUtilities::SLICE_HDR_FLAG = 0x88

const int	FPGADataFormatUtilities::SLICE_HDR_W1_FLAG_bits = 8

const int	FPGADataFormatUtilities::SLICE_HDR_W1_FLAG_lsb = 56

const float	FPGADataFormatUtilities::SLICE_HDR_W1_FLAG_mf = 1.

const int	FPGADataFormatUtilities::SLICE_HDR_W1_SLICEID_bits = 11

const int	FPGADataFormatUtilities::SLICE_HDR_W1_SLICEID_lsb = 45

const float	FPGADataFormatUtilities::SLICE_HDR_W1_SLICEID_mf = 1.

const int	FPGADataFormatUtilities::SLICE_HDR_W1_ETA_REGION_bits = 6

const int	FPGADataFormatUtilities::SLICE_HDR_W1_ETA_REGION_lsb = 39

const float	FPGADataFormatUtilities::SLICE_HDR_W1_ETA_REGION_mf = 1.

const int	FPGADataFormatUtilities::SLICE_HDR_W1_PHI_REGION_bits = 6

const int	FPGADataFormatUtilities::SLICE_HDR_W1_PHI_REGION_lsb = 33

const float	FPGADataFormatUtilities::SLICE_HDR_W1_PHI_REGION_mf = 1.

const int	FPGADataFormatUtilities::SLICE_HDR_W1_SPARE_bits = 33

const int	FPGADataFormatUtilities::SLICE_HDR_W1_SPARE_lsb = 0

const float	FPGADataFormatUtilities::SLICE_HDR_W1_SPARE_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_FLAG = 0xbb

const int	FPGADataFormatUtilities::RD_HDR_W1_FLAG_bits = 8

const int	FPGADataFormatUtilities::RD_HDR_W1_FLAG_lsb = 56

const float	FPGADataFormatUtilities::RD_HDR_W1_FLAG_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W1_TYPE_bits = 4

const int	FPGADataFormatUtilities::RD_HDR_W1_TYPE_lsb = 52

const float	FPGADataFormatUtilities::RD_HDR_W1_TYPE_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W1_ETA_REGION_bits = 6

const int	FPGADataFormatUtilities::RD_HDR_W1_ETA_REGION_lsb = 46

const float	FPGADataFormatUtilities::RD_HDR_W1_ETA_REGION_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W1_PHI_REGION_bits = 6

const int	FPGADataFormatUtilities::RD_HDR_W1_PHI_REGION_lsb = 40

const float	FPGADataFormatUtilities::RD_HDR_W1_PHI_REGION_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W1_SLICE_bits = 5

const int	FPGADataFormatUtilities::RD_HDR_W1_SLICE_lsb = 35

const float	FPGADataFormatUtilities::RD_HDR_W1_SLICE_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W1_HOUGH_X_BIN_bits = 8

const int	FPGADataFormatUtilities::RD_HDR_W1_HOUGH_X_BIN_lsb = 27

const float	FPGADataFormatUtilities::RD_HDR_W1_HOUGH_X_BIN_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W1_HOUGH_Y_BIN_bits = 8

const int	FPGADataFormatUtilities::RD_HDR_W1_HOUGH_Y_BIN_lsb = 19

const float	FPGADataFormatUtilities::RD_HDR_W1_HOUGH_Y_BIN_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W1_SECOND_STAGE_bits = 1

const int	FPGADataFormatUtilities::RD_HDR_W1_SECOND_STAGE_lsb = 18

const float	FPGADataFormatUtilities::RD_HDR_W1_SECOND_STAGE_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W1_LAYER_BITMASK_bits = 13

const int	FPGADataFormatUtilities::RD_HDR_W1_LAYER_BITMASK_lsb = 5

const float	FPGADataFormatUtilities::RD_HDR_W1_LAYER_BITMASK_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W1_SPARE_bits = 5

const int	FPGADataFormatUtilities::RD_HDR_W1_SPARE_lsb = 0

const float	FPGADataFormatUtilities::RD_HDR_W1_SPARE_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W2_GLOBAL_PHI_bits = 16

const int	FPGADataFormatUtilities::RD_HDR_W2_GLOBAL_PHI_lsb = 48

const float	FPGADataFormatUtilities::RD_HDR_W2_GLOBAL_PHI_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W2_GLOBAL_ETA_bits = 16

const int	FPGADataFormatUtilities::RD_HDR_W2_GLOBAL_ETA_lsb = 32

const float	FPGADataFormatUtilities::RD_HDR_W2_GLOBAL_ETA_mf = 1.

const int	FPGADataFormatUtilities::RD_HDR_W2_SPARE_bits = 32

const int	FPGADataFormatUtilities::RD_HDR_W2_SPARE_lsb = 0

const float	FPGADataFormatUtilities::RD_HDR_W2_SPARE_mf = 1.

const int	FPGADataFormatUtilities::GTRACK_HDR_FLAG = 0xee

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_FLAG_bits = 8

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_FLAG_lsb = 56

const float	FPGADataFormatUtilities::GTRACK_HDR_W1_FLAG_mf = 1.

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_TYPE_bits = 4

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_TYPE_lsb = 52

const float	FPGADataFormatUtilities::GTRACK_HDR_W1_TYPE_mf = 1.

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_ETA_REGION_bits = 6

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_ETA_REGION_lsb = 46

const float	FPGADataFormatUtilities::GTRACK_HDR_W1_ETA_REGION_mf = 1.

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_PHI_REGION_bits = 6

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_PHI_REGION_lsb = 40

const float	FPGADataFormatUtilities::GTRACK_HDR_W1_PHI_REGION_mf = 1.

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_PHI_BIN_bits = 13

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_PHI_BIN_lsb = 27

const float	FPGADataFormatUtilities::GTRACK_HDR_W1_PHI_BIN_mf = 1.

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_Z_BIN_bits = 13

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_Z_BIN_lsb = 14

const float	FPGADataFormatUtilities::GTRACK_HDR_W1_Z_BIN_mf = 1.

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_SECOND_STAGE_bits = 1

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_SECOND_STAGE_lsb = 13

const float	FPGADataFormatUtilities::GTRACK_HDR_W1_SECOND_STAGE_mf = 1.

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_LAYER_BITMASK_bits = 13

const int	FPGADataFormatUtilities::GTRACK_HDR_W1_LAYER_BITMASK_lsb = 0

const float	FPGADataFormatUtilities::GTRACK_HDR_W1_LAYER_BITMASK_mf = 1.

const int	FPGADataFormatUtilities::GTRACK_HDR_W2_SCORE_bits = 16

const int	FPGADataFormatUtilities::GTRACK_HDR_W2_SCORE_lsb = 48

const float	FPGADataFormatUtilities::GTRACK_HDR_W2_SCORE_mf = 2048.

const int	FPGADataFormatUtilities::GTRACK_HDR_W2_D0_bits = 16

const int	FPGADataFormatUtilities::GTRACK_HDR_W2_D0_lsb = 32

const float	FPGADataFormatUtilities::GTRACK_HDR_W2_D0_mf = 4096.

const int	FPGADataFormatUtilities::GTRACK_HDR_W2_Z0_bits = 16

const int	FPGADataFormatUtilities::GTRACK_HDR_W2_Z0_lsb = 16

const float	FPGADataFormatUtilities::GTRACK_HDR_W2_Z0_mf = 32.

const int	FPGADataFormatUtilities::GTRACK_HDR_W2_SPARE_bits = 16

const int	FPGADataFormatUtilities::GTRACK_HDR_W2_SPARE_lsb = 0

const float	FPGADataFormatUtilities::GTRACK_HDR_W2_SPARE_mf = 1.

const int	FPGADataFormatUtilities::GTRACK_HDR_W3_QOVERPT_bits = 16

const int	FPGADataFormatUtilities::GTRACK_HDR_W3_QOVERPT_lsb = 48

const float	FPGADataFormatUtilities::GTRACK_HDR_W3_QOVERPT_mf = 32768.

const int	FPGADataFormatUtilities::GTRACK_HDR_W3_PHI_bits = 16

const int	FPGADataFormatUtilities::GTRACK_HDR_W3_PHI_lsb = 32

const float	FPGADataFormatUtilities::GTRACK_HDR_W3_PHI_mf = 8192.

const int	FPGADataFormatUtilities::GTRACK_HDR_W3_ETA_bits = 16

const int	FPGADataFormatUtilities::GTRACK_HDR_W3_ETA_lsb = 16

const float	FPGADataFormatUtilities::GTRACK_HDR_W3_ETA_mf = 8192.

const int	FPGADataFormatUtilities::GTRACK_HDR_W3_SPARE_bits = 16

const int	FPGADataFormatUtilities::GTRACK_HDR_W3_SPARE_lsb = 0

const float	FPGADataFormatUtilities::GTRACK_HDR_W3_SPARE_mf = 1.

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_LAST_bits = 1

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_LAST_lsb = 63

const float	FPGADataFormatUtilities::PIXEL_CLUSTER_LAST_mf = 1.

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_COL_bits = 13

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_COL_lsb = 50

const float	FPGADataFormatUtilities::PIXEL_CLUSTER_COL_mf = 1.

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_ROW_bits = 13

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_ROW_lsb = 37

const float	FPGADataFormatUtilities::PIXEL_CLUSTER_ROW_mf = 1.

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_CENTROID_COL_bits = 16

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_CENTROID_COL_lsb = 21

const float	FPGADataFormatUtilities::PIXEL_CLUSTER_CENTROID_COL_mf = 256.

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_CENTROID_ROW_bits = 16

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_CENTROID_ROW_lsb = 5

const float	FPGADataFormatUtilities::PIXEL_CLUSTER_CENTROID_ROW_mf = 256.

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_SPARE_bits = 5

const int	FPGADataFormatUtilities::PIXEL_CLUSTER_SPARE_lsb = 0

const float	FPGADataFormatUtilities::PIXEL_CLUSTER_SPARE_mf = 1.

const int	FPGADataFormatUtilities::STRIP_CLUSTER_LAST_bits = 1

const int	FPGADataFormatUtilities::STRIP_CLUSTER_LAST_lsb = 31

const float	FPGADataFormatUtilities::STRIP_CLUSTER_LAST_mf = 1.

const int	FPGADataFormatUtilities::STRIP_CLUSTER_ROW_bits = 1

const int	FPGADataFormatUtilities::STRIP_CLUSTER_ROW_lsb = 30

const float	FPGADataFormatUtilities::STRIP_CLUSTER_ROW_mf = 1.

const int	FPGADataFormatUtilities::STRIP_CLUSTER_NSTRIPS_bits = 8

const int	FPGADataFormatUtilities::STRIP_CLUSTER_NSTRIPS_lsb = 22

const float	FPGADataFormatUtilities::STRIP_CLUSTER_NSTRIPS_mf = 1.

const int	FPGADataFormatUtilities::STRIP_CLUSTER_STRIP_INDEX_bits = 12

const int	FPGADataFormatUtilities::STRIP_CLUSTER_STRIP_INDEX_lsb = 10

const float	FPGADataFormatUtilities::STRIP_CLUSTER_STRIP_INDEX_mf = 1.

const int	FPGADataFormatUtilities::STRIP_CLUSTER_SPARE_bits = 10

const int	FPGADataFormatUtilities::STRIP_CLUSTER_SPARE_lsb = 0

const float	FPGADataFormatUtilities::STRIP_CLUSTER_SPARE_mf = 1.

const int	FPGADataFormatUtilities::GHITZ_W1_LAST_bits = 1

const int	FPGADataFormatUtilities::GHITZ_W1_LAST_lsb = 63

const float	FPGADataFormatUtilities::GHITZ_W1_LAST_mf = 1.

const int	FPGADataFormatUtilities::GHITZ_W1_LYR_bits = 6

const int	FPGADataFormatUtilities::GHITZ_W1_LYR_lsb = 57

const float	FPGADataFormatUtilities::GHITZ_W1_LYR_mf = 1.

const int	FPGADataFormatUtilities::GHITZ_W1_RAD_bits = 18

const int	FPGADataFormatUtilities::GHITZ_W1_RAD_lsb = 39

const float	FPGADataFormatUtilities::GHITZ_W1_RAD_mf = 256.

const int	FPGADataFormatUtilities::GHITZ_W1_PHI_bits = 16

const int	FPGADataFormatUtilities::GHITZ_W1_PHI_lsb = 23

const float	FPGADataFormatUtilities::GHITZ_W1_PHI_mf = 8192.

const int	FPGADataFormatUtilities::GHITZ_W1_Z_bits = 20

const int	FPGADataFormatUtilities::GHITZ_W1_Z_lsb = 3

const float	FPGADataFormatUtilities::GHITZ_W1_Z_mf = 128.

const int	FPGADataFormatUtilities::GHITZ_W1_LASTOFSLICE_bits = 1

const int	FPGADataFormatUtilities::GHITZ_W1_LASTOFSLICE_lsb = 2

const float	FPGADataFormatUtilities::GHITZ_W1_LASTOFSLICE_mf = 1.

const int	FPGADataFormatUtilities::GHITZ_W1_SPARE_bits = 2

const int	FPGADataFormatUtilities::GHITZ_W1_SPARE_lsb = 0

const float	FPGADataFormatUtilities::GHITZ_W1_SPARE_mf = 1.

const int	FPGADataFormatUtilities::GHITZ_W2_CLUSTER1_bits = 19

const int	FPGADataFormatUtilities::GHITZ_W2_CLUSTER1_lsb = 45

const float	FPGADataFormatUtilities::GHITZ_W2_CLUSTER1_mf = 1.

const int	FPGADataFormatUtilities::GHITZ_W2_CLUSTER2_bits = 19

const int	FPGADataFormatUtilities::GHITZ_W2_CLUSTER2_lsb = 26

const float	FPGADataFormatUtilities::GHITZ_W2_CLUSTER2_mf = 1.

const int	FPGADataFormatUtilities::GHITZ_W2_ROW_bits = 6

const int	FPGADataFormatUtilities::GHITZ_W2_ROW_lsb = 20

const float	FPGADataFormatUtilities::GHITZ_W2_ROW_mf = 1.

const int	FPGADataFormatUtilities::GHITZ_W2_SPARE_bits = 20

const int	FPGADataFormatUtilities::GHITZ_W2_SPARE_lsb = 0

const float	FPGADataFormatUtilities::GHITZ_W2_SPARE_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_FLAG = 0x66

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W1_FLAG_bits = 8

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W1_FLAG_lsb = 56

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W1_FLAG_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W1_ID_HASH_bits = 32

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W1_ID_HASH_lsb = 24

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W1_ID_HASH_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W1_SPARE_bits = 24

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W1_SPARE_lsb = 0

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W1_SPARE_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W2_RDO_LIST_W1_bits = 64

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W2_RDO_LIST_W1_lsb = 0

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W2_RDO_LIST_W1_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W3_RDO_LIST_W2_bits = 64

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W3_RDO_LIST_W2_lsb = 0

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W3_RDO_LIST_W2_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W4_RDO_LIST_W3_bits = 64

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W4_RDO_LIST_W3_lsb = 0

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W4_RDO_LIST_W3_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W5_RDO_LIST_W4_bits = 64

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W5_RDO_LIST_W4_lsb = 0

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W5_RDO_LIST_W4_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_LOCALPOSITION_X_bits = 21

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_LOCALPOSITION_X_lsb = 43

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_LOCALPOSITION_X_mf = 8192.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_LOCALPOSITION_Y_bits = 21

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_LOCALPOSITION_Y_lsb = 22

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_LOCALPOSITION_Y_mf = 8192.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_LOCALCOVARIANCE_XX_bits = 20

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_LOCALCOVARIANCE_XX_lsb = 2

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_LOCALCOVARIANCE_XX_mf = 524288.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_SPARE_bits = 2

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_SPARE_lsb = 0

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W6_SPARE_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_GLOBALPOSITION_X_bits = 27

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_GLOBALPOSITION_X_lsb = 37

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_GLOBALPOSITION_X_mf = 65536.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_GLOBALPOSITION_Y_bits = 27

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_GLOBALPOSITION_Y_lsb = 10

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_GLOBALPOSITION_Y_mf = 65536.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_CHANNELS_IN_PHI_bits = 6

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_CHANNELS_IN_PHI_lsb = 4

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_CHANNELS_IN_PHI_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_SPARE_bits = 4

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_SPARE_lsb = 0

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W7_SPARE_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W8_IDENTIFIER_bits = 64

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W8_IDENTIFIER_lsb = 0

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W8_IDENTIFIER_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_GLOBALPOSITION_Z_bits = 29

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_GLOBALPOSITION_Z_lsb = 35

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_GLOBALPOSITION_Z_mf = 65536.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_LASTWORD_bits = 1

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_LASTWORD_lsb = 34

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_LASTWORD_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_INDEX_bits = 32

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_INDEX_lsb = 2

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_INDEX_mf = 1.

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_SPARE_bits = 2

const int	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_SPARE_lsb = 0

const float	FPGADataFormatUtilities::EDM_STRIPCLUSTER_W9_SPARE_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_FLAG = 0x77

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W1_FLAG_bits = 8

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W1_FLAG_lsb = 56

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W1_FLAG_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W1_ID_HASH_bits = 32

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W1_ID_HASH_lsb = 24

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W1_ID_HASH_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W1_SPARE_bits = 24

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W1_SPARE_lsb = 0

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W1_SPARE_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W2_RDO_LIST_W1_bits = 64

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W2_RDO_LIST_W1_lsb = 0

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W2_RDO_LIST_W1_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W3_RDO_LIST_W2_bits = 64

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W3_RDO_LIST_W2_lsb = 0

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W3_RDO_LIST_W2_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W4_RDO_LIST_W3_bits = 64

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W4_RDO_LIST_W3_lsb = 0

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W4_RDO_LIST_W3_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W5_RDO_LIST_W4_bits = 64

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W5_RDO_LIST_W4_lsb = 0

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W5_RDO_LIST_W4_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_LOCALPOSITION_X_bits = 20

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_LOCALPOSITION_X_lsb = 44

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_LOCALPOSITION_X_mf = 8192.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_LOCALPOSITION_Y_bits = 20

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_LOCALPOSITION_Y_lsb = 24

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_LOCALPOSITION_Y_mf = 8192.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_CHANNELS_IN_PHI_bits = 8

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_CHANNELS_IN_PHI_lsb = 16

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_CHANNELS_IN_PHI_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_CHANNELS_IN_ETA_bits = 8

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_CHANNELS_IN_ETA_lsb = 8

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_CHANNELS_IN_ETA_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_WIDTH_IN_ETA_bits = 8

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_WIDTH_IN_ETA_lsb = 0

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W6_WIDTH_IN_ETA_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_LOCALCOVARIANCE_XX_bits = 20

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_LOCALCOVARIANCE_XX_lsb = 44

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_LOCALCOVARIANCE_XX_mf = 524288.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_LOCALCOVARIANCE_YY_bits = 20

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_LOCALCOVARIANCE_YY_lsb = 24

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_LOCALCOVARIANCE_YY_mf = 524288.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_OMEGA_X_bits = 12

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_OMEGA_X_lsb = 12

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_OMEGA_X_mf = 4096.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_OMEGA_Y_bits = 12

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_OMEGA_Y_lsb = 0

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W7_OMEGA_Y_mf = 4096.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W8_GLOBALPOSITION_X_bits = 26

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W8_GLOBALPOSITION_X_lsb = 38

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W8_GLOBALPOSITION_X_mf = 65536.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W8_GLOBALPOSITION_Y_bits = 26

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W8_GLOBALPOSITION_Y_lsb = 12

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W8_GLOBALPOSITION_Y_mf = 65536.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W8_SPARE_bits = 12

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W8_SPARE_lsb = 0

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W8_SPARE_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W9_IDENTIFIER_bits = 64

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W9_IDENTIFIER_lsb = 0

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W9_IDENTIFIER_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_GLOBALPOSITION_Z_bits = 29

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_GLOBALPOSITION_Z_lsb = 35

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_GLOBALPOSITION_Z_mf = 65536.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_TOTAL_TOT_bits = 9

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_TOTAL_TOT_lsb = 26

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_TOTAL_TOT_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_LASTWORD_bits = 1

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_LASTWORD_lsb = 25

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_LASTWORD_mf = 1.

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_INDEX_bits = 25

const int	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_INDEX_lsb = 0

const float	FPGADataFormatUtilities::EDM_PIXELCLUSTER_W10_INDEX_mf = 1.

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_LAST_bits = 1

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_LAST_lsb = 63

const float	FPGADataFormatUtilities::PIXEL_EF_RDO_LAST_mf = 1.

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_ROW_bits = 10

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_ROW_lsb = 53

const float	FPGADataFormatUtilities::PIXEL_EF_RDO_ROW_mf = 1.

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_COL_bits = 10

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_COL_lsb = 43

const float	FPGADataFormatUtilities::PIXEL_EF_RDO_COL_mf = 1.

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_TOT_bits = 4

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_TOT_lsb = 39

const float	FPGADataFormatUtilities::PIXEL_EF_RDO_TOT_mf = 1.

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_LVL1_bits = 1

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_LVL1_lsb = 38

const float	FPGADataFormatUtilities::PIXEL_EF_RDO_LVL1_mf = 1.

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_SPARE_bits = 38

const int	FPGADataFormatUtilities::PIXEL_EF_RDO_SPARE_lsb = 0

const float	FPGADataFormatUtilities::PIXEL_EF_RDO_SPARE_mf = 1.

const int	FPGADataFormatUtilities::STRIP_EF_RDO_LAST_bits = 1

const int	FPGADataFormatUtilities::STRIP_EF_RDO_LAST_lsb = 31

const float	FPGADataFormatUtilities::STRIP_EF_RDO_LAST_mf = 1.

const int	FPGADataFormatUtilities::STRIP_EF_RDO_CHIPID_bits = 4

const int	FPGADataFormatUtilities::STRIP_EF_RDO_CHIPID_lsb = 27

const float	FPGADataFormatUtilities::STRIP_EF_RDO_CHIPID_mf = 1.

const int	FPGADataFormatUtilities::STRIP_EF_RDO_STRIP_NUM_bits = 8

const int	FPGADataFormatUtilities::STRIP_EF_RDO_STRIP_NUM_lsb = 19

const float	FPGADataFormatUtilities::STRIP_EF_RDO_STRIP_NUM_mf = 1.

const int	FPGADataFormatUtilities::STRIP_EF_RDO_CLUSTER_MAP_bits = 3

const int	FPGADataFormatUtilities::STRIP_EF_RDO_CLUSTER_MAP_lsb = 16

const float	FPGADataFormatUtilities::STRIP_EF_RDO_CLUSTER_MAP_mf = 1.

const int	FPGADataFormatUtilities::STRIP_EF_RDO_SPARE_bits = 16

const int	FPGADataFormatUtilities::STRIP_EF_RDO_SPARE_lsb = 0

const float	FPGADataFormatUtilities::STRIP_EF_RDO_SPARE_mf = 1.

Typedefs
typedef struct FPGADataFormatUtilities::EVT_HDR_w1	FPGADataFormatUtilities::EVT_HDR_w1

typedef struct FPGADataFormatUtilities::EVT_HDR_w2	FPGADataFormatUtilities::EVT_HDR_w2

typedef struct FPGADataFormatUtilities::EVT_HDR_w3	FPGADataFormatUtilities::EVT_HDR_w3

typedef struct FPGADataFormatUtilities::EVT_FTR_w1	FPGADataFormatUtilities::EVT_FTR_w1

typedef struct FPGADataFormatUtilities::EVT_FTR_w2	FPGADataFormatUtilities::EVT_FTR_w2

typedef struct FPGADataFormatUtilities::EVT_FTR_w3	FPGADataFormatUtilities::EVT_FTR_w3

typedef struct FPGADataFormatUtilities::M_HDR_w1	FPGADataFormatUtilities::M_HDR_w1

typedef struct FPGADataFormatUtilities::SLICE_HDR_w1	FPGADataFormatUtilities::SLICE_HDR_w1

typedef struct FPGADataFormatUtilities::RD_HDR_w1	FPGADataFormatUtilities::RD_HDR_w1

typedef struct FPGADataFormatUtilities::RD_HDR_w2	FPGADataFormatUtilities::RD_HDR_w2

typedef struct FPGADataFormatUtilities::GTRACK_HDR_w1	FPGADataFormatUtilities::GTRACK_HDR_w1

typedef struct FPGADataFormatUtilities::GTRACK_HDR_w2	FPGADataFormatUtilities::GTRACK_HDR_w2

typedef struct FPGADataFormatUtilities::GTRACK_HDR_w3	FPGADataFormatUtilities::GTRACK_HDR_w3

typedef struct FPGADataFormatUtilities::PIXEL_CLUSTER	FPGADataFormatUtilities::PIXEL_CLUSTER

typedef struct FPGADataFormatUtilities::STRIP_CLUSTER	FPGADataFormatUtilities::STRIP_CLUSTER

typedef struct FPGADataFormatUtilities::GHITZ_w1	FPGADataFormatUtilities::GHITZ_w1

typedef struct FPGADataFormatUtilities::GHITZ_w2	FPGADataFormatUtilities::GHITZ_w2

typedef struct FPGADataFormatUtilities::EDM_STRIPCLUSTER_w1	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w1

typedef struct FPGADataFormatUtilities::EDM_STRIPCLUSTER_w2	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w2

typedef struct FPGADataFormatUtilities::EDM_STRIPCLUSTER_w3	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w3

typedef struct FPGADataFormatUtilities::EDM_STRIPCLUSTER_w4	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w4

typedef struct FPGADataFormatUtilities::EDM_STRIPCLUSTER_w5	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w5

typedef struct FPGADataFormatUtilities::EDM_STRIPCLUSTER_w6	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w6

typedef struct FPGADataFormatUtilities::EDM_STRIPCLUSTER_w7	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w7

typedef struct FPGADataFormatUtilities::EDM_STRIPCLUSTER_w8	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w8

typedef struct FPGADataFormatUtilities::EDM_STRIPCLUSTER_w9	FPGADataFormatUtilities::EDM_STRIPCLUSTER_w9

typedef struct FPGADataFormatUtilities::EDM_PIXELCLUSTER_w1	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w1

typedef struct FPGADataFormatUtilities::EDM_PIXELCLUSTER_w2	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w2

typedef struct FPGADataFormatUtilities::EDM_PIXELCLUSTER_w3	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w3

typedef struct FPGADataFormatUtilities::EDM_PIXELCLUSTER_w4	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w4

typedef struct FPGADataFormatUtilities::EDM_PIXELCLUSTER_w5	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w5

typedef struct FPGADataFormatUtilities::EDM_PIXELCLUSTER_w6	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w6

typedef struct FPGADataFormatUtilities::EDM_PIXELCLUSTER_w7	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w7

typedef struct FPGADataFormatUtilities::EDM_PIXELCLUSTER_w8	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w8

typedef struct FPGADataFormatUtilities::EDM_PIXELCLUSTER_w9	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w9

typedef struct FPGADataFormatUtilities::EDM_PIXELCLUSTER_w10	FPGADataFormatUtilities::EDM_PIXELCLUSTER_w10

typedef struct FPGADataFormatUtilities::PIXEL_EF_RDO	FPGADataFormatUtilities::PIXEL_EF_RDO

typedef struct FPGADataFormatUtilities::STRIP_EF_RDO	FPGADataFormatUtilities::STRIP_EF_RDO

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