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FPGATrackSimSecondStageAlg Class Reference

#include <FPGATrackSimSecondStageAlg.h>

Inheritance diagram for FPGATrackSimSecondStageAlg:

Public Member Functions

 FPGATrackSimSecondStageAlg (const std::string &name, ISvcLocator *pSvcLocator)
virtual ~FPGATrackSimSecondStageAlg ()=default
virtual StatusCode initialize () override
virtual StatusCode execute (const EventContext &ctx) override
 Execute method.
virtual StatusCode finalize () override
virtual StatusCode sysInitialize () override
 Override sysInitialize.
virtual bool isClonable () const override
 Specify if the algorithm is clonable.
virtual StatusCode sysExecute (const EventContext &ctx) override
 Execute an algorithm.
virtual const DataObjIDColl & extraOutputDeps () const override
 Return the list of extra output dependencies.
virtual bool filterPassed (const EventContext &ctx) const
 Get filter decision:
virtual void setFilterPassed (bool state, const EventContext &ctx) const
 Set filter decision:
ServiceHandle< StoreGateSvc > & evtStore ()
 The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.
const ServiceHandle< StoreGateSvc > & detStore () const
 The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.
virtual StatusCode sysStart () override
 Handle START transition.
virtual std::vector< Gaudi::DataHandle * > inputHandles () const override
 Return this algorithm's input handles.
virtual std::vector< Gaudi::DataHandle * > outputHandles () const override
 Return this algorithm's output handles.
Gaudi::Details::PropertyBase & declareProperty (Gaudi::Property< T, V, H > &t)
void updateVHKA (Gaudi::Details::PropertyBase &)
MsgStream & msg () const
bool msgLvl (const MSG::Level lvl) const

Protected Member Functions

virtual bool isReEntrant () const override final
 Legacy algorithms are not thread-safe.
void renounceArray (SG::VarHandleKeyArray &handlesArray)
 remove all handles from I/O resolution
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > renounce (T &h)
void extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
 Add StoreName to extra input/output deps as needed.

Private Types

typedef ServiceHandle< StoreGateSvcStoreGateSvc_t

Private Member Functions

StatusCode writeOutputData (const std::vector< FPGATrackSimRoad > &roads_2nd, std::vector< FPGATrackSimTrack > const &tracks_2nd, FPGATrackSimDataFlowInfo const *dataFlowInfo)
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
 specialization for handling Gaudi::Property<SG::VarHandleKey>

Private Attributes

std::string m_description
ToolHandle< IFPGATrackSimTrackExtensionToolm_trackExtensionTool {this, "TrackExtensionTool", "FPGATrackSimTrackExtensionTool", "Track extensoin tool"}
ToolHandle< FPGATrackSimHoughRootOutputToolm_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
ToolHandle< FPGATrackSimNNTrackToolm_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool_2nd", "NN Track Tool"}
ToolHandle< FPGATrackSimTrackFitterToolm_trackFitterTool {this, "TrackFitter_2nd", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_2nd", "2nd stage track fit tool"}
ToolHandle< FPGATrackSimOverlapRemovalToolm_overlapRemovalTool {this, "OverlapRemoval_2nd", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_2nd", "2nd stage overlap removal tool"}
ToolHandle< FPGATrackSimOutputHeaderToolm_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
ServiceHandle< IFPGATrackSimMappingSvcm_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
ServiceHandle< IFPGATrackSimEventSelectionSvcm_evtSel {this, "eventSelector", "", "Event selection Svc"}
ServiceHandle< IChronoStatSvc > m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
Gaudi::Property< int > m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
Gaudi::Property< bool > m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
Gaudi::Property< bool > m_doTracking {this, "tracking", false, "flag to enable the tracking"}
Gaudi::Property< bool > m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
Gaudi::Property< bool > m_doHoughRootOutput2nd {this, "DoHoughRootOutput2nd", false, "Dump output from the Hough Transform to flat ntuples"}
Gaudi::Property< bool > m_doNNTrack_2nd {this, "DoNNTrack_2nd", false, "Run NN track filtering for 2nd Stage"}
Gaudi::Property< bool > m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
Gaudi::Property< float > m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
Gaudi::Property< bool > m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
Gaudi::Property< int > m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
Gaudi::Property< bool > m_passLowestChi2TrackOnly {this, "passLowestChi2TrackOnly", false}
Gaudi::Property< bool > m_doNNPathFinder {this, "doNNPathFinder", false}
Gaudi::Property< bool > m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
Gaudi::Property< bool > m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
Gaudi::Property< std::string > m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for slied hits in output ROOT file." }
Gaudi::Property< std::string > m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
FPGATrackSimLogicalEventInputHeaderm_slicedHitHeader = nullptr
FPGATrackSimLogicalEventOutputHeaderm_logicEventOutputHeader = nullptr
long m_evt = 0
long m_nRoadsTot = 0
long m_nTracksTot = 0
long m_nTracksChi2Tot = 0
long m_nTracksChi2OLRTot = 0
long m_evt_truth = 0
long m_nRoadsFound = 0
long m_nTracksFound = 0
long m_nTracksChi2Found = 0
long m_nTracksChi2OLRFound = 0
unsigned long m_maxNRoadsFound = 0
unsigned long m_maxNTracksTot = 0
unsigned long m_maxNTracksChi2Tot = 0
unsigned long m_maxNTracksChi2OLRTot = 0
ToolHandle< GenericMonitoringToolm_monTool {this,"MonTool", "", "Monitoring tool"}
SG::ReadHandleKey< FPGATrackSimHitCollectionm_FPGAHitKey {this, "FPGATrackSimHitKey", "FPGAHits_2nd", "FPGATrackSim Hits key"}
SG::ReadHandleKey< FPGATrackSimTrackCollectionm_FPGAInputTrackKey {this, "FPGATrackSimTrack1stKey", "FPGATracks_1st", "FPGATrackSim tracks 1st stage key"}
SG::WriteHandleKey< FPGATrackSimRoadCollectionm_FPGARoadKey {this, "FPGATrackSimRoad2ndKey","FPGARoads_2nd","FPGATrackSim Roads 2nd stage key"}
SG::WriteHandleKey< FPGATrackSimTrackCollectionm_FPGATrackKey {this, "FPGATrackSimTrack2ndKey","FPGATracks_2nd","FPGATrackSim Tracks 2nd stage key"}
SG::ReadHandleKey< FPGATrackSimTruthTrackCollectionm_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollectionm_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
SG::ReadHandleKey< FPGATrackSimEventInfom_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
DataObjIDColl m_extendedExtraObjects
 Extra output dependency collection, extended by AthAlgorithmDHUpdate to add symlinks.
StoreGateSvc_t m_evtStore
 Pointer to StoreGate (event store by default).
StoreGateSvc_t m_detStore
 Pointer to StoreGate (detector store by default).
std::vector< SG::VarHandleKeyArray * > m_vhka
bool m_varHandleArraysDeclared

Detailed Description

Definition at line 45 of file FPGATrackSimSecondStageAlg.h.

Member Typedef Documentation

◆ StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::StoreGateSvc_t
privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

◆ FPGATrackSimSecondStageAlg()

FPGATrackSimSecondStageAlg::FPGATrackSimSecondStageAlg ( const std::string & name,
ISvcLocator * pSvcLocator )

Definition at line 44 of file FPGATrackSimSecondStageAlg.cxx.

44 :
45 AthAlgorithm(name, pSvcLocator)
46{
47}
AthAlgorithm(const std::string &name, ISvcLocator *pSvcLocator)
Constructor.

◆ ~FPGATrackSimSecondStageAlg()

virtual FPGATrackSimSecondStageAlg::~FPGATrackSimSecondStageAlg ( )
virtualdefault

Member Function Documentation

◆ declareGaudiProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > & hndl,
const SG::VarHandleKeyType &  )
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

158 {
160 hndl.value(),
161 hndl.documentation());
162
163 }
Gaudi::Details::PropertyBase & declareProperty(Gaudi::Property< T, V, H > &t)

◆ declareProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::declareProperty ( Gaudi::Property< T, V, H > & t)
inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

145 {
146 typedef typename SG::HandleClassifier<T>::type htype;
148 }
Gaudi::Details::PropertyBase & declareGaudiProperty(Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
specialization for handling Gaudi::Property<SG::VarHandleKey>

◆ detStore()

const ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::detStore ( ) const
inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

◆ evtStore()

ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::evtStore ( )
inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

◆ execute()

StatusCode FPGATrackSimSecondStageAlg::execute ( const EventContext & ctx)
overridevirtual

Execute method.

Implements AthAlgorithm.

Definition at line 103 of file FPGATrackSimSecondStageAlg.cxx.

104{
105 // Get reference to hits from StoreGate.
106 // Hits have been procesed by the DataPrep algorithm. Now, we need to read them.
107 // If they aren't passed, assume this means we are done.
108 SG::ReadHandle<FPGATrackSimHitCollection> FPGAHits(m_FPGAHitKey, ctx);
109 if (!FPGAHits.isValid()) {
110 if (m_evt == 0) {
111 ATH_MSG_WARNING("Didn't receive FPGAHits_2nd on first event; assuming no input events.");
112 }
113 SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
114 if (!appMgr) {
115 ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
116 return StatusCode::FAILURE;
117 }
118 return appMgr->stopRun();
119 }
120
121 SG::ReadHandle<FPGATrackSimTrackCollection> FPGAInputTracks (m_FPGAInputTrackKey, ctx);
122 if (!FPGAInputTracks.isValid()) {
123 SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
124 if (!appMgr) {
125 ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
126 return StatusCode::FAILURE;
127 }
128 return appMgr->stopRun();
129 }
130
131 // Set up write handles.
132 SG::WriteHandle<FPGATrackSimRoadCollection> FPGARoads_2nd (m_FPGARoadKey, ctx);
133
134 ATH_CHECK( FPGARoads_2nd.record (std::make_unique<FPGATrackSimRoadCollection>()));
135
136 SG::WriteHandle<FPGATrackSimTrackCollection> FPGATracks_2ndHandle (m_FPGATrackKey, ctx);
137 ATH_CHECK(FPGATracks_2ndHandle.record (std::make_unique<FPGATrackSimTrackCollection>()));
138 {
139 std::optional<Athena::Chrono> chrono;
140 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: EventSelection", m_chrono.get());
141 // Query the event selection service to make sure this event passed cuts.
142 if (!m_evtSel->getSelectedEvent()) {
143 ATH_MSG_DEBUG("Event skipped by: " << m_evtSel->name());
144 return StatusCode::SUCCESS;
145 }
146
147 // Event passes cuts, count it. technically, DataPrep does this now.
148 m_evt++;
149 }
150
151 // If we get here, FPGAHits_2nd is valid, create non-owning pointers.
152 std::vector<std::shared_ptr<const FPGATrackSimHit>> phits_2nd;
153 phits_2nd.reserve(FPGAHits->size());
154 for (const FPGATrackSimHit* hit : *FPGAHits) {
155 phits_2nd.emplace_back(hit, [](const FPGATrackSimHit*) {});
156 }
157
158 ATH_MSG_DEBUG("Retrieved " << phits_2nd.size() << " hits and " << FPGAInputTracks->size() << " tracks from storegate");
159
160 // Get truth tracks from DataPrep as well.
161 SG::ReadHandle<FPGATrackSimTruthTrackCollection> FPGATruthTracks(m_FPGATruthTrackKey, ctx);
162 if (!FPGATruthTracks.isValid()) {
163 ATH_MSG_ERROR("Could not find FPGA Truth Track Collection with key " << FPGATruthTracks.key());
164 return StatusCode::FAILURE;
165 }
166
167 // Same for offline tracks.
168 SG::ReadHandle<FPGATrackSimOfflineTrackCollection> FPGAOfflineTracks(m_FPGAOfflineTrackKey, ctx);
169 if (!FPGAOfflineTracks.isValid()) {
170 ATH_MSG_ERROR("Could not find FPGA Offline Track Collection with key " << FPGAOfflineTracks.key());
171 return StatusCode::FAILURE;
172 }
173
174 // Same for event info structure. all we need this for is to propagate to our event info structures.
175 SG::ReadHandle<FPGATrackSimEventInfo> FPGAEventInfo(m_FPGAEventInfoKey, ctx);
176 if (!FPGAEventInfo.isValid()) {
177 ATH_MSG_ERROR("Could not find FPGA Event Info with key " << FPGAEventInfo.key());
178 return StatusCode::FAILURE;
179 }
180 FPGATrackSimEventInfo eventInfo = *FPGAEventInfo.cptr();
181 m_slicedHitHeader->newEvent(eventInfo);
182
183 // Get second stage roads from tracks.
184 std::vector<FPGATrackSimRoad> roads;
185
186 {
187 std::optional<Athena::Chrono> chrono;
188 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Track Extension", m_chrono.get());
189 // Use the track extension tool to actually produce a new set of roads.
190 ATH_CHECK(m_trackExtensionTool->extendTracks(phits_2nd, *FPGAInputTracks, roads));
191
192 for (auto const& road : roads) {
193 FPGARoads_2nd->push_back(road);
194 }
195 }
196
197 auto mon_nroads = Monitored::Scalar<unsigned>("nroads_2nd", roads.size());
198 unsigned bitmask_best(0);
199 unsigned nhit_best(0);
200 for (auto const &road : roads) {
201 unsigned bitmask = road.getHitLayers();
202 if (road.getNHitLayers() > nhit_best) {
203 nhit_best = road.getNHitLayers();
204 bitmask_best = bitmask;
205 }
206 for (size_t l = 0; l < m_FPGATrackSimMapping->PlaneMap_2nd(0)->getNLogiLayers(); l++) {
207 if (bitmask & (1 << l)) {
208 auto mon_layerIDs = Monitored::Scalar<unsigned>("layerIDs_2nd",l);
209 Monitored::Group(m_monTool,mon_layerIDs);
210 }
211 }
212 }
213
214 for (size_t l = 0; l < m_FPGATrackSimMapping->PlaneMap_2nd(0)->getNLogiLayers(); l++) {
215 if (bitmask_best & (1 << l)) {
216 auto mon_layerIDs_best = Monitored::Scalar<unsigned>("layerIDs_2nd_best",l);
217 Monitored::Group(m_monTool,mon_layerIDs_best);
218 }
219 }
220 Monitored::Group(m_monTool, mon_nroads);
221
222 // NOTE: for now we don't support road filtering again in the second stage.
223 auto mon_nroads_postfilter = Monitored::Scalar<unsigned>("nroads_2nd_postfilter", roads.size());
224 Monitored::Group(m_monTool, mon_nroads_postfilter);
225
226 // Get tracks, again, after extrapolation.
227 // All of this code is effectively copied from LogicalHitsProcessAlg, except we use 2nd stage now.
228 std::vector<FPGATrackSimTrack> tracks;
229 {
230 std::optional<Athena::Chrono> chrono;
231 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Track Extraction", m_chrono.get());
232 if (m_doTracking) {
233 if (m_doNNTrack_2nd) {
234 ATH_MSG_DEBUG("Performing NN tracking");
235 ATH_CHECK(m_NNTrackTool->getTracks_2nd(roads, tracks));
236 } else {
237 ATH_MSG_DEBUG("Performing Linear tracking");
238
239 if (m_passLowestChi2TrackOnly) { // Pass only the lowest chi2 track per road
240
241 std::vector<FPGATrackSimTrack> filteredTracks;
242
243 for (const auto& road : roads) {
244 // Collect tracks for the current road
245 std::vector<FPGATrackSimTrack> tracksForCurrentRoad;
246 std::vector<FPGATrackSimRoad> roadVec = {road};
247 ATH_CHECK(m_trackFitterTool->getTracks(roadVec, tracksForCurrentRoad, m_evtSel->getMin(), m_evtSel->getMax()));
248
249 // Find and keep the best track (lowest chi2) for this road
250 if (!tracksForCurrentRoad.empty()) {
251 auto bestTrackIter = std::min_element(
252 tracksForCurrentRoad.begin(), tracksForCurrentRoad.end(),
253 [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
254 return a.getChi2ndof() < b.getChi2ndof();
255 });
256
257 if (bestTrackIter != tracksForCurrentRoad.end() && bestTrackIter->getChi2ndof() < 1.e15) {
258 filteredTracks.push_back(*bestTrackIter);
259
260 // Monitor chi2 of the best track
261 auto mon_chi2 = Monitored::Scalar<float>("chi2_2nd_all", bestTrackIter->getChi2ndof());
262 Monitored::Group(m_monTool, mon_chi2);
263 }
264 }
265 }
266
267 // Update tracks with filtered tracks
268 tracks = std::move(filteredTracks);
269
270 // Monitor the best chi2 across all roads
271 if (!tracks.empty()) {
272 float bestChi2Overall = std::min_element(
273 tracks.begin(), tracks.end(),
274 [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
275 return a.getChi2ndof() < b.getChi2ndof();
276 })->getChi2ndof();
277
278 auto mon_best_chi2 = Monitored::Scalar<float>("best_chi2_2nd", bestChi2Overall);
279 Monitored::Group(m_monTool, mon_best_chi2);
280 }
281 } else { // Pass all tracks with chi2 < 1e15
282 ATH_CHECK(m_trackFitterTool->getTracks(roads, tracks, m_evtSel->getMin(), m_evtSel->getMax()));
283 float bestchi2 = 1.e15;
284 for (const FPGATrackSimTrack& track : tracks) {
285 float chi2 = track.getChi2ndof();
286 if (chi2 < bestchi2) bestchi2 = chi2;
287 auto mon_chi2 = Monitored::Scalar<float>("chi2_2nd_all", chi2);
288 Monitored::Group(m_monTool, mon_chi2);
289 }
290 auto mon_best_chi2 = Monitored::Scalar<float>("best_chi2_2nd", bestchi2);
291 Monitored::Group(m_monTool, mon_best_chi2);
292 }
293 }
294 } else {
295 // No tracking; just run road to track
296 roadsToTrack(roads, tracks, m_FPGATrackSimMapping->PlaneMap_2nd(0));
297 }
298 }
299 auto mon_ntracks = Monitored::Scalar<unsigned>("ntrack_2nd", tracks.size());
300 Monitored::Group(m_monTool,mon_ntracks);
301
302 // Overlap removal
303 {
304 std::optional<Athena::Chrono> chrono;
305 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Overlap Removal", m_chrono.get());
306 ATH_CHECK(m_overlapRemovalTool->runOverlapRemoval(tracks));
307 }
308 {
309 std::optional<Athena::Chrono> chrono;
310 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Parameter Estimation", m_chrono.get());
311 // If running NN Track tool, now we get the track parameters (it's slow so we only do it for tracks passing OLR)
313 ATH_CHECK(m_NNTrackTool->setTrackParameters(tracks,false,m_evtSel->getMin(), m_evtSel->getMax()));
314 }
315 }
316 const auto& truthtracks = *FPGATruthTracks;
317 const auto& offlineTracks = *FPGAOfflineTracks;
318
319 // Optionally loop over tracks and set track parameters to truth
320 {
321 std::optional<Athena::Chrono> chrono;
322 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Truth Param Override", m_chrono.get());
323 if (m_SetTruthParametersForTracks >= 0 && truthtracks.size() > 0) {
324 for (auto track : tracks) {
326 track.setQOverPt(truthtracks.front().getQOverPt());
327 else if (m_SetTruthParametersForTracks != 1)
328 track.setD0(truthtracks.front().getD0());
329 else if (m_SetTruthParametersForTracks != 2)
330 track.setPhi(truthtracks.front().getPhi());
331 else if (m_SetTruthParametersForTracks != 3)
332 track.setZ0(truthtracks.front().getZ0());
333 else if (m_SetTruthParametersForTracks != 4)
334 track.setEta(truthtracks.front().getEta());
335 }
336 }
337 }
338
339 unsigned ntrackOLRChi2 = 0;
340 {
341 std::optional<Athena::Chrono> chrono;
342 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Track Counting", m_chrono.get());
343 for (const FPGATrackSimTrack& track : tracks) {
344 if (track.getChi2ndof() < m_trackScoreCut.value()) {
346 if (track.passedOR()) {
347 ntrackOLRChi2++;
349
350 // For tracks passing overlap removal-- record the chi2 so we can figure out the right cut.
351 float chi2olr = track.getChi2ndof();
352 auto mon_chi2_or = Monitored::Scalar<float>("chi2_2nd_afterOLR", chi2olr);
353 Monitored::Group(m_monTool, mon_chi2_or);
354 }
355 }
356 }
357 auto mon_ntracks_olr = Monitored::Scalar<unsigned>("ntrack_2nd_afterOLR", ntrackOLRChi2);
358 Monitored::Group(m_monTool,mon_ntracks_olr);
359 }
360
361 m_nRoadsTot += roads.size();
362 m_nTracksTot += tracks.size();
363
364 // Do some simple monitoring of efficiencies. okay, we need truth tracks here.
365 {
366 std::optional<Athena::Chrono> chrono;
367 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Efficiency Monitoring", m_chrono.get());
368 if (truthtracks.size() > 0) {
369 m_evt_truth++;
370 auto passroad = Monitored::Scalar<bool>("eff_road_2nd",(roads.size() > 0));
371 auto passtrack = Monitored::Scalar<bool>("eff_track_2nd",(tracks.size() > 0));
372 auto truthpT_zoom = Monitored::Scalar<float>("pT_zoom",truthtracks.front().getPt()*0.001);
373 auto truthpT = Monitored::Scalar<float>("pT",truthtracks.front().getPt()*0.001);
374 auto trutheta = Monitored::Scalar<float>("eta",truthtracks.front().getEta());
375 auto truthphi= Monitored::Scalar<float>("phi",truthtracks.front().getPhi());
376 auto truthd0= Monitored::Scalar<float>("d0",truthtracks.front().getD0());
377 auto truthz0= Monitored::Scalar<float>("z0",truthtracks.front().getZ0());
378 if (roads.size() > 0) m_nRoadsFound++;
379 if (roads.size() > m_maxNRoadsFound) m_maxNRoadsFound = roads.size();
380
381 unsigned npasschi2(0);
382 unsigned npasschi2OLR(0);
383
384 if (tracks.size() > 0) {
386 if (tracks.size() > m_maxNTracksTot) m_maxNTracksTot = tracks.size();
387 for (const auto& track : tracks) {
388 if (track.getChi2ndof() < m_trackScoreCut.value()) {
389 npasschi2++;
390 if (track.passedOR()) {
391 npasschi2OLR++;
392 }
393 }
394 }
395 }
396 if (npasschi2 > m_maxNTracksChi2Tot) m_maxNTracksChi2Tot = npasschi2;
397 if (npasschi2OLR > m_maxNTracksChi2OLRTot) m_maxNTracksChi2OLRTot = npasschi2OLR;
398 if (npasschi2 > 0) m_nTracksChi2Found++;
399 if (npasschi2OLR > 0) m_nTracksChi2OLRFound++;
400
401 auto passtrackchi2 = Monitored::Scalar<bool>("eff_track_chi2_2nd",(npasschi2 > 0));
402 Monitored::Group(m_monTool,passroad,passtrack,truthpT_zoom,truthpT,trutheta,truthphi,truthd0,truthz0,passtrackchi2);
403 }
404 }
405
406 {
407 std::optional<Athena::Chrono> chrono;
408 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Write Tracks", m_chrono.get());
409 for (const FPGATrackSimTrack& track : tracks) FPGATracks_2ndHandle->push_back(track);
410 }
411
412 // Write the output and reset
413 {
414 std::optional<Athena::Chrono> chrono;
415 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Output", m_chrono.get());
416 if (m_writeOutputData) {
417 auto dataFlowInfo = std::make_unique<FPGATrackSimDataFlowInfo>();
418 ATH_CHECK(writeOutputData(roads, tracks, dataFlowInfo.get()));
419 }
420
422 ATH_MSG_DEBUG("Running HoughRootOutputTool in 2nd stage.");
423 ATH_CHECK(m_houghRootOutputTool->fillTree(tracks, truthtracks, offlineTracks, phits_2nd, m_writeOutNonSPStripHits, true));
424 }
425 }
426
427 // Reset data pointers
428 m_slicedHitHeader->reset();
430
431 return StatusCode::SUCCESS;
432}
#define ATH_CHECK
Evaluate an expression and check for errors.
#define ATH_MSG_ERROR(x)
#define ATH_MSG_WARNING(x)
#define ATH_MSG_DEBUG(x)
void roadsToTrack(std::vector< FPGATrackSimRoad > &roads, std::vector< FPGATrackSimTrack > &track_cands, const FPGATrackSimPlaneMap *pmap)
static Double_t a
ToolHandle< IFPGATrackSimTrackExtensionTool > m_trackExtensionTool
SG::WriteHandleKey< FPGATrackSimRoadCollection > m_FPGARoadKey
ServiceHandle< IChronoStatSvc > m_chrono
Gaudi::Property< float > m_trackScoreCut
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollection > m_FPGAOfflineTrackKey
ToolHandle< GenericMonitoringTool > m_monTool
SG::WriteHandleKey< FPGATrackSimTrackCollection > m_FPGATrackKey
SG::ReadHandleKey< FPGATrackSimTrackCollection > m_FPGAInputTrackKey
SG::ReadHandleKey< FPGATrackSimTruthTrackCollection > m_FPGATruthTrackKey
Gaudi::Property< bool > m_writeOutNonSPStripHits
FPGATrackSimLogicalEventOutputHeader * m_logicEventOutputHeader
SG::ReadHandleKey< FPGATrackSimEventInfo > m_FPGAEventInfoKey
Gaudi::Property< bool > m_doHoughRootOutput2nd
ToolHandle< FPGATrackSimHoughRootOutputTool > m_houghRootOutputTool
Gaudi::Property< bool > m_doNNTrack_2nd
ServiceHandle< IFPGATrackSimEventSelectionSvc > m_evtSel
ToolHandle< FPGATrackSimNNTrackTool > m_NNTrackTool
Gaudi::Property< int > m_SetTruthParametersForTracks
FPGATrackSimLogicalEventInputHeader * m_slicedHitHeader
ToolHandle< FPGATrackSimTrackFitterTool > m_trackFitterTool
ServiceHandle< IFPGATrackSimMappingSvc > m_FPGATrackSimMapping
StatusCode writeOutputData(const std::vector< FPGATrackSimRoad > &roads_2nd, std::vector< FPGATrackSimTrack > const &tracks_2nd, FPGATrackSimDataFlowInfo const *dataFlowInfo)
Gaudi::Property< bool > m_passLowestChi2TrackOnly
ToolHandle< FPGATrackSimOverlapRemovalTool > m_overlapRemovalTool
Gaudi::Property< bool > m_writeOutputData
SG::ReadHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey
double chi2(TH1 *h0, TH1 *h1)
l
Printing final latex table to .tex output file.
constexpr bool enableBenchmark

◆ extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase & ExtraDeps)
protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

◆ extraOutputDeps()

const DataObjIDColl & AthCommonAlgorithm< Gaudi::Algorithm >::extraOutputDeps ( ) const
overridevirtualinherited

Return the list of extra output dependencies.

This list is extended to include symlinks implied by inheritance relations.

Definition at line 89 of file AthCommonAlgorithm.cxx.

54{
55 // If we didn't find any symlinks to add, just return the collection
56 // from the base class. Otherwise, return the extended collection.
57 if (!m_extendedExtraObjects.empty()) {
59 }
61}
Common base class for algorithms.

◆ filterPassed()

virtual bool AthCommonAlgorithm< Gaudi::Algorithm >::filterPassed ( const EventContext & ctx) const
inlinevirtualinherited

Get filter decision:

Definition at line 93 of file AthCommonAlgorithm.h.

93 {
94 return execState( ctx ).filterPassed();
95 }
virtual bool filterPassed(const EventContext &ctx) const
Get filter decision:

◆ finalize()

StatusCode FPGATrackSimSecondStageAlg::finalize ( )
overridevirtual

Definition at line 465 of file FPGATrackSimSecondStageAlg.cxx.

466{
467 ATH_MSG_INFO("PRINTING FPGATRACKSIM SIMPLE STATS: SECOND STAGE");
468 ATH_MSG_INFO("========================================================================================");
469 ATH_MSG_INFO("Ran on events = " << m_evt);
470 ATH_MSG_INFO("Inclusive efficiency to find a road = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nRoadsFound/(float)m_evt_truth)));
471 ATH_MSG_INFO("Inclusive efficiency to find a track = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksFound/(float)m_evt_truth)));
472 ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2Found/(float)m_evt_truth)));
473 ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 and OLR = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRFound/(float)m_evt_truth)));
474
475
476 ATH_MSG_INFO("Number of 2nd stage roads/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nRoadsTot/(float)m_evt)));
477 ATH_MSG_INFO("Number of 2nd stage track combinations/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksTot/(float)m_evt)));
478 ATH_MSG_INFO("Number of 2nd stage tracks passing chi2/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2Tot/(float)m_evt)));
479 ATH_MSG_INFO("Number of 2nd stage tracks passing chi2 and OLR/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRTot/(float)m_evt)));
480 ATH_MSG_INFO("========================================================================================");
481
482 ATH_MSG_INFO("Max number of 2nd stage roads in an event = " << m_maxNRoadsFound);
483 ATH_MSG_INFO("Max number of 2nd stage track combinations in an event = " << m_maxNTracksTot);
484 ATH_MSG_INFO("Max number of 2nd stage tracks passing chi2 in an event = " << m_maxNTracksChi2Tot);
485 ATH_MSG_INFO("Max number of 2nd stage tracks passing chi2 and OLR in an event = " << m_maxNTracksChi2OLRTot);
486 ATH_MSG_INFO("========================================================================================");
487 return StatusCode::SUCCESS;
488}
#define ATH_MSG_INFO(x)

◆ initialize()

StatusCode FPGATrackSimSecondStageAlg::initialize ( )
overridevirtual

Definition at line 50 of file FPGATrackSimSecondStageAlg.cxx.

51{
52 std::stringstream ss(m_description);
53 std::string line;
54 ATH_MSG_INFO("Tag config:");
55 if (!m_description.empty()) {
56 while (std::getline(ss, line, '\n')) {
57 ATH_MSG_INFO('\t' << line);
58 }
59 }
60
61 ATH_CHECK(m_houghRootOutputTool.retrieve(EnableTool{m_doHoughRootOutput2nd}));
62 ATH_CHECK(m_NNTrackTool.retrieve(EnableTool{m_doNNTrack_2nd}));
63
64 ATH_CHECK(m_trackFitterTool.retrieve(EnableTool{m_doTracking}));
66 ATH_CHECK(m_writeOutputTool.retrieve());
69
70 ATH_MSG_DEBUG("initialize() Instantiating root objects");
71
72 // This file should only need to generate one input and output branch.
73 m_slicedHitHeader = m_writeOutputTool->addInputBranch(m_sliceBranch.value(), true);
74 m_logicEventOutputHeader = m_writeOutputTool->addOutputBranch(m_outputBranch.value(), true);
75
76 // Connect the sliced hit tool accordingly. This may need to be a separate flag.
78
79 ATH_MSG_DEBUG("initialize() Setting branch");
80
81 if (!m_monTool.empty())
82 ATH_CHECK(m_monTool.retrieve());
83
84 ATH_CHECK( m_FPGAInputTrackKey.initialize());
85 ATH_CHECK( m_FPGARoadKey.initialize() );
86 ATH_CHECK( m_FPGATrackKey.initialize() );
87 ATH_CHECK( m_FPGAHitKey.initialize() );
88 ATH_CHECK( m_FPGATruthTrackKey.initialize() );
89 ATH_CHECK( m_FPGAOfflineTrackKey.initialize() );
90 ATH_CHECK( m_FPGAEventInfoKey.initialize() );
91
92 ATH_CHECK( m_chrono.retrieve() );
93 ATH_MSG_DEBUG("initialize() Finished");
94
95 return StatusCode::SUCCESS;
96}
static Double_t ss
Gaudi::Property< std::string > m_outputBranch
ToolHandle< FPGATrackSimOutputHeaderTool > m_writeOutputTool
Gaudi::Property< std::string > m_sliceBranch

◆ inputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::inputHandles ( ) const
overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ isClonable()

virtual bool AthCommonAlgorithm< Gaudi::Algorithm >::isClonable ( ) const
inlineoverridevirtualinherited

Specify if the algorithm is clonable.

Only relevant for non-reentrant algorithms. Actual number of clones needs to be set via the "Cardinality" property.

Reimplemented in AFP_DigiTop, AlgB, AlgT, BCM_Digitization, CscDigitBuilder, CscDigitToCscRDO, G4AtlasAlg, G4RunAlg, HGTD_Digitization, HiveAlgBase, InDet::GNNSeedingTrackMaker, InDet::SCT_Clusterization, InDet::SiSPGNNTrackMaker, InDet::SiSPSeededTrackFinder, InDet::SiTrackerSpacePointFinder, ISF::SimKernelMT, ITk::StripDigitization, ITkPixelCablingAlg, ITkStripCablingAlg, LArHitEMapMaker, LArTTL1Maker, LUCID_DigiTop, LVL1::L1TopoSimulation, MergeCalibHits, MergeGenericMuonSimHitColl, MergeHijingPars, MergeMcEventCollection, MergeTrackRecordCollection, MergeTruthJets, MergeTruthParticles, MuonDigitizer, PileUpMTAlg, PixelDigitization, RoIBResultToxAOD, SCT_ByteStreamErrorsTestAlg, SCT_CablingCondAlgFromCoraCool, SCT_CablingCondAlgFromText, SCT_ConditionsParameterTestAlg, SCT_ConditionsSummaryTestAlg, SCT_ConfigurationConditionsTestAlg, SCT_Digitization, SCT_FlaggedConditionTestAlg, SCT_LinkMaskingTestAlg, SCT_MajorityConditionsTestAlg, SCT_ModuleVetoTestAlg, SCT_MonitorConditionsTestAlg, SCT_PrepDataToxAOD, SCT_RawDataToxAOD, SCT_ReadCalibChipDataTestAlg, SCT_ReadCalibDataTestAlg, SCT_RODVetoTestAlg, SCT_SensorsTestAlg, SCT_SiliconConditionsTestAlg, SCT_StripVetoTestAlg, SCT_TdaqEnabledTestAlg, SCT_TestCablingAlg, SCTEventFlagWriter, SCTRawDataProvider, SCTSiLorentzAngleTestAlg, SCTSiPropertiesTestAlg, SGInputLoader, Simulation::BeamEffectsAlg, TileHitVecToCnt, TileMuonFitter, TilePulseForTileMuonReceiver, TileRawChannelMaker, TRTDigitization, and ZDC_DigiTop.

Definition at line 68 of file AthCommonAlgorithm.h.

68 {
69 return true;
70 }

◆ isReEntrant()

virtual bool AthAlgorithm::isReEntrant ( ) const
inlinefinaloverrideprotectedvirtualinherited

Legacy algorithms are not thread-safe.

Definition at line 47 of file AthAlgorithm.h.

47{ return false; }

◆ msg()

MsgStream & AthCommonMsg< Gaudi::Algorithm >::msg ( ) const
inlineinherited

Definition at line 24 of file AthCommonMsg.h.

24 {
25 return this->msgStream();
26 }

◆ msgLvl()

bool AthCommonMsg< Gaudi::Algorithm >::msgLvl ( const MSG::Level lvl) const
inlineinherited

Definition at line 30 of file AthCommonMsg.h.

30 {
31 return this->msgLevel(lvl);
32 }

◆ outputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::outputHandles ( ) const
overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ renounce()

std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::renounce ( T & h)
inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

381 {
382 h.renounce();
384 }
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > renounce(T &h)

◆ renounceArray()

void AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::renounceArray ( SG::VarHandleKeyArray & handlesArray)
inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

364 {
366 }

◆ setFilterPassed()

virtual void AthCommonAlgorithm< Gaudi::Algorithm >::setFilterPassed ( bool state,
const EventContext & ctx ) const
inlinevirtualinherited

Set filter decision:

Reimplemented in AthFilterAlgorithm.

Definition at line 99 of file AthCommonAlgorithm.h.

99 {
101 }
virtual void setFilterPassed(bool state, const EventContext &ctx) const
Set filter decision:

◆ sysExecute()

StatusCode AthCommonAlgorithm< Gaudi::Algorithm >::sysExecute ( const EventContext & ctx)
overridevirtualinherited

Execute an algorithm.

We override this in order to work around an issue with the Algorithm base class storing the event context in a member variable that can cause crashes in MT jobs.

Reimplemented in AthAnalysisAlgorithm.

Definition at line 80 of file AthCommonAlgorithm.cxx.

41{
42 return BaseAlg::sysExecute (ctx);
43}

◆ sysInitialize()

StatusCode AthCommonAlgorithm< Gaudi::Algorithm >::sysInitialize ( )
overridevirtualinherited

Override sysInitialize.

Override sysInitialize from the base class.

Loop through all output handles, and if they're WriteCondHandles, automatically register them and this Algorithm with the CondSvc

Scan through all outputHandles, and if they're WriteCondHandles, register them with the CondSvc

Reimplemented from AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >.

Reimplemented in AthAnalysisAlgorithm, AthFilterAlgorithm, AthHistogramAlgorithm, HypoBase, InputMakerBase, and PyAthena::Alg.

Definition at line 60 of file AthCommonAlgorithm.cxx.

71 {
73
74 if (sc.isFailure()) {
75 return sc;
76 }
77
78 ServiceHandle<ICondSvc> cs("CondSvc",name());
79 for (auto h : outputHandles()) {
80 if (h->isCondition() && h->mode() == Gaudi::DataHandle::Writer) {
81 // do this inside the loop so we don't create the CondSvc until needed
82 if ( cs.retrieve().isFailure() ) {
83 ATH_MSG_WARNING("no CondSvc found: won't autoreg WriteCondHandles");
85 }
86 if (cs->regHandle(this,*h).isFailure()) {
88 ATH_MSG_ERROR("unable to register WriteCondHandle " << h->fullKey()
89 << " with CondSvc");
90 }
91 }
92 }
93 return sc;
94}
virtual StatusCode sysInitialize() override
virtual std::vector< Gaudi::DataHandle * > outputHandles() const override

◆ sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::sysStart ( )
overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

◆ updateVHKA()

void AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::updateVHKA ( Gaudi::Details::PropertyBase & )
inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

308 {
309 // debug() << "updateVHKA for property " << p.name() << " " << p.toString()
310 // << " size: " << m_vhka.size() << endmsg;
311 for (auto &a : m_vhka) {
313 for (auto k : keys) {
314 k->setOwner(this);
315 }
316 }
317 }

◆ writeOutputData()

StatusCode FPGATrackSimSecondStageAlg::writeOutputData ( const std::vector< FPGATrackSimRoad > & roads_2nd,
std::vector< FPGATrackSimTrack > const & tracks_2nd,
FPGATrackSimDataFlowInfo const * dataFlowInfo )
private

Definition at line 435 of file FPGATrackSimSecondStageAlg.cxx.

438{
440
441 ATH_MSG_DEBUG("NFPGATrackSimRoads_2nd = " << roads_2nd.size() << ", NFPGATrackSimTracks_2nd = " << tracks_2nd.size());
442
443 if (!m_writeOutputData) return StatusCode::SUCCESS;
444 m_logicEventOutputHeader->reserveFPGATrackSimRoads_2nd(roads_2nd.size());
445 m_logicEventOutputHeader->addFPGATrackSimRoads_2nd(roads_2nd);
446 if (m_doTracking) {
447 m_logicEventOutputHeader->reserveFPGATrackSimTracks_2nd(tracks_2nd.size());
448 m_logicEventOutputHeader->addFPGATrackSimTracks_2nd(tracks_2nd);
449 }
450
451
452 m_logicEventOutputHeader->setDataFlowInfo(*dataFlowInfo);
453 ATH_MSG_DEBUG(m_logicEventOutputHeader->getDataFlowInfo());
454
455 // It would be nice to rearrange this so both algorithms use one instance of this tool, I think.
456 // Which means that dataprep can't call writeData because that does Fill().
457 ATH_CHECK(m_writeOutputTool->writeData());
458
459 return StatusCode::SUCCESS;
460}

Member Data Documentation

◆ m_chrono

ServiceHandle<IChronoStatSvc> FPGATrackSimSecondStageAlg::m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
private

Definition at line 75 of file FPGATrackSimSecondStageAlg.h.

75{this,"ChronoStatSvc","ChronoStatSvc"};

◆ m_description

std::string FPGATrackSimSecondStageAlg::m_description
private

Definition at line 57 of file FPGATrackSimSecondStageAlg.h.

◆ m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::m_detStore
privateinherited

Pointer to StoreGate (detector store by default).

Definition at line 393 of file AthCommonDataStore.h.

◆ m_doHoughRootOutput2nd

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doHoughRootOutput2nd {this, "DoHoughRootOutput2nd", false, "Dump output from the Hough Transform to flat ntuples"}
private

Definition at line 82 of file FPGATrackSimSecondStageAlg.h.

82{this, "DoHoughRootOutput2nd", false, "Dump output from the Hough Transform to flat ntuples"};

◆ m_doMissingHitsChecks

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
private

Definition at line 81 of file FPGATrackSimSecondStageAlg.h.

81{this, "DoMissingHitsChecks", false};

◆ m_doNNPathFinder

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doNNPathFinder {this, "doNNPathFinder", false}
private

Definition at line 89 of file FPGATrackSimSecondStageAlg.h.

89{this, "doNNPathFinder", false};

◆ m_doNNTrack_2nd

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doNNTrack_2nd {this, "DoNNTrack_2nd", false, "Run NN track filtering for 2nd Stage"}
private

Definition at line 83 of file FPGATrackSimSecondStageAlg.h.

83{this, "DoNNTrack_2nd", false, "Run NN track filtering for 2nd Stage"};

◆ m_doSpacepoints

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
private

Definition at line 79 of file FPGATrackSimSecondStageAlg.h.

79{this, "Spacepoints", false, "flag to enable the spacepoint formation"};

◆ m_doTracking

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doTracking {this, "tracking", false, "flag to enable the tracking"}
private

Definition at line 80 of file FPGATrackSimSecondStageAlg.h.

80{this, "tracking", false, "flag to enable the tracking"};

◆ m_evt

long FPGATrackSimSecondStageAlg::m_evt = 0
private

Definition at line 108 of file FPGATrackSimSecondStageAlg.h.

◆ m_evt_truth

long FPGATrackSimSecondStageAlg::m_evt_truth = 0
private

Definition at line 114 of file FPGATrackSimSecondStageAlg.h.

◆ m_evtSel

ServiceHandle<IFPGATrackSimEventSelectionSvc> FPGATrackSimSecondStageAlg::m_evtSel {this, "eventSelector", "", "Event selection Svc"}
private

Definition at line 73 of file FPGATrackSimSecondStageAlg.h.

73{this, "eventSelector", "", "Event selection Svc"};

◆ m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::m_evtStore
privateinherited

Pointer to StoreGate (event store by default).

Definition at line 390 of file AthCommonDataStore.h.

◆ m_extendedExtraObjects

DataObjIDColl AthCommonAlgorithm< Gaudi::Algorithm >::m_extendedExtraObjects
privateinherited

Extra output dependency collection, extended by AthAlgorithmDHUpdate to add symlinks.

Empty if no symlinks were found.

Definition at line 108 of file AthCommonAlgorithm.h.

◆ m_filterRoads

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
private

Definition at line 94 of file FPGATrackSimSecondStageAlg.h.

94{this, "FilterRoads", false, "enable first road filter"};

◆ m_filterRoads2

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
private

Definition at line 95 of file FPGATrackSimSecondStageAlg.h.

95{this, "FilterRoads2", false, "enable second road filter"};

◆ m_FPGAEventInfoKey

SG::ReadHandleKey<FPGATrackSimEventInfo> FPGATrackSimSecondStageAlg::m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
private

Definition at line 143 of file FPGATrackSimSecondStageAlg.h.

143{this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"};

◆ m_FPGAHitKey

SG::ReadHandleKey<FPGATrackSimHitCollection> FPGATrackSimSecondStageAlg::m_FPGAHitKey {this, "FPGATrackSimHitKey", "FPGAHits_2nd", "FPGATrackSim Hits key"}
private

Definition at line 133 of file FPGATrackSimSecondStageAlg.h.

133{this, "FPGATrackSimHitKey", "FPGAHits_2nd", "FPGATrackSim Hits key"};

◆ m_FPGAInputTrackKey

SG::ReadHandleKey<FPGATrackSimTrackCollection> FPGATrackSimSecondStageAlg::m_FPGAInputTrackKey {this, "FPGATrackSimTrack1stKey", "FPGATracks_1st", "FPGATrackSim tracks 1st stage key"}
private

Definition at line 134 of file FPGATrackSimSecondStageAlg.h.

134{this, "FPGATrackSimTrack1stKey", "FPGATracks_1st", "FPGATrackSim tracks 1st stage key"};

◆ m_FPGAOfflineTrackKey

SG::ReadHandleKey<FPGATrackSimOfflineTrackCollection> FPGATrackSimSecondStageAlg::m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
private

Definition at line 142 of file FPGATrackSimSecondStageAlg.h.

142{this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"};

◆ m_FPGARoadKey

SG::WriteHandleKey<FPGATrackSimRoadCollection> FPGATrackSimSecondStageAlg::m_FPGARoadKey {this, "FPGATrackSimRoad2ndKey","FPGARoads_2nd","FPGATrackSim Roads 2nd stage key"}
private

Definition at line 137 of file FPGATrackSimSecondStageAlg.h.

137{this, "FPGATrackSimRoad2ndKey","FPGARoads_2nd","FPGATrackSim Roads 2nd stage key"};

◆ m_FPGATrackKey

SG::WriteHandleKey<FPGATrackSimTrackCollection> FPGATrackSimSecondStageAlg::m_FPGATrackKey {this, "FPGATrackSimTrack2ndKey","FPGATracks_2nd","FPGATrackSim Tracks 2nd stage key"}
private

Definition at line 138 of file FPGATrackSimSecondStageAlg.h.

138{this, "FPGATrackSimTrack2ndKey","FPGATracks_2nd","FPGATrackSim Tracks 2nd stage key"};

◆ m_FPGATrackSimMapping

ServiceHandle<IFPGATrackSimMappingSvc> FPGATrackSimSecondStageAlg::m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
private

Definition at line 72 of file FPGATrackSimSecondStageAlg.h.

72{this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"};

◆ m_FPGATruthTrackKey

SG::ReadHandleKey<FPGATrackSimTruthTrackCollection> FPGATrackSimSecondStageAlg::m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
private

Definition at line 141 of file FPGATrackSimSecondStageAlg.h.

141{this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"};

◆ m_houghRootOutputTool

ToolHandle<FPGATrackSimHoughRootOutputTool> FPGATrackSimSecondStageAlg::m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
private

Definition at line 63 of file FPGATrackSimSecondStageAlg.h.

63{this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"};

◆ m_logicEventOutputHeader

FPGATrackSimLogicalEventOutputHeader* FPGATrackSimSecondStageAlg::m_logicEventOutputHeader = nullptr
private

Definition at line 103 of file FPGATrackSimSecondStageAlg.h.

◆ m_maxNRoadsFound

unsigned long FPGATrackSimSecondStageAlg::m_maxNRoadsFound = 0
private

Definition at line 120 of file FPGATrackSimSecondStageAlg.h.

◆ m_maxNTracksChi2OLRTot

unsigned long FPGATrackSimSecondStageAlg::m_maxNTracksChi2OLRTot = 0
private

Definition at line 123 of file FPGATrackSimSecondStageAlg.h.

◆ m_maxNTracksChi2Tot

unsigned long FPGATrackSimSecondStageAlg::m_maxNTracksChi2Tot = 0
private

Definition at line 122 of file FPGATrackSimSecondStageAlg.h.

◆ m_maxNTracksTot

unsigned long FPGATrackSimSecondStageAlg::m_maxNTracksTot = 0
private

Definition at line 121 of file FPGATrackSimSecondStageAlg.h.

◆ m_monTool

ToolHandle<GenericMonitoringTool> FPGATrackSimSecondStageAlg::m_monTool {this,"MonTool", "", "Monitoring tool"}
private

Definition at line 130 of file FPGATrackSimSecondStageAlg.h.

130{this,"MonTool", "", "Monitoring tool"};

◆ m_NNTrackTool

ToolHandle<FPGATrackSimNNTrackTool> FPGATrackSimSecondStageAlg::m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool_2nd", "NN Track Tool"}
private

Definition at line 66 of file FPGATrackSimSecondStageAlg.h.

66{this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool_2nd", "NN Track Tool"};

◆ m_nRoadsFound

long FPGATrackSimSecondStageAlg::m_nRoadsFound = 0
private

Definition at line 115 of file FPGATrackSimSecondStageAlg.h.

◆ m_nRoadsTot

long FPGATrackSimSecondStageAlg::m_nRoadsTot = 0
private

Definition at line 109 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksChi2Found

long FPGATrackSimSecondStageAlg::m_nTracksChi2Found = 0
private

Definition at line 117 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksChi2OLRFound

long FPGATrackSimSecondStageAlg::m_nTracksChi2OLRFound = 0
private

Definition at line 118 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksChi2OLRTot

long FPGATrackSimSecondStageAlg::m_nTracksChi2OLRTot = 0
private

Definition at line 112 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksChi2Tot

long FPGATrackSimSecondStageAlg::m_nTracksChi2Tot = 0
private

Definition at line 111 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksFound

long FPGATrackSimSecondStageAlg::m_nTracksFound = 0
private

Definition at line 116 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksTot

long FPGATrackSimSecondStageAlg::m_nTracksTot = 0
private

Definition at line 110 of file FPGATrackSimSecondStageAlg.h.

◆ m_NumOfHitPerGrouping

Gaudi::Property<int> FPGATrackSimSecondStageAlg::m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
private

Definition at line 87 of file FPGATrackSimSecondStageAlg.h.

87{ this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"};

◆ m_outputBranch

Gaudi::Property<std::string> FPGATrackSimSecondStageAlg::m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
private

Definition at line 99 of file FPGATrackSimSecondStageAlg.h.

99{this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." };

◆ m_overlapRemovalTool

ToolHandle<FPGATrackSimOverlapRemovalTool> FPGATrackSimSecondStageAlg::m_overlapRemovalTool {this, "OverlapRemoval_2nd", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_2nd", "2nd stage overlap removal tool"}
private

Definition at line 68 of file FPGATrackSimSecondStageAlg.h.

68{this, "OverlapRemoval_2nd", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_2nd", "2nd stage overlap removal tool"};

◆ m_passLowestChi2TrackOnly

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_passLowestChi2TrackOnly {this, "passLowestChi2TrackOnly", false}
private

Definition at line 88 of file FPGATrackSimSecondStageAlg.h.

88{this, "passLowestChi2TrackOnly", false};

◆ m_SetTruthParametersForTracks

Gaudi::Property<int> FPGATrackSimSecondStageAlg::m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
private

Definition at line 78 of file FPGATrackSimSecondStageAlg.h.

78{this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"};

◆ m_sliceBranch

Gaudi::Property<std::string> FPGATrackSimSecondStageAlg::m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for slied hits in output ROOT file." }
private

Definition at line 98 of file FPGATrackSimSecondStageAlg.h.

98{this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for slied hits in output ROOT file." };

◆ m_slicedHitHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimSecondStageAlg::m_slicedHitHeader = nullptr
private

Definition at line 102 of file FPGATrackSimSecondStageAlg.h.

◆ m_trackExtensionTool

ToolHandle<IFPGATrackSimTrackExtensionTool> FPGATrackSimSecondStageAlg::m_trackExtensionTool {this, "TrackExtensionTool", "FPGATrackSimTrackExtensionTool", "Track extensoin tool"}
private

Definition at line 60 of file FPGATrackSimSecondStageAlg.h.

60{this, "TrackExtensionTool", "FPGATrackSimTrackExtensionTool", "Track extensoin tool"};

◆ m_trackFitterTool

ToolHandle<FPGATrackSimTrackFitterTool> FPGATrackSimSecondStageAlg::m_trackFitterTool {this, "TrackFitter_2nd", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_2nd", "2nd stage track fit tool"}
private

Definition at line 67 of file FPGATrackSimSecondStageAlg.h.

67{this, "TrackFitter_2nd", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_2nd", "2nd stage track fit tool"};

◆ m_trackScoreCut

Gaudi::Property<float> FPGATrackSimSecondStageAlg::m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
private

Definition at line 85 of file FPGATrackSimSecondStageAlg.h.

85{this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." };

◆ m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::m_varHandleArraysDeclared
privateinherited

Definition at line 399 of file AthCommonDataStore.h.

◆ m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< Gaudi::Algorithm > >::m_vhka
privateinherited

Definition at line 398 of file AthCommonDataStore.h.

◆ m_writeOutNonSPStripHits

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
private

Definition at line 86 of file FPGATrackSimSecondStageAlg.h.

86{this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"};

◆ m_writeOutputData

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
private

Definition at line 84 of file FPGATrackSimSecondStageAlg.h.

84{this, "writeOutputData", true,"write the output TTree"};

◆ m_writeOutputTool

ToolHandle<FPGATrackSimOutputHeaderTool> FPGATrackSimSecondStageAlg::m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
private

Definition at line 71 of file FPGATrackSimSecondStageAlg.h.

71{this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"};

The documentation for this class was generated from the following files: