FPGATrackSimSecondStageAlg Class Reference

#include <FPGATrackSimSecondStageAlg.h>

Inheritance diagram for FPGATrackSimSecondStageAlg:

Public Member Functions
	FPGATrackSimSecondStageAlg (const std::string &name, ISvcLocator *pSvcLocator)
virtual	~FPGATrackSimSecondStageAlg ()=default
virtual StatusCode	initialize () override
virtual StatusCode	execute () override
virtual StatusCode	finalize () override
virtual StatusCode	sysInitialize () override
	Override sysInitialize.
virtual const DataObjIDColl &	extraOutputDeps () const override
	Return the list of extra output dependencies.
ServiceHandle< StoreGateSvc > &	evtStore ()
	The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.
const ServiceHandle< StoreGateSvc > &	detStore () const
	The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.
virtual StatusCode	sysStart () override
	Handle START transition.
virtual std::vector< Gaudi::DataHandle * >	inputHandles () const override
	Return this algorithm's input handles.
virtual std::vector< Gaudi::DataHandle * >	outputHandles () const override
	Return this algorithm's output handles.
Gaudi::Details::PropertyBase &	declareProperty (Gaudi::Property< T, V, H > &t)
void	updateVHKA (Gaudi::Details::PropertyBase &)
MsgStream &	msg () const
bool	msgLvl (const MSG::Level lvl) const

Protected Member Functions
void	renounceArray (SG::VarHandleKeyArray &handlesArray)
	remove all handles from I/O resolution
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void >	renounce (T &h)
void	extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
	Add StoreName to extra input/output deps as needed.

Private Types
typedef ServiceHandle< StoreGateSvc >	StoreGateSvc_t

Private Member Functions
StatusCode	writeOutputData (const std::vector< FPGATrackSimRoad > &roads_2nd, std::vector< FPGATrackSimTrack > const &tracks_2nd, FPGATrackSimDataFlowInfo const *dataFlowInfo)
Gaudi::Details::PropertyBase &	declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
	specialization for handling Gaudi::Property<SG::VarHandleKey>

Private Attributes
std::string	m_description
ToolHandle< IFPGATrackSimTrackExtensionTool >	m_trackExtensionTool {this, "TrackExtensionTool", "FPGATrackSimTrackExtensionTool", "Track extensoin tool"}
ToolHandle< FPGATrackSimHoughRootOutputTool >	m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
ToolHandle< FPGATrackSimNNTrackTool >	m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool_2nd", "NN Track Tool"}
ToolHandle< FPGATrackSimTrackFitterTool >	m_trackFitterTool {this, "TrackFitter_2nd", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_2nd", "2nd stage track fit tool"}
ToolHandle< FPGATrackSimOverlapRemovalTool >	m_overlapRemovalTool {this, "OverlapRemoval_2nd", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_2nd", "2nd stage overlap removal tool"}
ToolHandle< FPGATrackSimOutputHeaderTool >	m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
ServiceHandle< IFPGATrackSimMappingSvc >	m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
ServiceHandle< IFPGATrackSimEventSelectionSvc >	m_evtSel {this, "eventSelector", "", "Event selection Svc"}
ServiceHandle< IChronoStatSvc >	m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
Gaudi::Property< int >	m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
Gaudi::Property< bool >	m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
Gaudi::Property< bool >	m_doTracking {this, "tracking", false, "flag to enable the tracking"}
Gaudi::Property< bool >	m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
Gaudi::Property< bool >	m_doHoughRootOutput2nd {this, "DoHoughRootOutput2nd", false, "Dump output from the Hough Transform to flat ntuples"}
Gaudi::Property< bool >	m_doNNTrack_2nd {this, "DoNNTrack_2nd", false, "Run NN track filtering for 2nd Stage"}
Gaudi::Property< bool >	m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
Gaudi::Property< float >	m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
Gaudi::Property< bool >	m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
Gaudi::Property< int >	m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
Gaudi::Property< bool >	m_passLowestChi2TrackOnly {this, "passLowestChi2TrackOnly", false}
Gaudi::Property< bool >	m_doNNPathFinder {this, "doNNPathFinder", false}
Gaudi::Property< bool >	m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
Gaudi::Property< bool >	m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
Gaudi::Property< std::string >	m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for slied hits in output ROOT file." }
Gaudi::Property< std::string >	m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
FPGATrackSimLogicalEventInputHeader *	m_slicedHitHeader = nullptr
FPGATrackSimLogicalEventOutputHeader *	m_logicEventOutputHeader = nullptr
long	m_evt = 0
long	m_nRoadsTot = 0
long	m_nTracksTot = 0
long	m_nTracksChi2Tot = 0
long	m_nTracksChi2OLRTot = 0
long	m_evt_truth = 0
long	m_nRoadsFound = 0
long	m_nTracksFound = 0
long	m_nTracksChi2Found = 0
long	m_nTracksChi2OLRFound = 0
unsigned long	m_maxNRoadsFound = 0
unsigned long	m_maxNTracksTot = 0
unsigned long	m_maxNTracksChi2Tot = 0
unsigned long	m_maxNTracksChi2OLRTot = 0
ToolHandle< GenericMonitoringTool >	m_monTool {this,"MonTool", "", "Monitoring tool"}
SG::ReadHandleKey< FPGATrackSimHitCollection >	m_FPGAHitKey {this, "FPGATrackSimHitKey", "FPGAHits_2nd", "FPGATrackSim Hits key"}
SG::ReadHandleKey< FPGATrackSimTrackCollection >	m_FPGAInputTrackKey {this, "FPGATrackSimTrack1stKey", "FPGATracks_1st", "FPGATrackSim tracks 1st stage key"}
SG::WriteHandleKey< FPGATrackSimHitContainer >	m_FPGAHitInRoadsKey {this, "FPGATrackSimHitInRoads2ndKey","FPGAHitsInRoads_2nd","FPGATrackSim Hits in 1st stage roads key"}
SG::WriteHandleKey< FPGATrackSimRoadCollection >	m_FPGARoadKey {this, "FPGATrackSimRoad2ndKey","FPGARoads_2nd","FPGATrackSim Roads 2nd stage key"}
SG::WriteHandleKey< FPGATrackSimTrackCollection >	m_FPGATrackKey {this, "FPGATrackSimTrack2ndKey","FPGATracks_2nd","FPGATrackSim Tracks 2nd stage key"}
SG::ReadHandleKey< FPGATrackSimTruthTrackCollection >	m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollection >	m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
SG::ReadHandleKey< FPGATrackSimEventInfo >	m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
DataObjIDColl	m_extendedExtraObjects
StoreGateSvc_t	m_evtStore
	Pointer to StoreGate (event store by default)
StoreGateSvc_t	m_detStore
	Pointer to StoreGate (detector store by default)
std::vector< SG::VarHandleKeyArray * >	m_vhka
bool	m_varHandleArraysDeclared

Detailed Description

Definition at line 46 of file FPGATrackSimSecondStageAlg.h.

Member Typedef Documentation

StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< Algorithm > >::StoreGateSvc_t

privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

FPGATrackSimSecondStageAlg()

FPGATrackSimSecondStageAlg::FPGATrackSimSecondStageAlg	(	const std::string &	name,
		ISvcLocator *	pSvcLocator )

Definition at line 44 of file FPGATrackSimSecondStageAlg.cxx.

                                                                                                       :
    AthAlgorithm(name, pSvcLocator)
{
}

~FPGATrackSimSecondStageAlg()

virtual FPGATrackSimSecondStageAlg::~FPGATrackSimSecondStageAlg ( )

virtualdefault

Member Function Documentation

declareGaudiProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > & hndl, const SG::VarHandleKeyType &  )

inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

  {
    return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
                                                       hndl.value(), 
                                                       hndl.documentation());
 
  }

declareProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( Gaudi::Property< T, V, H > & t )

inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

                                                                     {
    typedef typename SG::HandleClassifier<T>::type htype;
    return AthCommonDataStore<PBASE>::declareGaudiProperty(t, htype());
  }

detStore()

const ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< Algorithm > >::detStore ( ) const

inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

{ return m_detStore; }

evtStore()

ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< Algorithm > >::evtStore ( )

inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

{ return m_evtStore; }

execute()

StatusCode FPGATrackSimSecondStageAlg::execute ( )

overridevirtual

Definition at line 104 of file FPGATrackSimSecondStageAlg.cxx.

{
    const EventContext& ctx = getContext();
    // Get reference to hits from StoreGate.
    // Hits have been procesed by the DataPrep algorithm. Now, we need to read them.
    // If they aren't passed, assume this means we are done.
    SG::ReadHandle<FPGATrackSimHitCollection> FPGAHits(m_FPGAHitKey, ctx);
    if (!FPGAHits.isValid()) {
        if (m_evt == 0) {
            ATH_MSG_WARNING("Didn't receive FPGAHits_2nd on first event; assuming no input events.");
        }
        SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
        if (!appMgr) {
            ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
            return StatusCode::FAILURE;
        }
        return appMgr->stopRun();
    }
    
    SG::ReadHandle<FPGATrackSimTrackCollection> FPGAInputTracks (m_FPGAInputTrackKey, ctx);
    if (!FPGAInputTracks.isValid()) {
        SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
        if (!appMgr) {
            ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
            return StatusCode::FAILURE;
        }
        return appMgr->stopRun();
    }
 
    // Set up write handles.
    SG::WriteHandle<FPGATrackSimRoadCollection> FPGARoads_2nd (m_FPGARoadKey, ctx);
    SG::WriteHandle<FPGATrackSimHitContainer> FPGAHitsInRoads_2nd (m_FPGAHitInRoadsKey, ctx);
 
    ATH_CHECK( FPGARoads_2nd.record (std::make_unique<FPGATrackSimRoadCollection>()));
    ATH_CHECK( FPGAHitsInRoads_2nd.record (std::make_unique<FPGATrackSimHitContainer>()));
 
    SG::WriteHandle<FPGATrackSimTrackCollection> FPGATracks_2ndHandle (m_FPGATrackKey, ctx);
    ATH_CHECK(FPGATracks_2ndHandle.record (std::make_unique<FPGATrackSimTrackCollection>()));
    {
        std::optional<Athena::Chrono> chrono;
        if constexpr (enableBenchmark) chrono.emplace("2nd Stage: EventSelection", m_chrono.get());
        // Query the event selection service to make sure this event passed cuts.
        if (!m_evtSel->getSelectedEvent()) {
            ATH_MSG_DEBUG("Event skipped by: " << m_evtSel->name());
            return StatusCode::SUCCESS;
        }
 
        // Event passes cuts, count it. technically, DataPrep does this now.
        m_evt++;
    }
 
    // If we get here, FPGAHits_2nd is valid, copy it over.
    std::vector<std::shared_ptr<const FPGATrackSimHit>> phits_2nd;
    phits_2nd.reserve(FPGAHits->size());
    for (const auto& hit : *FPGAHits) {
        phits_2nd.push_back(std::make_shared<const FPGATrackSimHit>(*hit));
    }
 
    ATH_MSG_DEBUG("Retrieved " << phits_2nd.size() << " hits and " << FPGAInputTracks->size() << " tracks from storegate");
 
    // Get truth tracks from DataPrep as well.
    SG::ReadHandle<FPGATrackSimTruthTrackCollection> FPGATruthTracks(m_FPGATruthTrackKey, ctx);
    if (!FPGATruthTracks.isValid()) {
        ATH_MSG_ERROR("Could not find FPGA Truth Track Collection with key " << FPGATruthTracks.key());
        return StatusCode::FAILURE;
    }
 
    // Same for offline tracks.
    SG::ReadHandle<FPGATrackSimOfflineTrackCollection> FPGAOfflineTracks(m_FPGAOfflineTrackKey, ctx);
    if (!FPGAOfflineTracks.isValid()) {
        ATH_MSG_ERROR("Could not find FPGA Offline Track Collection with key " << FPGAOfflineTracks.key());
        return StatusCode::FAILURE;
    }
 
    // Same for event info structure. all we need this for is to propagate to our event info structures.
    SG::ReadHandle<FPGATrackSimEventInfo> FPGAEventInfo(m_FPGAEventInfoKey, ctx);
    if (!FPGAEventInfo.isValid()) {
        ATH_MSG_ERROR("Could not find FPGA Event Info with key " << FPGAEventInfo.key());
       return StatusCode::FAILURE;
    }
    FPGATrackSimEventInfo eventInfo = *FPGAEventInfo.cptr();
    m_slicedHitHeader->newEvent(eventInfo);
 
    // Get second stage roads from tracks.
    std::vector<FPGATrackSimRoad> roads;
 
    {
        std::optional<Athena::Chrono> chrono;
        if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Track Extension", m_chrono.get());
        // Use the track extension tool to actually produce a new set of roads.
        ATH_CHECK(m_trackExtensionTool->extendTracks(phits_2nd, *FPGAInputTracks, roads));
 
        for (auto const& road : roads) {
            auto road_hits = std::make_unique<FPGATrackSimHitCollection>();
            ATH_MSG_DEBUG("Hough Road X Y: " << road.getX() << " " << road.getY());
            for (size_t l = 0; l < road.getNLayers(); ++l) {
                for (const auto& layerH : road.getHits(l)) {
                    road_hits->push_back(new FPGATrackSimHit(*layerH));
                }
            }
            FPGAHitsInRoads_2nd->push_back(std::move(*road_hits));
            FPGARoads_2nd->push_back(road);
        }
    }
    
    auto mon_nroads = Monitored::Scalar<unsigned>("nroads_2nd", roads.size());
    unsigned bitmask_best(0);
    unsigned nhit_best(0);
    for (auto const &road : roads) {
        unsigned bitmask = road.getHitLayers();
        if (road.getNHitLayers() > nhit_best) {
            nhit_best = road.getNHitLayers();
            bitmask_best = bitmask;
        }
        for (size_t l = 0; l < m_FPGATrackSimMapping->PlaneMap_2nd(0)->getNLogiLayers(); l++) {
            if (bitmask & (1 << l)) {
                auto mon_layerIDs = Monitored::Scalar<unsigned>("layerIDs_2nd",l);
                Monitored::Group(m_monTool,mon_layerIDs);
            }
        }
    }
 
    for (size_t l = 0; l < m_FPGATrackSimMapping->PlaneMap_2nd(0)->getNLogiLayers(); l++) {
        if (bitmask_best & (1 << l)) {
            auto mon_layerIDs_best = Monitored::Scalar<unsigned>("layerIDs_2nd_best",l);
            Monitored::Group(m_monTool,mon_layerIDs_best);
        }
    }
    Monitored::Group(m_monTool, mon_nroads);
 
    // NOTE: for now we don't support road filtering again in the second stage.
    auto mon_nroads_postfilter = Monitored::Scalar<unsigned>("nroads_2nd_postfilter", roads.size());
    Monitored::Group(m_monTool, mon_nroads_postfilter);
 
    // Get tracks, again, after extrapolation.
    // All of this code is effectively copied from LogicalHitsProcessAlg, except we use 2nd stage now.
    std::vector<FPGATrackSimTrack> tracks;
    {
        std::optional<Athena::Chrono> chrono;
        if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Track Extraction", m_chrono.get());
        if (m_doTracking) {
        if (m_doNNTrack_2nd) {
            ATH_MSG_DEBUG("Performing NN tracking");
            ATH_CHECK(m_NNTrackTool->getTracks_2nd(roads, tracks));
        } else {
            ATH_MSG_DEBUG("Performing Linear tracking");
 
            if (m_passLowestChi2TrackOnly) { // Pass only the lowest chi2 track per road
 
                std::vector<FPGATrackSimTrack> filteredTracks;
 
                for (const auto& road : roads) {
                    // Collect tracks for the current road
                    std::vector<FPGATrackSimTrack> tracksForCurrentRoad;
                    std::vector<FPGATrackSimRoad> roadVec = {road};
                    ATH_CHECK(m_trackFitterTool->getTracks(roadVec, tracksForCurrentRoad, m_evtSel->getMin(), m_evtSel->getMax()));
 
                    // Find and keep the best track (lowest chi2) for this road
                    if (!tracksForCurrentRoad.empty()) {
                        auto bestTrackIter = std::min_element(
                            tracksForCurrentRoad.begin(), tracksForCurrentRoad.end(),
                            [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
                                return a.getChi2ndof() < b.getChi2ndof();
                            });
 
                        if (bestTrackIter != tracksForCurrentRoad.end() && bestTrackIter->getChi2ndof() < 1.e15) {
                            filteredTracks.push_back(*bestTrackIter);
 
                            // Monitor chi2 of the best track
                            auto mon_chi2 = Monitored::Scalar<float>("chi2_2nd_all", bestTrackIter->getChi2ndof());
                            Monitored::Group(m_monTool, mon_chi2);
                        }
                    }
                }
 
                // Update tracks with filtered tracks
                tracks = std::move(filteredTracks);
 
                // Monitor the best chi2 across all roads
                if (!tracks.empty()) {
                    float bestChi2Overall = std::min_element(
                        tracks.begin(), tracks.end(),
                        [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
                            return a.getChi2ndof() < b.getChi2ndof();
                        })->getChi2ndof();
 
                    auto mon_best_chi2 = Monitored::Scalar<float>("best_chi2_2nd", bestChi2Overall);
                    Monitored::Group(m_monTool, mon_best_chi2);
                }
            } else { // Pass all tracks with chi2 < 1e15
                ATH_CHECK(m_trackFitterTool->getTracks(roads, tracks, m_evtSel->getMin(), m_evtSel->getMax()));
                float bestchi2 = 1.e15;
                for (const FPGATrackSimTrack& track : tracks) {
                    float chi2 = track.getChi2ndof();
                    if (chi2 < bestchi2) bestchi2 = chi2;
                    auto mon_chi2 = Monitored::Scalar<float>("chi2_2nd_all", chi2);
                    Monitored::Group(m_monTool, mon_chi2);
                }
                auto mon_best_chi2 = Monitored::Scalar<float>("best_chi2_2nd", bestchi2);
                Monitored::Group(m_monTool, mon_best_chi2);
            }
        }
        } else {
            // No tracking; just run road to track
            roadsToTrack(roads, tracks, m_FPGATrackSimMapping->PlaneMap_2nd(0));
        }
    }
    auto mon_ntracks = Monitored::Scalar<unsigned>("ntrack_2nd", tracks.size());
    Monitored::Group(m_monTool,mon_ntracks);
 
    // Overlap removal
    {
        std::optional<Athena::Chrono> chrono;
        if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Overlap Removal", m_chrono.get());
        ATH_CHECK(m_overlapRemovalTool->runOverlapRemoval(tracks));
    }
    {
        std::optional<Athena::Chrono> chrono;
        if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Parameter Estimation", m_chrono.get());
        // If running NN Track tool, now we get the track parameters (it's slow so we only do it for tracks passing OLR)
        if (m_doTracking && m_doNNTrack_2nd) {
            ATH_CHECK(m_NNTrackTool->setTrackParameters(tracks,false,m_evtSel->getMin(), m_evtSel->getMax()));
        }
    }
    const auto& truthtracks = *FPGATruthTracks;
    const auto& offlineTracks = *FPGAOfflineTracks;
 
    // Optionally loop over tracks and set track parameters to truth
    {
        std::optional<Athena::Chrono> chrono;
        if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Truth Param Override", m_chrono.get());
        if (m_SetTruthParametersForTracks >= 0 && truthtracks.size() > 0) {
            for (auto track : tracks) {
                if (m_SetTruthParametersForTracks != 0)
                    track.setQOverPt(truthtracks.front().getQOverPt());
                else if (m_SetTruthParametersForTracks != 1)
                    track.setD0(truthtracks.front().getD0());
                else if (m_SetTruthParametersForTracks != 2)
                    track.setPhi(truthtracks.front().getPhi());
                else if (m_SetTruthParametersForTracks != 3)
                    track.setZ0(truthtracks.front().getZ0());
                else if (m_SetTruthParametersForTracks != 4)
                    track.setEta(truthtracks.front().getEta());
            }
        }
    }
 
    unsigned ntrackOLRChi2 = 0;
    {
        std::optional<Athena::Chrono> chrono;
        if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Track Counting", m_chrono.get());
        for (const FPGATrackSimTrack& track : tracks) {
            if (track.getChi2ndof() < m_trackScoreCut.value()) {
                m_nTracksChi2Tot++;
                if (track.passedOR()) {
                    ntrackOLRChi2++;
                    m_nTracksChi2OLRTot++;
 
                    // For tracks passing overlap removal-- record the chi2 so we can figure out the right cut.
                    float chi2olr = track.getChi2ndof();
                    auto mon_chi2_or = Monitored::Scalar<float>("chi2_2nd_afterOLR", chi2olr);
                    Monitored::Group(m_monTool, mon_chi2_or);
                }
            }
        }
        auto mon_ntracks_olr = Monitored::Scalar<unsigned>("ntrack_2nd_afterOLR", ntrackOLRChi2);
        Monitored::Group(m_monTool,mon_ntracks_olr);
    }
 
    m_nRoadsTot += roads.size();
    m_nTracksTot += tracks.size();
 
    // Do some simple monitoring of efficiencies. okay, we need truth tracks here.
    {
        std::optional<Athena::Chrono> chrono;
        if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Efficiency Monitoring", m_chrono.get());
        if (truthtracks.size() > 0) {
            m_evt_truth++;
            auto passroad = Monitored::Scalar<bool>("eff_road_2nd",(roads.size() > 0));
            auto passtrack = Monitored::Scalar<bool>("eff_track_2nd",(tracks.size() > 0));
            auto truthpT_zoom = Monitored::Scalar<float>("pT_zoom",truthtracks.front().getPt()*0.001);
            auto truthpT = Monitored::Scalar<float>("pT",truthtracks.front().getPt()*0.001);
            auto trutheta = Monitored::Scalar<float>("eta",truthtracks.front().getEta());
            auto truthphi= Monitored::Scalar<float>("phi",truthtracks.front().getPhi());
            auto truthd0= Monitored::Scalar<float>("d0",truthtracks.front().getD0());
            auto truthz0= Monitored::Scalar<float>("z0",truthtracks.front().getZ0());
            if (roads.size() > 0) m_nRoadsFound++;
            if (roads.size() > m_maxNRoadsFound) m_maxNRoadsFound = roads.size();
 
            unsigned npasschi2(0);
            unsigned npasschi2OLR(0);
 
            if (tracks.size() > 0) {
                m_nTracksFound++;
                if (tracks.size() > m_maxNTracksTot) m_maxNTracksTot = tracks.size();
                for (const auto& track : tracks) {
                    if (track.getChi2ndof() < m_trackScoreCut.value()) {
                        npasschi2++;
                        if (track.passedOR()) {
                            npasschi2OLR++;
                        }
                    }
                }
            }
            if (npasschi2 > m_maxNTracksChi2Tot) m_maxNTracksChi2Tot = npasschi2;
            if (npasschi2OLR > m_maxNTracksChi2OLRTot) m_maxNTracksChi2OLRTot = npasschi2OLR;
            if (npasschi2 > 0) m_nTracksChi2Found++;
            if (npasschi2OLR > 0) m_nTracksChi2OLRFound++;
 
            auto passtrackchi2 = Monitored::Scalar<bool>("eff_track_chi2_2nd",(npasschi2 > 0));
            Monitored::Group(m_monTool,passroad,passtrack,truthpT_zoom,truthpT,trutheta,truthphi,truthd0,truthz0,passtrackchi2);
        }
    }
 
    {
        std::optional<Athena::Chrono> chrono;
        if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Write Tracks", m_chrono.get());
        for (const FPGATrackSimTrack& track : tracks) FPGATracks_2ndHandle->push_back(track);
    }
 
    // Write the output and reset
    {
        std::optional<Athena::Chrono> chrono;
        if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Output", m_chrono.get());
        if (m_writeOutputData)  {
            auto dataFlowInfo = std::make_unique<FPGATrackSimDataFlowInfo>();
            ATH_CHECK(writeOutputData(roads, tracks, dataFlowInfo.get()));
        }
 
        if (m_doHoughRootOutput2nd) {
            ATH_MSG_DEBUG("Running HoughRootOutputTool in 2nd stage.");
            ATH_CHECK(m_houghRootOutputTool->fillTree(tracks, truthtracks, offlineTracks, phits_2nd, m_writeOutNonSPStripHits, true));
        }
    }
 
    // Reset data pointers
    m_slicedHitHeader->reset();
    m_logicEventOutputHeader->reset();
 
    return StatusCode::SUCCESS;
}

extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase & ExtraDeps )

protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

extraOutputDeps()

const DataObjIDColl & AthAlgorithm::extraOutputDeps ( ) const

overridevirtualinherited

Return the list of extra output dependencies.

This list is extended to include symlinks implied by inheritance relations.

Definition at line 50 of file AthAlgorithm.cxx.

{
  // If we didn't find any symlinks to add, just return the collection
  // from the base class.  Otherwise, return the extended collection.
  if (!m_extendedExtraObjects.empty()) {
    return m_extendedExtraObjects;
  }
  return Algorithm::extraOutputDeps();
}

finalize()

StatusCode FPGATrackSimSecondStageAlg::finalize ( )

overridevirtual

Definition at line 477 of file FPGATrackSimSecondStageAlg.cxx.

{
    ATH_MSG_INFO("PRINTING FPGATRACKSIM SIMPLE STATS: SECOND STAGE");
    ATH_MSG_INFO("========================================================================================");
    ATH_MSG_INFO("Ran on events = " << m_evt);
    ATH_MSG_INFO("Inclusive efficiency to find a road = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nRoadsFound/(float)m_evt_truth)));
    ATH_MSG_INFO("Inclusive efficiency to find a track = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksFound/(float)m_evt_truth)));
    ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2Found/(float)m_evt_truth)));
    ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 and OLR = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRFound/(float)m_evt_truth)));
 
 
    ATH_MSG_INFO("Number of 2nd stage roads/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nRoadsTot/(float)m_evt)));
    ATH_MSG_INFO("Number of 2nd stage track combinations/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksTot/(float)m_evt)));
    ATH_MSG_INFO("Number of 2nd stage tracks passing chi2/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2Tot/(float)m_evt)));
    ATH_MSG_INFO("Number of 2nd stage tracks passing chi2 and OLR/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRTot/(float)m_evt)));
    ATH_MSG_INFO("========================================================================================");
 
    ATH_MSG_INFO("Max number of 2nd stage roads in an event = " << m_maxNRoadsFound);
    ATH_MSG_INFO("Max number of 2nd stage track combinations in an event = " << m_maxNTracksTot);
    ATH_MSG_INFO("Max number of 2nd stage tracks passing chi2 in an event = " << m_maxNTracksChi2Tot);
    ATH_MSG_INFO("Max number of 2nd stage tracks passing chi2 and OLR in an event = " << m_maxNTracksChi2OLRTot);
    ATH_MSG_INFO("========================================================================================");
    return StatusCode::SUCCESS;
}

initialize()

StatusCode FPGATrackSimSecondStageAlg::initialize ( )

overridevirtual

Definition at line 50 of file FPGATrackSimSecondStageAlg.cxx.

{
    std::stringstream ss(m_description);
    std::string line;
    ATH_MSG_INFO("Tag config:");
    if (!m_description.empty()) {
        while (std::getline(ss, line, '\n')) {
            ATH_MSG_INFO('\t' << line);
        }
    }
 
    ATH_CHECK(m_houghRootOutputTool.retrieve(EnableTool{m_doHoughRootOutput2nd}));
    ATH_CHECK(m_NNTrackTool.retrieve(EnableTool{m_doNNTrack_2nd}));
 
    ATH_CHECK(m_trackFitterTool.retrieve(EnableTool{m_doTracking}));
    ATH_CHECK(m_overlapRemovalTool.retrieve());
    ATH_CHECK(m_writeOutputTool.retrieve());
    ATH_CHECK(m_FPGATrackSimMapping.retrieve());
    ATH_CHECK(m_trackExtensionTool.retrieve());
 
    ATH_MSG_DEBUG("initialize() Instantiating root objects");
 
    // This file should only need to generate one input and output branch.
    m_slicedHitHeader = m_writeOutputTool->addInputBranch(m_sliceBranch.value(), true);
    m_logicEventOutputHeader = m_writeOutputTool->addOutputBranch(m_outputBranch.value(), true);
 
    // Connect the sliced hit tool accordingly. This may need to be a separate flag.
    if (m_writeOutputData) ATH_CHECK(m_trackExtensionTool->setupSlices(m_slicedHitHeader));
 
    ATH_MSG_DEBUG("initialize() Setting branch");
 
    if (!m_monTool.empty())
        ATH_CHECK(m_monTool.retrieve());
 
    ATH_CHECK( m_FPGAInputTrackKey.initialize());
    ATH_CHECK( m_FPGAHitInRoadsKey.initialize() );
    ATH_CHECK( m_FPGARoadKey.initialize() );
    ATH_CHECK( m_FPGATrackKey.initialize() );
    ATH_CHECK( m_FPGAHitKey.initialize() );
    ATH_CHECK( m_FPGATruthTrackKey.initialize() );
    ATH_CHECK( m_FPGAOfflineTrackKey.initialize() );
    ATH_CHECK( m_FPGAEventInfoKey.initialize() );
 
    ATH_CHECK( m_chrono.retrieve() );
    ATH_MSG_DEBUG("initialize() Finished");
 
    return StatusCode::SUCCESS;
}

inputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< Algorithm > >::inputHandles ( ) const

overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

msg()

MsgStream & AthCommonMsg< Algorithm >::msg ( ) const

inlineinherited

Definition at line 24 of file AthCommonMsg.h.

                                {
    return this->msgStream();
  }

msgLvl()

bool AthCommonMsg< Algorithm >::msgLvl ( const MSG::Level lvl ) const

inlineinherited

Definition at line 30 of file AthCommonMsg.h.

                                               {
    return this->msgLevel(lvl);
  }

outputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< Algorithm > >::outputHandles ( ) const

overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

renounce()

std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > AthCommonDataStore< AthCommonMsg< Algorithm > >::renounce ( T & h )

inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

  {
    h.renounce();
    PBASE::renounce (h);
  }

renounceArray()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::renounceArray ( SG::VarHandleKeyArray & handlesArray )

inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

                                                          {
    handlesArray.renounce();
  }

sysInitialize()

StatusCode AthAlgorithm::sysInitialize ( )

overridevirtualinherited

Override sysInitialize.

Override sysInitialize from the base class.

Loop through all output handles, and if they're WriteCondHandles, automatically register them and this Algorithm with the CondSvc

Scan through all outputHandles, and if they're WriteCondHandles, register them with the CondSvc

Reimplemented from AthCommonDataStore< AthCommonMsg< Algorithm > >.

Reimplemented in AthAnalysisAlgorithm, AthFilterAlgorithm, AthHistogramAlgorithm, and PyAthena::Alg.

Definition at line 66 of file AthAlgorithm.cxx.

                                       {
  StatusCode sc=AthCommonDataStore<AthCommonMsg<Algorithm>>::sysInitialize();
 
  if (sc.isFailure()) {
    return sc;
  }
  ServiceHandle<ICondSvc> cs("CondSvc",name());
  for (auto h : outputHandles()) {
    if (h->isCondition() && h->mode() == Gaudi::DataHandle::Writer) {
      // do this inside the loop so we don't create the CondSvc until needed
      if ( cs.retrieve().isFailure() ) {
        ATH_MSG_WARNING("no CondSvc found: won't autoreg WriteCondHandles");
        return StatusCode::SUCCESS;
      }
      if (cs->regHandle(this,*h).isFailure()) {
        sc = StatusCode::FAILURE;
        ATH_MSG_ERROR("unable to register WriteCondHandle " << h->fullKey()
                      << " with CondSvc");
      }
    }
  }
  return sc;
}

sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< Algorithm > >::sysStart ( )

overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

updateVHKA()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::updateVHKA ( Gaudi::Details::PropertyBase & )

inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

                                               {
    // debug() << "updateVHKA for property " << p.name() << " " << p.toString() 
    //         << "  size: " << m_vhka.size() << endmsg;
    for (auto &a : m_vhka) {
      std::vector<SG::VarHandleKey*> keys = a->keys();
      for (auto k : keys) {
        k->setOwner(this);
      }
    }
  }

writeOutputData()

StatusCode FPGATrackSimSecondStageAlg::writeOutputData ( const std::vector< FPGATrackSimRoad > & roads_2nd, std::vector< FPGATrackSimTrack > const & tracks_2nd, FPGATrackSimDataFlowInfo const * dataFlowInfo )

private

Definition at line 447 of file FPGATrackSimSecondStageAlg.cxx.

{
  m_logicEventOutputHeader->reset();
 
  ATH_MSG_DEBUG("NFPGATrackSimRoads_2nd = " << roads_2nd.size() << ", NFPGATrackSimTracks_2nd = " << tracks_2nd.size());
 
  if (!m_writeOutputData) return StatusCode::SUCCESS;
    m_logicEventOutputHeader->reserveFPGATrackSimRoads_2nd(roads_2nd.size());
    m_logicEventOutputHeader->addFPGATrackSimRoads_2nd(roads_2nd);
  if (m_doTracking) {
    m_logicEventOutputHeader->reserveFPGATrackSimTracks_2nd(tracks_2nd.size());
    m_logicEventOutputHeader->addFPGATrackSimTracks_2nd(tracks_2nd);
  }
 
 
  m_logicEventOutputHeader->setDataFlowInfo(*dataFlowInfo);
  ATH_MSG_DEBUG(m_logicEventOutputHeader->getDataFlowInfo());
 
  // It would be nice to rearrange this so both algorithms use one instance of this tool, I think.
  // Which means that dataprep can't call writeData because that does Fill().
  ATH_CHECK(m_writeOutputTool->writeData());
 
  return StatusCode::SUCCESS;
}

Member Data Documentation

m_chrono

ServiceHandle<IChronoStatSvc> FPGATrackSimSecondStageAlg::m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}

private

Definition at line 76 of file FPGATrackSimSecondStageAlg.h.

{this,"ChronoStatSvc","ChronoStatSvc"};

m_description

std::string FPGATrackSimSecondStageAlg::m_description

private

Definition at line 58 of file FPGATrackSimSecondStageAlg.h.

m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_detStore

privateinherited

Pointer to StoreGate (detector store by default)

Definition at line 393 of file AthCommonDataStore.h.

m_doHoughRootOutput2nd

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doHoughRootOutput2nd {this, "DoHoughRootOutput2nd", false, "Dump output from the Hough Transform to flat ntuples"}

private

Definition at line 83 of file FPGATrackSimSecondStageAlg.h.

{this, "DoHoughRootOutput2nd", false, "Dump output from the Hough Transform to flat ntuples"};

m_doMissingHitsChecks

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}

private

Definition at line 82 of file FPGATrackSimSecondStageAlg.h.

{this, "DoMissingHitsChecks", false};

m_doNNPathFinder

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doNNPathFinder {this, "doNNPathFinder", false}

private

Definition at line 90 of file FPGATrackSimSecondStageAlg.h.

{this, "doNNPathFinder", false};

m_doNNTrack_2nd

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doNNTrack_2nd {this, "DoNNTrack_2nd", false, "Run NN track filtering for 2nd Stage"}

private

Definition at line 84 of file FPGATrackSimSecondStageAlg.h.

{this, "DoNNTrack_2nd", false, "Run NN track filtering for 2nd Stage"};

m_doSpacepoints

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}

private

Definition at line 80 of file FPGATrackSimSecondStageAlg.h.

{this, "Spacepoints", false, "flag to enable the spacepoint formation"};

m_doTracking

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doTracking {this, "tracking", false, "flag to enable the tracking"}

private

Definition at line 81 of file FPGATrackSimSecondStageAlg.h.

{this, "tracking", false, "flag to enable the tracking"};

m_evt

long FPGATrackSimSecondStageAlg::m_evt = 0

private

Definition at line 109 of file FPGATrackSimSecondStageAlg.h.

m_evt_truth

long FPGATrackSimSecondStageAlg::m_evt_truth = 0

private

Definition at line 115 of file FPGATrackSimSecondStageAlg.h.

m_evtSel

ServiceHandle<IFPGATrackSimEventSelectionSvc> FPGATrackSimSecondStageAlg::m_evtSel {this, "eventSelector", "", "Event selection Svc"}

private

Definition at line 74 of file FPGATrackSimSecondStageAlg.h.

{this, "eventSelector", "", "Event selection Svc"};

m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_evtStore

privateinherited

Pointer to StoreGate (event store by default)

Definition at line 390 of file AthCommonDataStore.h.

m_extendedExtraObjects

DataObjIDColl AthAlgorithm::m_extendedExtraObjects

privateinherited

Definition at line 79 of file AthAlgorithm.h.

m_filterRoads

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_filterRoads {this, "FilterRoads", false, "enable first road filter"}

private

Definition at line 95 of file FPGATrackSimSecondStageAlg.h.

{this, "FilterRoads", false, "enable first road filter"};

m_filterRoads2

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}

private

Definition at line 96 of file FPGATrackSimSecondStageAlg.h.

{this, "FilterRoads2", false,  "enable second road filter"};

m_FPGAEventInfoKey

SG::ReadHandleKey<FPGATrackSimEventInfo> FPGATrackSimSecondStageAlg::m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}

private

Definition at line 145 of file FPGATrackSimSecondStageAlg.h.

{this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"};

m_FPGAHitInRoadsKey

SG::WriteHandleKey<FPGATrackSimHitContainer> FPGATrackSimSecondStageAlg::m_FPGAHitInRoadsKey {this, "FPGATrackSimHitInRoads2ndKey","FPGAHitsInRoads_2nd","FPGATrackSim Hits in 1st stage roads key"}

private

Definition at line 138 of file FPGATrackSimSecondStageAlg.h.

{this, "FPGATrackSimHitInRoads2ndKey","FPGAHitsInRoads_2nd","FPGATrackSim Hits in 1st stage roads key"};

m_FPGAHitKey

SG::ReadHandleKey<FPGATrackSimHitCollection> FPGATrackSimSecondStageAlg::m_FPGAHitKey {this, "FPGATrackSimHitKey", "FPGAHits_2nd", "FPGATrackSim Hits key"}

private

Definition at line 134 of file FPGATrackSimSecondStageAlg.h.

{this, "FPGATrackSimHitKey", "FPGAHits_2nd", "FPGATrackSim Hits key"};

m_FPGAInputTrackKey

SG::ReadHandleKey<FPGATrackSimTrackCollection> FPGATrackSimSecondStageAlg::m_FPGAInputTrackKey {this, "FPGATrackSimTrack1stKey", "FPGATracks_1st", "FPGATrackSim tracks 1st stage key"}

private

Definition at line 135 of file FPGATrackSimSecondStageAlg.h.

{this, "FPGATrackSimTrack1stKey", "FPGATracks_1st", "FPGATrackSim tracks 1st stage key"};

m_FPGAOfflineTrackKey

SG::ReadHandleKey<FPGATrackSimOfflineTrackCollection> FPGATrackSimSecondStageAlg::m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}

private

Definition at line 144 of file FPGATrackSimSecondStageAlg.h.

{this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"};

m_FPGARoadKey

SG::WriteHandleKey<FPGATrackSimRoadCollection> FPGATrackSimSecondStageAlg::m_FPGARoadKey {this, "FPGATrackSimRoad2ndKey","FPGARoads_2nd","FPGATrackSim Roads 2nd stage key"}

private

Definition at line 139 of file FPGATrackSimSecondStageAlg.h.

{this, "FPGATrackSimRoad2ndKey","FPGARoads_2nd","FPGATrackSim Roads 2nd stage key"};

m_FPGATrackKey

SG::WriteHandleKey<FPGATrackSimTrackCollection> FPGATrackSimSecondStageAlg::m_FPGATrackKey {this, "FPGATrackSimTrack2ndKey","FPGATracks_2nd","FPGATrackSim Tracks 2nd stage key"}

private

Definition at line 140 of file FPGATrackSimSecondStageAlg.h.

{this, "FPGATrackSimTrack2ndKey","FPGATracks_2nd","FPGATrackSim Tracks 2nd stage key"};

m_FPGATrackSimMapping

ServiceHandle<IFPGATrackSimMappingSvc> FPGATrackSimSecondStageAlg::m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}

private

Definition at line 73 of file FPGATrackSimSecondStageAlg.h.

{this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"};

m_FPGATruthTrackKey

SG::ReadHandleKey<FPGATrackSimTruthTrackCollection> FPGATrackSimSecondStageAlg::m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}

private

Definition at line 143 of file FPGATrackSimSecondStageAlg.h.

{this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"};

m_houghRootOutputTool

ToolHandle<FPGATrackSimHoughRootOutputTool> FPGATrackSimSecondStageAlg::m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}

private

Definition at line 64 of file FPGATrackSimSecondStageAlg.h.

{this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"};

m_logicEventOutputHeader

FPGATrackSimLogicalEventOutputHeader* FPGATrackSimSecondStageAlg::m_logicEventOutputHeader = nullptr

private

Definition at line 104 of file FPGATrackSimSecondStageAlg.h.

m_maxNRoadsFound

unsigned long FPGATrackSimSecondStageAlg::m_maxNRoadsFound = 0

private

Definition at line 121 of file FPGATrackSimSecondStageAlg.h.

m_maxNTracksChi2OLRTot

unsigned long FPGATrackSimSecondStageAlg::m_maxNTracksChi2OLRTot = 0

private

Definition at line 124 of file FPGATrackSimSecondStageAlg.h.

m_maxNTracksChi2Tot

unsigned long FPGATrackSimSecondStageAlg::m_maxNTracksChi2Tot = 0

private

Definition at line 123 of file FPGATrackSimSecondStageAlg.h.

m_maxNTracksTot

unsigned long FPGATrackSimSecondStageAlg::m_maxNTracksTot = 0

private

Definition at line 122 of file FPGATrackSimSecondStageAlg.h.

m_monTool

ToolHandle<GenericMonitoringTool> FPGATrackSimSecondStageAlg::m_monTool {this,"MonTool", "", "Monitoring tool"}

private

Definition at line 131 of file FPGATrackSimSecondStageAlg.h.

{this,"MonTool", "", "Monitoring tool"};

m_NNTrackTool

ToolHandle<FPGATrackSimNNTrackTool> FPGATrackSimSecondStageAlg::m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool_2nd", "NN Track Tool"}

private

Definition at line 67 of file FPGATrackSimSecondStageAlg.h.

{this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool_2nd", "NN Track Tool"};

m_nRoadsFound

long FPGATrackSimSecondStageAlg::m_nRoadsFound = 0

private

Definition at line 116 of file FPGATrackSimSecondStageAlg.h.

m_nRoadsTot

long FPGATrackSimSecondStageAlg::m_nRoadsTot = 0

private

Definition at line 110 of file FPGATrackSimSecondStageAlg.h.

m_nTracksChi2Found

long FPGATrackSimSecondStageAlg::m_nTracksChi2Found = 0

private

Definition at line 118 of file FPGATrackSimSecondStageAlg.h.

m_nTracksChi2OLRFound

long FPGATrackSimSecondStageAlg::m_nTracksChi2OLRFound = 0

private

Definition at line 119 of file FPGATrackSimSecondStageAlg.h.

m_nTracksChi2OLRTot

long FPGATrackSimSecondStageAlg::m_nTracksChi2OLRTot = 0

private

Definition at line 113 of file FPGATrackSimSecondStageAlg.h.

m_nTracksChi2Tot

long FPGATrackSimSecondStageAlg::m_nTracksChi2Tot = 0

private

Definition at line 112 of file FPGATrackSimSecondStageAlg.h.

m_nTracksFound

long FPGATrackSimSecondStageAlg::m_nTracksFound = 0

private

Definition at line 117 of file FPGATrackSimSecondStageAlg.h.

m_nTracksTot

long FPGATrackSimSecondStageAlg::m_nTracksTot = 0

private

Definition at line 111 of file FPGATrackSimSecondStageAlg.h.

m_NumOfHitPerGrouping

Gaudi::Property<int> FPGATrackSimSecondStageAlg::m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}

private

Definition at line 88 of file FPGATrackSimSecondStageAlg.h.

{ this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"};

m_outputBranch

Gaudi::Property<std::string> FPGATrackSimSecondStageAlg::m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }

private

Definition at line 100 of file FPGATrackSimSecondStageAlg.h.

{this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." };

m_overlapRemovalTool

ToolHandle<FPGATrackSimOverlapRemovalTool> FPGATrackSimSecondStageAlg::m_overlapRemovalTool {this, "OverlapRemoval_2nd", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_2nd", "2nd stage overlap removal tool"}

private

Definition at line 69 of file FPGATrackSimSecondStageAlg.h.

{this, "OverlapRemoval_2nd", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_2nd", "2nd stage overlap removal tool"};

m_passLowestChi2TrackOnly

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_passLowestChi2TrackOnly {this, "passLowestChi2TrackOnly", false}

private

Definition at line 89 of file FPGATrackSimSecondStageAlg.h.

{this, "passLowestChi2TrackOnly", false};

m_SetTruthParametersForTracks

Gaudi::Property<int> FPGATrackSimSecondStageAlg::m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}

private

Definition at line 79 of file FPGATrackSimSecondStageAlg.h.

{this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"};

m_sliceBranch

Gaudi::Property<std::string> FPGATrackSimSecondStageAlg::m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for slied hits in output ROOT file." }

private

Definition at line 99 of file FPGATrackSimSecondStageAlg.h.

{this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for slied hits in output ROOT file." };

m_slicedHitHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimSecondStageAlg::m_slicedHitHeader = nullptr

private

Definition at line 103 of file FPGATrackSimSecondStageAlg.h.

m_trackExtensionTool

ToolHandle<IFPGATrackSimTrackExtensionTool> FPGATrackSimSecondStageAlg::m_trackExtensionTool {this, "TrackExtensionTool", "FPGATrackSimTrackExtensionTool", "Track extensoin tool"}

private

Definition at line 61 of file FPGATrackSimSecondStageAlg.h.

{this, "TrackExtensionTool", "FPGATrackSimTrackExtensionTool", "Track extensoin tool"};

m_trackFitterTool

ToolHandle<FPGATrackSimTrackFitterTool> FPGATrackSimSecondStageAlg::m_trackFitterTool {this, "TrackFitter_2nd", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_2nd", "2nd stage track fit tool"}

private

Definition at line 68 of file FPGATrackSimSecondStageAlg.h.

{this, "TrackFitter_2nd", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_2nd", "2nd stage track fit tool"};

m_trackScoreCut

Gaudi::Property<float> FPGATrackSimSecondStageAlg::m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }

private

Definition at line 86 of file FPGATrackSimSecondStageAlg.h.

{this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." };

m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< Algorithm > >::m_varHandleArraysDeclared

privateinherited

Definition at line 399 of file AthCommonDataStore.h.

m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< Algorithm > >::m_vhka

privateinherited

Definition at line 398 of file AthCommonDataStore.h.

m_writeOutNonSPStripHits

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}

private

Definition at line 87 of file FPGATrackSimSecondStageAlg.h.

{this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"};

m_writeOutputData

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}

private

Definition at line 85 of file FPGATrackSimSecondStageAlg.h.

{this, "writeOutputData", true,"write the output TTree"};

m_writeOutputTool

ToolHandle<FPGATrackSimOutputHeaderTool> FPGATrackSimSecondStageAlg::m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}

private

Definition at line 72 of file FPGATrackSimSecondStageAlg.h.

{this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"};

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The documentation for this class was generated from the following files:

• FPGATrackSimSecondStageAlg.h
• FPGATrackSimSecondStageAlg.cxx