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FPGATrackSimSecondStageAlg Class Reference

#include <FPGATrackSimSecondStageAlg.h>

Inheritance diagram for FPGATrackSimSecondStageAlg:

Public Member Functions

 FPGATrackSimSecondStageAlg (const std::string &name, ISvcLocator *pSvcLocator)
virtual ~FPGATrackSimSecondStageAlg ()=default
virtual StatusCode initialize () override
virtual StatusCode execute () override
virtual StatusCode finalize () override
virtual StatusCode sysInitialize () override
 Override sysInitialize.
virtual const DataObjIDColl & extraOutputDeps () const override
 Return the list of extra output dependencies.
ServiceHandle< StoreGateSvc > & evtStore ()
 The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.
const ServiceHandle< StoreGateSvc > & detStore () const
 The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.
virtual StatusCode sysStart () override
 Handle START transition.
virtual std::vector< Gaudi::DataHandle * > inputHandles () const override
 Return this algorithm's input handles.
virtual std::vector< Gaudi::DataHandle * > outputHandles () const override
 Return this algorithm's output handles.
Gaudi::Details::PropertyBase & declareProperty (Gaudi::Property< T, V, H > &t)
void updateVHKA (Gaudi::Details::PropertyBase &)
MsgStream & msg () const
bool msgLvl (const MSG::Level lvl) const

Protected Member Functions

void renounceArray (SG::VarHandleKeyArray &handlesArray)
 remove all handles from I/O resolution
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > renounce (T &h)
void extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
 Add StoreName to extra input/output deps as needed.

Private Types

typedef ServiceHandle< StoreGateSvcStoreGateSvc_t

Private Member Functions

StatusCode writeOutputData (const std::vector< FPGATrackSimRoad > &roads_2nd, std::vector< FPGATrackSimTrack > const &tracks_2nd, FPGATrackSimDataFlowInfo const *dataFlowInfo)
Gaudi::Details::PropertyBase & declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
 specialization for handling Gaudi::Property<SG::VarHandleKey>

Private Attributes

std::string m_description
ToolHandle< IFPGATrackSimTrackExtensionToolm_trackExtensionTool {this, "TrackExtensionTool", "FPGATrackSimTrackExtensionTool", "Track extensoin tool"}
ToolHandle< FPGATrackSimHoughRootOutputToolm_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
ToolHandle< FPGATrackSimNNTrackToolm_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool_2nd", "NN Track Tool"}
ToolHandle< FPGATrackSimTrackFitterToolm_trackFitterTool {this, "TrackFitter_2nd", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_2nd", "2nd stage track fit tool"}
ToolHandle< FPGATrackSimOverlapRemovalToolm_overlapRemovalTool {this, "OverlapRemoval_2nd", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_2nd", "2nd stage overlap removal tool"}
ToolHandle< FPGATrackSimOutputHeaderToolm_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
ServiceHandle< IFPGATrackSimMappingSvcm_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
ServiceHandle< IFPGATrackSimEventSelectionSvcm_evtSel {this, "eventSelector", "", "Event selection Svc"}
ServiceHandle< IChronoStatSvc > m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
Gaudi::Property< int > m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
Gaudi::Property< bool > m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
Gaudi::Property< bool > m_doTracking {this, "tracking", false, "flag to enable the tracking"}
Gaudi::Property< bool > m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
Gaudi::Property< bool > m_doHoughRootOutput2nd {this, "DoHoughRootOutput2nd", false, "Dump output from the Hough Transform to flat ntuples"}
Gaudi::Property< bool > m_doNNTrack_2nd {this, "DoNNTrack_2nd", false, "Run NN track filtering for 2nd Stage"}
Gaudi::Property< bool > m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
Gaudi::Property< float > m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
Gaudi::Property< bool > m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
Gaudi::Property< int > m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
Gaudi::Property< bool > m_passLowestChi2TrackOnly {this, "passLowestChi2TrackOnly", false}
Gaudi::Property< bool > m_doNNPathFinder {this, "doNNPathFinder", false}
Gaudi::Property< bool > m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
Gaudi::Property< bool > m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
Gaudi::Property< std::string > m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for slied hits in output ROOT file." }
Gaudi::Property< std::string > m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
FPGATrackSimLogicalEventInputHeaderm_slicedHitHeader = nullptr
FPGATrackSimLogicalEventOutputHeaderm_logicEventOutputHeader = nullptr
long m_evt = 0
long m_nRoadsTot = 0
long m_nTracksTot = 0
long m_nTracksChi2Tot = 0
long m_nTracksChi2OLRTot = 0
long m_evt_truth = 0
long m_nRoadsFound = 0
long m_nTracksFound = 0
long m_nTracksChi2Found = 0
long m_nTracksChi2OLRFound = 0
unsigned long m_maxNRoadsFound = 0
unsigned long m_maxNTracksTot = 0
unsigned long m_maxNTracksChi2Tot = 0
unsigned long m_maxNTracksChi2OLRTot = 0
ToolHandle< GenericMonitoringToolm_monTool {this,"MonTool", "", "Monitoring tool"}
SG::ReadHandleKey< FPGATrackSimHitCollectionm_FPGAHitKey {this, "FPGATrackSimHitKey", "FPGAHits_2nd", "FPGATrackSim Hits key"}
SG::ReadHandleKey< FPGATrackSimTrackCollectionm_FPGAInputTrackKey {this, "FPGATrackSimTrack1stKey", "FPGATracks_1st", "FPGATrackSim tracks 1st stage key"}
SG::WriteHandleKey< FPGATrackSimRoadCollectionm_FPGARoadKey {this, "FPGATrackSimRoad2ndKey","FPGARoads_2nd","FPGATrackSim Roads 2nd stage key"}
SG::WriteHandleKey< FPGATrackSimTrackCollectionm_FPGATrackKey {this, "FPGATrackSimTrack2ndKey","FPGATracks_2nd","FPGATrackSim Tracks 2nd stage key"}
SG::ReadHandleKey< FPGATrackSimTruthTrackCollectionm_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollectionm_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
SG::ReadHandleKey< FPGATrackSimEventInfom_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
DataObjIDColl m_extendedExtraObjects
StoreGateSvc_t m_evtStore
 Pointer to StoreGate (event store by default)
StoreGateSvc_t m_detStore
 Pointer to StoreGate (detector store by default)
std::vector< SG::VarHandleKeyArray * > m_vhka
bool m_varHandleArraysDeclared

Detailed Description

Definition at line 45 of file FPGATrackSimSecondStageAlg.h.

Member Typedef Documentation

◆ StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< Algorithm > >::StoreGateSvc_t
privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

◆ FPGATrackSimSecondStageAlg()

FPGATrackSimSecondStageAlg::FPGATrackSimSecondStageAlg ( const std::string & name,
ISvcLocator * pSvcLocator )

Definition at line 44 of file FPGATrackSimSecondStageAlg.cxx.

44 :
45 AthAlgorithm(name, pSvcLocator)
46{
47}
AthAlgorithm()
Default constructor:

◆ ~FPGATrackSimSecondStageAlg()

virtual FPGATrackSimSecondStageAlg::~FPGATrackSimSecondStageAlg ( )
virtualdefault

Member Function Documentation

◆ declareGaudiProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< Algorithm > >::declareGaudiProperty ( Gaudi::Property< T, V, H > & hndl,
const SG::VarHandleKeyType &  )
inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

158 {
160 hndl.value(),
161 hndl.documentation());
162
163 }
Gaudi::Details::PropertyBase & declareProperty(Gaudi::Property< T, V, H > &t)

◆ declareProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< Algorithm > >::declareProperty ( Gaudi::Property< T, V, H > & t)
inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

145 {
146 typedef typename SG::HandleClassifier<T>::type htype;
148 }
Gaudi::Details::PropertyBase & declareGaudiProperty(Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
specialization for handling Gaudi::Property<SG::VarHandleKey>

◆ detStore()

const ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< Algorithm > >::detStore ( ) const
inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

◆ evtStore()

ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< Algorithm > >::evtStore ( )
inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

◆ execute()

StatusCode FPGATrackSimSecondStageAlg::execute ( )
overridevirtual

Definition at line 103 of file FPGATrackSimSecondStageAlg.cxx.

104{
105 const EventContext& ctx = getContext();
106 // Get reference to hits from StoreGate.
107 // Hits have been procesed by the DataPrep algorithm. Now, we need to read them.
108 // If they aren't passed, assume this means we are done.
109 SG::ReadHandle<FPGATrackSimHitCollection> FPGAHits(m_FPGAHitKey, ctx);
110 if (!FPGAHits.isValid()) {
111 if (m_evt == 0) {
112 ATH_MSG_WARNING("Didn't receive FPGAHits_2nd on first event; assuming no input events.");
113 }
114 SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
115 if (!appMgr) {
116 ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
117 return StatusCode::FAILURE;
118 }
119 return appMgr->stopRun();
120 }
121
122 SG::ReadHandle<FPGATrackSimTrackCollection> FPGAInputTracks (m_FPGAInputTrackKey, ctx);
123 if (!FPGAInputTracks.isValid()) {
124 SmartIF<IEventProcessor> appMgr{service("ApplicationMgr")};
125 if (!appMgr) {
126 ATH_MSG_ERROR("Failed to retrieve ApplicationMgr as IEventProcessor");
127 return StatusCode::FAILURE;
128 }
129 return appMgr->stopRun();
130 }
131
132 // Set up write handles.
133 SG::WriteHandle<FPGATrackSimRoadCollection> FPGARoads_2nd (m_FPGARoadKey, ctx);
134
135 ATH_CHECK( FPGARoads_2nd.record (std::make_unique<FPGATrackSimRoadCollection>()));
136
137 SG::WriteHandle<FPGATrackSimTrackCollection> FPGATracks_2ndHandle (m_FPGATrackKey, ctx);
138 ATH_CHECK(FPGATracks_2ndHandle.record (std::make_unique<FPGATrackSimTrackCollection>()));
139 {
140 std::optional<Athena::Chrono> chrono;
141 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: EventSelection", m_chrono.get());
142 // Query the event selection service to make sure this event passed cuts.
143 if (!m_evtSel->getSelectedEvent()) {
144 ATH_MSG_DEBUG("Event skipped by: " << m_evtSel->name());
145 return StatusCode::SUCCESS;
146 }
147
148 // Event passes cuts, count it. technically, DataPrep does this now.
149 m_evt++;
150 }
151
152 // If we get here, FPGAHits_2nd is valid, create non-owning pointers.
153 std::vector<std::shared_ptr<const FPGATrackSimHit>> phits_2nd;
154 phits_2nd.reserve(FPGAHits->size());
155 for (const FPGATrackSimHit* hit : *FPGAHits) {
156 phits_2nd.emplace_back(hit, [](const FPGATrackSimHit*) {});
157 }
158
159 ATH_MSG_DEBUG("Retrieved " << phits_2nd.size() << " hits and " << FPGAInputTracks->size() << " tracks from storegate");
160
161 // Get truth tracks from DataPrep as well.
162 SG::ReadHandle<FPGATrackSimTruthTrackCollection> FPGATruthTracks(m_FPGATruthTrackKey, ctx);
163 if (!FPGATruthTracks.isValid()) {
164 ATH_MSG_ERROR("Could not find FPGA Truth Track Collection with key " << FPGATruthTracks.key());
165 return StatusCode::FAILURE;
166 }
167
168 // Same for offline tracks.
169 SG::ReadHandle<FPGATrackSimOfflineTrackCollection> FPGAOfflineTracks(m_FPGAOfflineTrackKey, ctx);
170 if (!FPGAOfflineTracks.isValid()) {
171 ATH_MSG_ERROR("Could not find FPGA Offline Track Collection with key " << FPGAOfflineTracks.key());
172 return StatusCode::FAILURE;
173 }
174
175 // Same for event info structure. all we need this for is to propagate to our event info structures.
176 SG::ReadHandle<FPGATrackSimEventInfo> FPGAEventInfo(m_FPGAEventInfoKey, ctx);
177 if (!FPGAEventInfo.isValid()) {
178 ATH_MSG_ERROR("Could not find FPGA Event Info with key " << FPGAEventInfo.key());
179 return StatusCode::FAILURE;
180 }
181 FPGATrackSimEventInfo eventInfo = *FPGAEventInfo.cptr();
182 m_slicedHitHeader->newEvent(eventInfo);
183
184 // Get second stage roads from tracks.
185 std::vector<FPGATrackSimRoad> roads;
186
187 {
188 std::optional<Athena::Chrono> chrono;
189 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Track Extension", m_chrono.get());
190 // Use the track extension tool to actually produce a new set of roads.
191 ATH_CHECK(m_trackExtensionTool->extendTracks(phits_2nd, *FPGAInputTracks, roads));
192
193 for (auto const& road : roads) {
194 FPGARoads_2nd->push_back(road);
195 }
196 }
197
198 auto mon_nroads = Monitored::Scalar<unsigned>("nroads_2nd", roads.size());
199 unsigned bitmask_best(0);
200 unsigned nhit_best(0);
201 for (auto const &road : roads) {
202 unsigned bitmask = road.getHitLayers();
203 if (road.getNHitLayers() > nhit_best) {
204 nhit_best = road.getNHitLayers();
205 bitmask_best = bitmask;
206 }
207 for (size_t l = 0; l < m_FPGATrackSimMapping->PlaneMap_2nd(0)->getNLogiLayers(); l++) {
208 if (bitmask & (1 << l)) {
209 auto mon_layerIDs = Monitored::Scalar<unsigned>("layerIDs_2nd",l);
210 Monitored::Group(m_monTool,mon_layerIDs);
211 }
212 }
213 }
214
215 for (size_t l = 0; l < m_FPGATrackSimMapping->PlaneMap_2nd(0)->getNLogiLayers(); l++) {
216 if (bitmask_best & (1 << l)) {
217 auto mon_layerIDs_best = Monitored::Scalar<unsigned>("layerIDs_2nd_best",l);
218 Monitored::Group(m_monTool,mon_layerIDs_best);
219 }
220 }
221 Monitored::Group(m_monTool, mon_nroads);
222
223 // NOTE: for now we don't support road filtering again in the second stage.
224 auto mon_nroads_postfilter = Monitored::Scalar<unsigned>("nroads_2nd_postfilter", roads.size());
225 Monitored::Group(m_monTool, mon_nroads_postfilter);
226
227 // Get tracks, again, after extrapolation.
228 // All of this code is effectively copied from LogicalHitsProcessAlg, except we use 2nd stage now.
229 std::vector<FPGATrackSimTrack> tracks;
230 {
231 std::optional<Athena::Chrono> chrono;
232 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Track Extraction", m_chrono.get());
233 if (m_doTracking) {
234 if (m_doNNTrack_2nd) {
235 ATH_MSG_DEBUG("Performing NN tracking");
236 ATH_CHECK(m_NNTrackTool->getTracks_2nd(roads, tracks));
237 } else {
238 ATH_MSG_DEBUG("Performing Linear tracking");
239
240 if (m_passLowestChi2TrackOnly) { // Pass only the lowest chi2 track per road
241
242 std::vector<FPGATrackSimTrack> filteredTracks;
243
244 for (const auto& road : roads) {
245 // Collect tracks for the current road
246 std::vector<FPGATrackSimTrack> tracksForCurrentRoad;
247 std::vector<FPGATrackSimRoad> roadVec = {road};
248 ATH_CHECK(m_trackFitterTool->getTracks(roadVec, tracksForCurrentRoad, m_evtSel->getMin(), m_evtSel->getMax()));
249
250 // Find and keep the best track (lowest chi2) for this road
251 if (!tracksForCurrentRoad.empty()) {
252 auto bestTrackIter = std::min_element(
253 tracksForCurrentRoad.begin(), tracksForCurrentRoad.end(),
254 [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
255 return a.getChi2ndof() < b.getChi2ndof();
256 });
257
258 if (bestTrackIter != tracksForCurrentRoad.end() && bestTrackIter->getChi2ndof() < 1.e15) {
259 filteredTracks.push_back(*bestTrackIter);
260
261 // Monitor chi2 of the best track
262 auto mon_chi2 = Monitored::Scalar<float>("chi2_2nd_all", bestTrackIter->getChi2ndof());
263 Monitored::Group(m_monTool, mon_chi2);
264 }
265 }
266 }
267
268 // Update tracks with filtered tracks
269 tracks = std::move(filteredTracks);
270
271 // Monitor the best chi2 across all roads
272 if (!tracks.empty()) {
273 float bestChi2Overall = std::min_element(
274 tracks.begin(), tracks.end(),
275 [](const FPGATrackSimTrack& a, const FPGATrackSimTrack& b) {
276 return a.getChi2ndof() < b.getChi2ndof();
277 })->getChi2ndof();
278
279 auto mon_best_chi2 = Monitored::Scalar<float>("best_chi2_2nd", bestChi2Overall);
280 Monitored::Group(m_monTool, mon_best_chi2);
281 }
282 } else { // Pass all tracks with chi2 < 1e15
283 ATH_CHECK(m_trackFitterTool->getTracks(roads, tracks, m_evtSel->getMin(), m_evtSel->getMax()));
284 float bestchi2 = 1.e15;
285 for (const FPGATrackSimTrack& track : tracks) {
286 float chi2 = track.getChi2ndof();
287 if (chi2 < bestchi2) bestchi2 = chi2;
288 auto mon_chi2 = Monitored::Scalar<float>("chi2_2nd_all", chi2);
289 Monitored::Group(m_monTool, mon_chi2);
290 }
291 auto mon_best_chi2 = Monitored::Scalar<float>("best_chi2_2nd", bestchi2);
292 Monitored::Group(m_monTool, mon_best_chi2);
293 }
294 }
295 } else {
296 // No tracking; just run road to track
297 roadsToTrack(roads, tracks, m_FPGATrackSimMapping->PlaneMap_2nd(0));
298 }
299 }
300 auto mon_ntracks = Monitored::Scalar<unsigned>("ntrack_2nd", tracks.size());
301 Monitored::Group(m_monTool,mon_ntracks);
302
303 // Overlap removal
304 {
305 std::optional<Athena::Chrono> chrono;
306 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Overlap Removal", m_chrono.get());
307 ATH_CHECK(m_overlapRemovalTool->runOverlapRemoval(tracks));
308 }
309 {
310 std::optional<Athena::Chrono> chrono;
311 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Parameter Estimation", m_chrono.get());
312 // If running NN Track tool, now we get the track parameters (it's slow so we only do it for tracks passing OLR)
314 ATH_CHECK(m_NNTrackTool->setTrackParameters(tracks,false,m_evtSel->getMin(), m_evtSel->getMax()));
315 }
316 }
317 const auto& truthtracks = *FPGATruthTracks;
318 const auto& offlineTracks = *FPGAOfflineTracks;
319
320 // Optionally loop over tracks and set track parameters to truth
321 {
322 std::optional<Athena::Chrono> chrono;
323 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Truth Param Override", m_chrono.get());
324 if (m_SetTruthParametersForTracks >= 0 && truthtracks.size() > 0) {
325 for (auto track : tracks) {
327 track.setQOverPt(truthtracks.front().getQOverPt());
328 else if (m_SetTruthParametersForTracks != 1)
329 track.setD0(truthtracks.front().getD0());
330 else if (m_SetTruthParametersForTracks != 2)
331 track.setPhi(truthtracks.front().getPhi());
332 else if (m_SetTruthParametersForTracks != 3)
333 track.setZ0(truthtracks.front().getZ0());
334 else if (m_SetTruthParametersForTracks != 4)
335 track.setEta(truthtracks.front().getEta());
336 }
337 }
338 }
339
340 unsigned ntrackOLRChi2 = 0;
341 {
342 std::optional<Athena::Chrono> chrono;
343 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Track Counting", m_chrono.get());
344 for (const FPGATrackSimTrack& track : tracks) {
345 if (track.getChi2ndof() < m_trackScoreCut.value()) {
347 if (track.passedOR()) {
348 ntrackOLRChi2++;
350
351 // For tracks passing overlap removal-- record the chi2 so we can figure out the right cut.
352 float chi2olr = track.getChi2ndof();
353 auto mon_chi2_or = Monitored::Scalar<float>("chi2_2nd_afterOLR", chi2olr);
354 Monitored::Group(m_monTool, mon_chi2_or);
355 }
356 }
357 }
358 auto mon_ntracks_olr = Monitored::Scalar<unsigned>("ntrack_2nd_afterOLR", ntrackOLRChi2);
359 Monitored::Group(m_monTool,mon_ntracks_olr);
360 }
361
362 m_nRoadsTot += roads.size();
363 m_nTracksTot += tracks.size();
364
365 // Do some simple monitoring of efficiencies. okay, we need truth tracks here.
366 {
367 std::optional<Athena::Chrono> chrono;
368 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Efficiency Monitoring", m_chrono.get());
369 if (truthtracks.size() > 0) {
370 m_evt_truth++;
371 auto passroad = Monitored::Scalar<bool>("eff_road_2nd",(roads.size() > 0));
372 auto passtrack = Monitored::Scalar<bool>("eff_track_2nd",(tracks.size() > 0));
373 auto truthpT_zoom = Monitored::Scalar<float>("pT_zoom",truthtracks.front().getPt()*0.001);
374 auto truthpT = Monitored::Scalar<float>("pT",truthtracks.front().getPt()*0.001);
375 auto trutheta = Monitored::Scalar<float>("eta",truthtracks.front().getEta());
376 auto truthphi= Monitored::Scalar<float>("phi",truthtracks.front().getPhi());
377 auto truthd0= Monitored::Scalar<float>("d0",truthtracks.front().getD0());
378 auto truthz0= Monitored::Scalar<float>("z0",truthtracks.front().getZ0());
379 if (roads.size() > 0) m_nRoadsFound++;
380 if (roads.size() > m_maxNRoadsFound) m_maxNRoadsFound = roads.size();
381
382 unsigned npasschi2(0);
383 unsigned npasschi2OLR(0);
384
385 if (tracks.size() > 0) {
387 if (tracks.size() > m_maxNTracksTot) m_maxNTracksTot = tracks.size();
388 for (const auto& track : tracks) {
389 if (track.getChi2ndof() < m_trackScoreCut.value()) {
390 npasschi2++;
391 if (track.passedOR()) {
392 npasschi2OLR++;
393 }
394 }
395 }
396 }
397 if (npasschi2 > m_maxNTracksChi2Tot) m_maxNTracksChi2Tot = npasschi2;
398 if (npasschi2OLR > m_maxNTracksChi2OLRTot) m_maxNTracksChi2OLRTot = npasschi2OLR;
399 if (npasschi2 > 0) m_nTracksChi2Found++;
400 if (npasschi2OLR > 0) m_nTracksChi2OLRFound++;
401
402 auto passtrackchi2 = Monitored::Scalar<bool>("eff_track_chi2_2nd",(npasschi2 > 0));
403 Monitored::Group(m_monTool,passroad,passtrack,truthpT_zoom,truthpT,trutheta,truthphi,truthd0,truthz0,passtrackchi2);
404 }
405 }
406
407 {
408 std::optional<Athena::Chrono> chrono;
409 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Write Tracks", m_chrono.get());
410 for (const FPGATrackSimTrack& track : tracks) FPGATracks_2ndHandle->push_back(track);
411 }
412
413 // Write the output and reset
414 {
415 std::optional<Athena::Chrono> chrono;
416 if constexpr (enableBenchmark) chrono.emplace("2nd Stage: Output", m_chrono.get());
417 if (m_writeOutputData) {
418 auto dataFlowInfo = std::make_unique<FPGATrackSimDataFlowInfo>();
419 ATH_CHECK(writeOutputData(roads, tracks, dataFlowInfo.get()));
420 }
421
423 ATH_MSG_DEBUG("Running HoughRootOutputTool in 2nd stage.");
424 ATH_CHECK(m_houghRootOutputTool->fillTree(tracks, truthtracks, offlineTracks, phits_2nd, m_writeOutNonSPStripHits, true));
425 }
426 }
427
428 // Reset data pointers
429 m_slicedHitHeader->reset();
431
432 return StatusCode::SUCCESS;
433}
#define ATH_CHECK
Evaluate an expression and check for errors.
#define ATH_MSG_ERROR(x)
#define ATH_MSG_WARNING(x)
#define ATH_MSG_DEBUG(x)
void roadsToTrack(std::vector< FPGATrackSimRoad > &roads, std::vector< FPGATrackSimTrack > &track_cands, const FPGATrackSimPlaneMap *pmap)
bool hit(const std::valarray< int > &ids, int pdgId)
static Double_t a
ToolHandle< IFPGATrackSimTrackExtensionTool > m_trackExtensionTool
SG::WriteHandleKey< FPGATrackSimRoadCollection > m_FPGARoadKey
ServiceHandle< IChronoStatSvc > m_chrono
Gaudi::Property< float > m_trackScoreCut
SG::ReadHandleKey< FPGATrackSimOfflineTrackCollection > m_FPGAOfflineTrackKey
ToolHandle< GenericMonitoringTool > m_monTool
SG::WriteHandleKey< FPGATrackSimTrackCollection > m_FPGATrackKey
SG::ReadHandleKey< FPGATrackSimTrackCollection > m_FPGAInputTrackKey
SG::ReadHandleKey< FPGATrackSimTruthTrackCollection > m_FPGATruthTrackKey
Gaudi::Property< bool > m_writeOutNonSPStripHits
FPGATrackSimLogicalEventOutputHeader * m_logicEventOutputHeader
SG::ReadHandleKey< FPGATrackSimEventInfo > m_FPGAEventInfoKey
Gaudi::Property< bool > m_doHoughRootOutput2nd
ToolHandle< FPGATrackSimHoughRootOutputTool > m_houghRootOutputTool
Gaudi::Property< bool > m_doNNTrack_2nd
ServiceHandle< IFPGATrackSimEventSelectionSvc > m_evtSel
ToolHandle< FPGATrackSimNNTrackTool > m_NNTrackTool
Gaudi::Property< int > m_SetTruthParametersForTracks
FPGATrackSimLogicalEventInputHeader * m_slicedHitHeader
ToolHandle< FPGATrackSimTrackFitterTool > m_trackFitterTool
ServiceHandle< IFPGATrackSimMappingSvc > m_FPGATrackSimMapping
StatusCode writeOutputData(const std::vector< FPGATrackSimRoad > &roads_2nd, std::vector< FPGATrackSimTrack > const &tracks_2nd, FPGATrackSimDataFlowInfo const *dataFlowInfo)
Gaudi::Property< bool > m_passLowestChi2TrackOnly
ToolHandle< FPGATrackSimOverlapRemovalTool > m_overlapRemovalTool
Gaudi::Property< bool > m_writeOutputData
SG::ReadHandleKey< FPGATrackSimHitCollection > m_FPGAHitKey
double chi2(TH1 *h0, TH1 *h1)
l
Printing final latex table to .tex output file.
constexpr bool enableBenchmark

◆ extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase & ExtraDeps)
protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

◆ extraOutputDeps()

const DataObjIDColl & AthAlgorithm::extraOutputDeps ( ) const
overridevirtualinherited

Return the list of extra output dependencies.

This list is extended to include symlinks implied by inheritance relations.

Definition at line 50 of file AthAlgorithm.cxx.

51{
52 // If we didn't find any symlinks to add, just return the collection
53 // from the base class. Otherwise, return the extended collection.
54 if (!m_extendedExtraObjects.empty()) {
56 }
57 return Algorithm::extraOutputDeps();
58}
DataObjIDColl m_extendedExtraObjects

◆ finalize()

StatusCode FPGATrackSimSecondStageAlg::finalize ( )
overridevirtual

Definition at line 466 of file FPGATrackSimSecondStageAlg.cxx.

467{
468 ATH_MSG_INFO("PRINTING FPGATRACKSIM SIMPLE STATS: SECOND STAGE");
469 ATH_MSG_INFO("========================================================================================");
470 ATH_MSG_INFO("Ran on events = " << m_evt);
471 ATH_MSG_INFO("Inclusive efficiency to find a road = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nRoadsFound/(float)m_evt_truth)));
472 ATH_MSG_INFO("Inclusive efficiency to find a track = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksFound/(float)m_evt_truth)));
473 ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2Found/(float)m_evt_truth)));
474 ATH_MSG_INFO("Inclusive efficiency to find a track passing chi2 and OLR = " << (m_evt_truth == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRFound/(float)m_evt_truth)));
475
476
477 ATH_MSG_INFO("Number of 2nd stage roads/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nRoadsTot/(float)m_evt)));
478 ATH_MSG_INFO("Number of 2nd stage track combinations/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksTot/(float)m_evt)));
479 ATH_MSG_INFO("Number of 2nd stage tracks passing chi2/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2Tot/(float)m_evt)));
480 ATH_MSG_INFO("Number of 2nd stage tracks passing chi2 and OLR/event = " << (m_evt == 0 ? "NAN" : std::to_string(m_nTracksChi2OLRTot/(float)m_evt)));
481 ATH_MSG_INFO("========================================================================================");
482
483 ATH_MSG_INFO("Max number of 2nd stage roads in an event = " << m_maxNRoadsFound);
484 ATH_MSG_INFO("Max number of 2nd stage track combinations in an event = " << m_maxNTracksTot);
485 ATH_MSG_INFO("Max number of 2nd stage tracks passing chi2 in an event = " << m_maxNTracksChi2Tot);
486 ATH_MSG_INFO("Max number of 2nd stage tracks passing chi2 and OLR in an event = " << m_maxNTracksChi2OLRTot);
487 ATH_MSG_INFO("========================================================================================");
488 return StatusCode::SUCCESS;
489}
#define ATH_MSG_INFO(x)

◆ initialize()

StatusCode FPGATrackSimSecondStageAlg::initialize ( )
overridevirtual

Definition at line 50 of file FPGATrackSimSecondStageAlg.cxx.

51{
52 std::stringstream ss(m_description);
53 std::string line;
54 ATH_MSG_INFO("Tag config:");
55 if (!m_description.empty()) {
56 while (std::getline(ss, line, '\n')) {
57 ATH_MSG_INFO('\t' << line);
58 }
59 }
60
61 ATH_CHECK(m_houghRootOutputTool.retrieve(EnableTool{m_doHoughRootOutput2nd}));
62 ATH_CHECK(m_NNTrackTool.retrieve(EnableTool{m_doNNTrack_2nd}));
63
64 ATH_CHECK(m_trackFitterTool.retrieve(EnableTool{m_doTracking}));
66 ATH_CHECK(m_writeOutputTool.retrieve());
69
70 ATH_MSG_DEBUG("initialize() Instantiating root objects");
71
72 // This file should only need to generate one input and output branch.
73 m_slicedHitHeader = m_writeOutputTool->addInputBranch(m_sliceBranch.value(), true);
74 m_logicEventOutputHeader = m_writeOutputTool->addOutputBranch(m_outputBranch.value(), true);
75
76 // Connect the sliced hit tool accordingly. This may need to be a separate flag.
78
79 ATH_MSG_DEBUG("initialize() Setting branch");
80
81 if (!m_monTool.empty())
82 ATH_CHECK(m_monTool.retrieve());
83
84 ATH_CHECK( m_FPGAInputTrackKey.initialize());
85 ATH_CHECK( m_FPGARoadKey.initialize() );
86 ATH_CHECK( m_FPGATrackKey.initialize() );
87 ATH_CHECK( m_FPGAHitKey.initialize() );
88 ATH_CHECK( m_FPGATruthTrackKey.initialize() );
89 ATH_CHECK( m_FPGAOfflineTrackKey.initialize() );
90 ATH_CHECK( m_FPGAEventInfoKey.initialize() );
91
92 ATH_CHECK( m_chrono.retrieve() );
93 ATH_MSG_DEBUG("initialize() Finished");
94
95 return StatusCode::SUCCESS;
96}
static Double_t ss
Gaudi::Property< std::string > m_outputBranch
ToolHandle< FPGATrackSimOutputHeaderTool > m_writeOutputTool
Gaudi::Property< std::string > m_sliceBranch

◆ inputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< Algorithm > >::inputHandles ( ) const
overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ msg()

MsgStream & AthCommonMsg< Algorithm >::msg ( ) const
inlineinherited

Definition at line 24 of file AthCommonMsg.h.

24 {
25 return this->msgStream();
26 }

◆ msgLvl()

bool AthCommonMsg< Algorithm >::msgLvl ( const MSG::Level lvl) const
inlineinherited

Definition at line 30 of file AthCommonMsg.h.

30 {
31 return this->msgLevel(lvl);
32 }

◆ outputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< Algorithm > >::outputHandles ( ) const
overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ renounce()

std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > AthCommonDataStore< AthCommonMsg< Algorithm > >::renounce ( T & h)
inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

381 {
382 h.renounce();
384 }
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > renounce(T &h)

◆ renounceArray()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::renounceArray ( SG::VarHandleKeyArray & handlesArray)
inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

364 {
366 }

◆ sysInitialize()

StatusCode AthAlgorithm::sysInitialize ( )
overridevirtualinherited

Override sysInitialize.

Override sysInitialize from the base class.

Loop through all output handles, and if they're WriteCondHandles, automatically register them and this Algorithm with the CondSvc

Scan through all outputHandles, and if they're WriteCondHandles, register them with the CondSvc

Reimplemented from AthCommonDataStore< AthCommonMsg< Algorithm > >.

Reimplemented in AthAnalysisAlgorithm, AthFilterAlgorithm, AthHistogramAlgorithm, and PyAthena::Alg.

Definition at line 66 of file AthAlgorithm.cxx.

66 {
68
69 if (sc.isFailure()) {
70 return sc;
71 }
72 ServiceHandle<ICondSvc> cs("CondSvc",name());
73 for (auto h : outputHandles()) {
74 if (h->isCondition() && h->mode() == Gaudi::DataHandle::Writer) {
75 // do this inside the loop so we don't create the CondSvc until needed
76 if ( cs.retrieve().isFailure() ) {
77 ATH_MSG_WARNING("no CondSvc found: won't autoreg WriteCondHandles");
78 return StatusCode::SUCCESS;
79 }
80 if (cs->regHandle(this,*h).isFailure()) {
81 sc = StatusCode::FAILURE;
82 ATH_MSG_ERROR("unable to register WriteCondHandle " << h->fullKey()
83 << " with CondSvc");
84 }
85 }
86 }
87 return sc;
88}
static Double_t sc
virtual StatusCode sysInitialize() override
Override sysInitialize.
AthCommonDataStore(const std::string &name, T... args)
virtual std::vector< Gaudi::DataHandle * > outputHandles() const override
::StatusCode StatusCode
StatusCode definition for legacy code.

◆ sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< Algorithm > >::sysStart ( )
overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

◆ updateVHKA()

void AthCommonDataStore< AthCommonMsg< Algorithm > >::updateVHKA ( Gaudi::Details::PropertyBase & )
inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

308 {
309 // debug() << "updateVHKA for property " << p.name() << " " << p.toString()
310 // << " size: " << m_vhka.size() << endmsg;
311 for (auto &a : m_vhka) {
313 for (auto k : keys) {
314 k->setOwner(this);
315 }
316 }
317 }
std::vector< SG::VarHandleKeyArray * > m_vhka

◆ writeOutputData()

StatusCode FPGATrackSimSecondStageAlg::writeOutputData ( const std::vector< FPGATrackSimRoad > & roads_2nd,
std::vector< FPGATrackSimTrack > const & tracks_2nd,
FPGATrackSimDataFlowInfo const * dataFlowInfo )
private

Definition at line 436 of file FPGATrackSimSecondStageAlg.cxx.

439{
441
442 ATH_MSG_DEBUG("NFPGATrackSimRoads_2nd = " << roads_2nd.size() << ", NFPGATrackSimTracks_2nd = " << tracks_2nd.size());
443
444 if (!m_writeOutputData) return StatusCode::SUCCESS;
445 m_logicEventOutputHeader->reserveFPGATrackSimRoads_2nd(roads_2nd.size());
446 m_logicEventOutputHeader->addFPGATrackSimRoads_2nd(roads_2nd);
447 if (m_doTracking) {
448 m_logicEventOutputHeader->reserveFPGATrackSimTracks_2nd(tracks_2nd.size());
449 m_logicEventOutputHeader->addFPGATrackSimTracks_2nd(tracks_2nd);
450 }
451
452
453 m_logicEventOutputHeader->setDataFlowInfo(*dataFlowInfo);
454 ATH_MSG_DEBUG(m_logicEventOutputHeader->getDataFlowInfo());
455
456 // It would be nice to rearrange this so both algorithms use one instance of this tool, I think.
457 // Which means that dataprep can't call writeData because that does Fill().
458 ATH_CHECK(m_writeOutputTool->writeData());
459
460 return StatusCode::SUCCESS;
461}

Member Data Documentation

◆ m_chrono

ServiceHandle<IChronoStatSvc> FPGATrackSimSecondStageAlg::m_chrono {this,"ChronoStatSvc","ChronoStatSvc"}
private

Definition at line 75 of file FPGATrackSimSecondStageAlg.h.

75{this,"ChronoStatSvc","ChronoStatSvc"};

◆ m_description

std::string FPGATrackSimSecondStageAlg::m_description
private

Definition at line 57 of file FPGATrackSimSecondStageAlg.h.

◆ m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_detStore
privateinherited

Pointer to StoreGate (detector store by default)

Definition at line 393 of file AthCommonDataStore.h.

◆ m_doHoughRootOutput2nd

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doHoughRootOutput2nd {this, "DoHoughRootOutput2nd", false, "Dump output from the Hough Transform to flat ntuples"}
private

Definition at line 82 of file FPGATrackSimSecondStageAlg.h.

82{this, "DoHoughRootOutput2nd", false, "Dump output from the Hough Transform to flat ntuples"};

◆ m_doMissingHitsChecks

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doMissingHitsChecks {this, "DoMissingHitsChecks", false}
private

Definition at line 81 of file FPGATrackSimSecondStageAlg.h.

81{this, "DoMissingHitsChecks", false};

◆ m_doNNPathFinder

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doNNPathFinder {this, "doNNPathFinder", false}
private

Definition at line 89 of file FPGATrackSimSecondStageAlg.h.

89{this, "doNNPathFinder", false};

◆ m_doNNTrack_2nd

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doNNTrack_2nd {this, "DoNNTrack_2nd", false, "Run NN track filtering for 2nd Stage"}
private

Definition at line 83 of file FPGATrackSimSecondStageAlg.h.

83{this, "DoNNTrack_2nd", false, "Run NN track filtering for 2nd Stage"};

◆ m_doSpacepoints

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doSpacepoints {this, "Spacepoints", false, "flag to enable the spacepoint formation"}
private

Definition at line 79 of file FPGATrackSimSecondStageAlg.h.

79{this, "Spacepoints", false, "flag to enable the spacepoint formation"};

◆ m_doTracking

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_doTracking {this, "tracking", false, "flag to enable the tracking"}
private

Definition at line 80 of file FPGATrackSimSecondStageAlg.h.

80{this, "tracking", false, "flag to enable the tracking"};

◆ m_evt

long FPGATrackSimSecondStageAlg::m_evt = 0
private

Definition at line 108 of file FPGATrackSimSecondStageAlg.h.

◆ m_evt_truth

long FPGATrackSimSecondStageAlg::m_evt_truth = 0
private

Definition at line 114 of file FPGATrackSimSecondStageAlg.h.

◆ m_evtSel

ServiceHandle<IFPGATrackSimEventSelectionSvc> FPGATrackSimSecondStageAlg::m_evtSel {this, "eventSelector", "", "Event selection Svc"}
private

Definition at line 73 of file FPGATrackSimSecondStageAlg.h.

73{this, "eventSelector", "", "Event selection Svc"};

◆ m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< Algorithm > >::m_evtStore
privateinherited

Pointer to StoreGate (event store by default)

Definition at line 390 of file AthCommonDataStore.h.

◆ m_extendedExtraObjects

DataObjIDColl AthAlgorithm::m_extendedExtraObjects
privateinherited

Definition at line 79 of file AthAlgorithm.h.

◆ m_filterRoads

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_filterRoads {this, "FilterRoads", false, "enable first road filter"}
private

Definition at line 94 of file FPGATrackSimSecondStageAlg.h.

94{this, "FilterRoads", false, "enable first road filter"};

◆ m_filterRoads2

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_filterRoads2 {this, "FilterRoads2", false, "enable second road filter"}
private

Definition at line 95 of file FPGATrackSimSecondStageAlg.h.

95{this, "FilterRoads2", false, "enable second road filter"};

◆ m_FPGAEventInfoKey

SG::ReadHandleKey<FPGATrackSimEventInfo> FPGATrackSimSecondStageAlg::m_FPGAEventInfoKey {this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"}
private

Definition at line 143 of file FPGATrackSimSecondStageAlg.h.

143{this, "FPGATrackSimEventInfoKey", "FPGAEventInfo", "FPGATrackSim event info"};

◆ m_FPGAHitKey

SG::ReadHandleKey<FPGATrackSimHitCollection> FPGATrackSimSecondStageAlg::m_FPGAHitKey {this, "FPGATrackSimHitKey", "FPGAHits_2nd", "FPGATrackSim Hits key"}
private

Definition at line 133 of file FPGATrackSimSecondStageAlg.h.

133{this, "FPGATrackSimHitKey", "FPGAHits_2nd", "FPGATrackSim Hits key"};

◆ m_FPGAInputTrackKey

SG::ReadHandleKey<FPGATrackSimTrackCollection> FPGATrackSimSecondStageAlg::m_FPGAInputTrackKey {this, "FPGATrackSimTrack1stKey", "FPGATracks_1st", "FPGATrackSim tracks 1st stage key"}
private

Definition at line 134 of file FPGATrackSimSecondStageAlg.h.

134{this, "FPGATrackSimTrack1stKey", "FPGATracks_1st", "FPGATrackSim tracks 1st stage key"};

◆ m_FPGAOfflineTrackKey

SG::ReadHandleKey<FPGATrackSimOfflineTrackCollection> FPGATrackSimSecondStageAlg::m_FPGAOfflineTrackKey {this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"}
private

Definition at line 142 of file FPGATrackSimSecondStageAlg.h.

142{this, "FPGATrackSimOfflineTrackKey", "FPGAOfflineTracks", "FPGATrackSim offline tracks"};

◆ m_FPGARoadKey

SG::WriteHandleKey<FPGATrackSimRoadCollection> FPGATrackSimSecondStageAlg::m_FPGARoadKey {this, "FPGATrackSimRoad2ndKey","FPGARoads_2nd","FPGATrackSim Roads 2nd stage key"}
private

Definition at line 137 of file FPGATrackSimSecondStageAlg.h.

137{this, "FPGATrackSimRoad2ndKey","FPGARoads_2nd","FPGATrackSim Roads 2nd stage key"};

◆ m_FPGATrackKey

SG::WriteHandleKey<FPGATrackSimTrackCollection> FPGATrackSimSecondStageAlg::m_FPGATrackKey {this, "FPGATrackSimTrack2ndKey","FPGATracks_2nd","FPGATrackSim Tracks 2nd stage key"}
private

Definition at line 138 of file FPGATrackSimSecondStageAlg.h.

138{this, "FPGATrackSimTrack2ndKey","FPGATracks_2nd","FPGATrackSim Tracks 2nd stage key"};

◆ m_FPGATrackSimMapping

ServiceHandle<IFPGATrackSimMappingSvc> FPGATrackSimSecondStageAlg::m_FPGATrackSimMapping {this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"}
private

Definition at line 72 of file FPGATrackSimSecondStageAlg.h.

72{this, "FPGATrackSimMapping", "FPGATrackSimMappingSvc", "FPGATrackSimMappingSvc"};

◆ m_FPGATruthTrackKey

SG::ReadHandleKey<FPGATrackSimTruthTrackCollection> FPGATrackSimSecondStageAlg::m_FPGATruthTrackKey {this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"}
private

Definition at line 141 of file FPGATrackSimSecondStageAlg.h.

141{this, "FPGATrackSimTruthTrackKey", "FPGATruthTracks", "FPGATrackSim truth tracks"};

◆ m_houghRootOutputTool

ToolHandle<FPGATrackSimHoughRootOutputTool> FPGATrackSimSecondStageAlg::m_houghRootOutputTool {this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"}
private

Definition at line 63 of file FPGATrackSimSecondStageAlg.h.

63{this, "HoughRootOutputTool", "FPGATrackSimHoughRootOutputTool/FPGATrackSimHoughRootOutputTool", "Hough ROOT Output Tool"};

◆ m_logicEventOutputHeader

FPGATrackSimLogicalEventOutputHeader* FPGATrackSimSecondStageAlg::m_logicEventOutputHeader = nullptr
private

Definition at line 103 of file FPGATrackSimSecondStageAlg.h.

◆ m_maxNRoadsFound

unsigned long FPGATrackSimSecondStageAlg::m_maxNRoadsFound = 0
private

Definition at line 120 of file FPGATrackSimSecondStageAlg.h.

◆ m_maxNTracksChi2OLRTot

unsigned long FPGATrackSimSecondStageAlg::m_maxNTracksChi2OLRTot = 0
private

Definition at line 123 of file FPGATrackSimSecondStageAlg.h.

◆ m_maxNTracksChi2Tot

unsigned long FPGATrackSimSecondStageAlg::m_maxNTracksChi2Tot = 0
private

Definition at line 122 of file FPGATrackSimSecondStageAlg.h.

◆ m_maxNTracksTot

unsigned long FPGATrackSimSecondStageAlg::m_maxNTracksTot = 0
private

Definition at line 121 of file FPGATrackSimSecondStageAlg.h.

◆ m_monTool

ToolHandle<GenericMonitoringTool> FPGATrackSimSecondStageAlg::m_monTool {this,"MonTool", "", "Monitoring tool"}
private

Definition at line 130 of file FPGATrackSimSecondStageAlg.h.

130{this,"MonTool", "", "Monitoring tool"};

◆ m_NNTrackTool

ToolHandle<FPGATrackSimNNTrackTool> FPGATrackSimSecondStageAlg::m_NNTrackTool {this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool_2nd", "NN Track Tool"}
private

Definition at line 66 of file FPGATrackSimSecondStageAlg.h.

66{this, "NNTrackTool", "FPGATrackSimNNTrackTool/FPGATrackSimNNTrackTool_2nd", "NN Track Tool"};

◆ m_nRoadsFound

long FPGATrackSimSecondStageAlg::m_nRoadsFound = 0
private

Definition at line 115 of file FPGATrackSimSecondStageAlg.h.

◆ m_nRoadsTot

long FPGATrackSimSecondStageAlg::m_nRoadsTot = 0
private

Definition at line 109 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksChi2Found

long FPGATrackSimSecondStageAlg::m_nTracksChi2Found = 0
private

Definition at line 117 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksChi2OLRFound

long FPGATrackSimSecondStageAlg::m_nTracksChi2OLRFound = 0
private

Definition at line 118 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksChi2OLRTot

long FPGATrackSimSecondStageAlg::m_nTracksChi2OLRTot = 0
private

Definition at line 112 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksChi2Tot

long FPGATrackSimSecondStageAlg::m_nTracksChi2Tot = 0
private

Definition at line 111 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksFound

long FPGATrackSimSecondStageAlg::m_nTracksFound = 0
private

Definition at line 116 of file FPGATrackSimSecondStageAlg.h.

◆ m_nTracksTot

long FPGATrackSimSecondStageAlg::m_nTracksTot = 0
private

Definition at line 110 of file FPGATrackSimSecondStageAlg.h.

◆ m_NumOfHitPerGrouping

Gaudi::Property<int> FPGATrackSimSecondStageAlg::m_NumOfHitPerGrouping { this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"}
private

Definition at line 87 of file FPGATrackSimSecondStageAlg.h.

87{ this, "NumOfHitPerGrouping", 5, "Number of minimum overlapping hits for a track candidate to be removed in the HoughRootOutputTool"};

◆ m_outputBranch

Gaudi::Property<std::string> FPGATrackSimSecondStageAlg::m_outputBranch {this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." }
private

Definition at line 99 of file FPGATrackSimSecondStageAlg.h.

99{this, "outputBranchName", "LogicalEventOutputHeader", "Name of the branch for output data in output ROOT file." };

◆ m_overlapRemovalTool

ToolHandle<FPGATrackSimOverlapRemovalTool> FPGATrackSimSecondStageAlg::m_overlapRemovalTool {this, "OverlapRemoval_2nd", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_2nd", "2nd stage overlap removal tool"}
private

Definition at line 68 of file FPGATrackSimSecondStageAlg.h.

68{this, "OverlapRemoval_2nd", "FPGATrackSimOverlapRemovalTool/FPGATrackSimOverlapRemovalTool_2nd", "2nd stage overlap removal tool"};

◆ m_passLowestChi2TrackOnly

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_passLowestChi2TrackOnly {this, "passLowestChi2TrackOnly", false}
private

Definition at line 88 of file FPGATrackSimSecondStageAlg.h.

88{this, "passLowestChi2TrackOnly", false};

◆ m_SetTruthParametersForTracks

Gaudi::Property<int> FPGATrackSimSecondStageAlg::m_SetTruthParametersForTracks {this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"}
private

Definition at line 78 of file FPGATrackSimSecondStageAlg.h.

78{this, "SetTruthParametersForTracks", -1, "flag to override track parameters and set them to the truth values"};

◆ m_sliceBranch

Gaudi::Property<std::string> FPGATrackSimSecondStageAlg::m_sliceBranch {this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for slied hits in output ROOT file." }
private

Definition at line 98 of file FPGATrackSimSecondStageAlg.h.

98{this, "SliceBranchName", "LogicalEventSlicedHeader", "Name of the branch for slied hits in output ROOT file." };

◆ m_slicedHitHeader

FPGATrackSimLogicalEventInputHeader* FPGATrackSimSecondStageAlg::m_slicedHitHeader = nullptr
private

Definition at line 102 of file FPGATrackSimSecondStageAlg.h.

◆ m_trackExtensionTool

ToolHandle<IFPGATrackSimTrackExtensionTool> FPGATrackSimSecondStageAlg::m_trackExtensionTool {this, "TrackExtensionTool", "FPGATrackSimTrackExtensionTool", "Track extensoin tool"}
private

Definition at line 60 of file FPGATrackSimSecondStageAlg.h.

60{this, "TrackExtensionTool", "FPGATrackSimTrackExtensionTool", "Track extensoin tool"};

◆ m_trackFitterTool

ToolHandle<FPGATrackSimTrackFitterTool> FPGATrackSimSecondStageAlg::m_trackFitterTool {this, "TrackFitter_2nd", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_2nd", "2nd stage track fit tool"}
private

Definition at line 67 of file FPGATrackSimSecondStageAlg.h.

67{this, "TrackFitter_2nd", "FPGATrackSimTrackFitterTool/FPGATrackSimTrackFitterTool_2nd", "2nd stage track fit tool"};

◆ m_trackScoreCut

Gaudi::Property<float> FPGATrackSimSecondStageAlg::m_trackScoreCut {this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." }
private

Definition at line 85 of file FPGATrackSimSecondStageAlg.h.

85{this, "TrackScoreCut", 25.0, "Minimum track score (e.g. chi2 or NN)." };

◆ m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< Algorithm > >::m_varHandleArraysDeclared
privateinherited

Definition at line 399 of file AthCommonDataStore.h.

◆ m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< Algorithm > >::m_vhka
privateinherited

Definition at line 398 of file AthCommonDataStore.h.

◆ m_writeOutNonSPStripHits

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_writeOutNonSPStripHits {this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"}
private

Definition at line 86 of file FPGATrackSimSecondStageAlg.h.

86{this, "writeOutNonSPStripHits", true, "Write tracks to RootOutput if they have strip hits which are not SPs"};

◆ m_writeOutputData

Gaudi::Property<bool> FPGATrackSimSecondStageAlg::m_writeOutputData {this, "writeOutputData", true,"write the output TTree"}
private

Definition at line 84 of file FPGATrackSimSecondStageAlg.h.

84{this, "writeOutputData", true,"write the output TTree"};

◆ m_writeOutputTool

ToolHandle<FPGATrackSimOutputHeaderTool> FPGATrackSimSecondStageAlg::m_writeOutputTool {this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"}
private

Definition at line 71 of file FPGATrackSimSecondStageAlg.h.

71{this, "OutputTool", "FPGATrackSimOutputHeaderTool/FPGATrackSimOutputHeaderTool", "Output tool"};

The documentation for this class was generated from the following files: