#include <jFEXPileupAndNoise.h>

Inheritance diagram for LVL1::jFEXPileupAndNoise:

Collaboration diagram for LVL1::jFEXPileupAndNoise:

Public Member Functions
	jFEXPileupAndNoise (const std::string &type, const std::string &name, const IInterface *parent)
	Constructors.
virtual StatusCode	initialize () override
	standard Athena-Algorithm method
virtual StatusCode	safetyTest () override
virtual StatusCode	reset () override
virtual void	setup (int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width]) override
virtual void	setup (int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width]) override
virtual std::unordered_map< int, std::vector< int > >	GetEt_values () const override
virtual std::unordered_map< int, std::vector< int > >	Get_EM_Et_values () override
virtual std::unordered_map< int, std::vector< int > >	Get_HAD_Et_values () override
virtual	~jFEXPileupAndNoise ()
	Destructor.
virtual std::vector< int >	CalculatePileup () override
virtual StatusCode	ApplyPileup () override
virtual void	ApplyNoise2Jets (bool b) override
virtual void	ApplyNoise2Met (bool b) override
ServiceHandle< StoreGateSvc > &	evtStore ()
	The standard `StoreGateSvc` (event store) Returns (kind of) a pointer to the `StoreGateSvc`.
const ServiceHandle< StoreGateSvc > &	detStore () const
	The standard `StoreGateSvc/DetectorStore` Returns (kind of) a pointer to the `StoreGateSvc`.
virtual StatusCode	sysInitialize () override
	Perform system initialization for an algorithm.
virtual StatusCode	sysStart () override
	Handle START transition.
virtual std::vector< Gaudi::DataHandle * >	inputHandles () const override
	Return this algorithm's input handles.
virtual std::vector< Gaudi::DataHandle * >	outputHandles () const override
	Return this algorithm's output handles.
Gaudi::Details::PropertyBase &	declareProperty (Gaudi::Property< T, V, H > &t)
void	updateVHKA (Gaudi::Details::PropertyBase &)
MsgStream &	msg () const
bool	msgLvl (const MSG::Level lvl) const

Static Public Member Functions
static const InterfaceID &	interfaceID ()

Protected Member Functions
void	renounceArray (SG::VarHandleKeyArray &handlesArray)
	remove all handles from I/O resolution
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void >	renounce (T &h)
void	extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
	Add StoreName to extra input/output deps as needed.

Private Types
typedef ServiceHandle< StoreGateSvc >	StoreGateSvc_t

Private Member Functions
void	reset_conters ()
void	SubtractPileup ()
void	ApplyNoiseCuts (std::unordered_map< int, std::vector< int > > &map_Etvalues, int layer)
int	rhoDivLUT (int ntowers) const
int	getTTowerEta (const LVL1::jTower *tmpTower) const
int	getTTowerET (const LVL1::jTower *tmpTower) const
int	getET_EM (const LVL1::jTower *tmpTower) const
int	getET_HAD (const LVL1::jTower *tmpTower) const
int	getTTArea_EM (const LVL1::jTower *tmpTower) const
int	getTTArea_HAD (const LVL1::jTower *tmpTower) const
int	getTTAreaINV_EM (const LVL1::jTower *tmpTower) const
int	getTTAreaINV_HAD (const LVL1::jTower *tmpTower) const
Gaudi::Details::PropertyBase &	declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
	specialization for handling Gaudi::Property<SG::VarHandleKey>

Private Attributes
SG::ReadHandleKey< LVL1::jTowerContainer >	m_jTowerContainerKey {this, "MyjTowers", "jTowerContainer", "Input container for jTowers"}
SG::ReadHandle< jTowerContainer >	m_jTowerContainer
SG::ReadCondHandleKey< jFEXDBCondData >	m_BDToolKey {this, "BDToolKey", "jFEXDBParams", "DB tool key"}
int	m_FPGA_central [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width] ={{0}}
int	m_FPGA_forward [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width] ={{0}}
int	m_etaMAX =0
std::unordered_map< int, int >	m_FPGA_ET_EM
std::unordered_map< int, int >	m_FPGA_ET_HAD
int	m_rho_EM = 0
int	m_rho_HAD1 = 0
int	m_rho_HAD2 = 0
int	m_rho_HAD3 = 0
int	m_rho_FCAL = 0
int	m_count_rho_EM = 0
int	m_count_rho_HAD1 = 0
int	m_count_rho_HAD2 = 0
int	m_count_rho_HAD3 = 0
int	m_count_rho_FCAL = 0
bool	m_is_FWD = false
bool	m_apply_pileup2jets = false
bool	m_apply_pileup2met = false
bool	m_apply_noise2jets = false
bool	m_apply_noise2met = false
std::unordered_map< int, std::vector< int > >	m_map_Etvalues_EM
std::unordered_map< int, std::vector< int > >	m_map_Etvalues_HAD
StoreGateSvc_t	m_evtStore
	Pointer to StoreGate (event store by default).
StoreGateSvc_t	m_detStore
	Pointer to StoreGate (detector store by default).
std::vector< SG::VarHandleKeyArray * >	m_vhka
bool	m_varHandleArraysDeclared

Detailed Description

Definition at line 27 of file jFEXPileupAndNoise.h.

Member Typedef Documentation

◆ StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< AlgTool > >::StoreGateSvc_t

privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

◆ jFEXPileupAndNoise()

LVL1::jFEXPileupAndNoise::jFEXPileupAndNoise	(	const std::string &	type,
		const std::string &	name,
		const IInterface *	parent )

Constructors.

Definition at line 16 of file jFEXPileupAndNoise.cxx.

                                                                                                                : AthAlgTool(type, name, parent) {
    declareInterface<IjFEXPileupAndNoise>(this);
}

◆ ~jFEXPileupAndNoise()

LVL1::jFEXPileupAndNoise::~jFEXPileupAndNoise ( )

virtual

Destructor.

Definition at line 21 of file jFEXPileupAndNoise.cxx.

21 {

22}

Member Function Documentation

◆ ApplyNoise2Jets()

void LVL1::jFEXPileupAndNoise::ApplyNoise2Jets ( bool b )

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 276 of file jFEXPileupAndNoise.cxx.

                                                    {
    m_apply_noise2jets = b;
}

◆ ApplyNoise2Met()

void LVL1::jFEXPileupAndNoise::ApplyNoise2Met ( bool b )

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 280 of file jFEXPileupAndNoise.cxx.

                                                   {
    m_apply_noise2met = b;
}

◆ ApplyNoiseCuts()

void LVL1::jFEXPileupAndNoise::ApplyNoiseCuts	(	std::unordered_map< int, std::vector< int > > &	map_Etvalues,
		int	layer )

private

Definition at line 390 of file jFEXPileupAndNoise.cxx.

                                                                                                          {
    
    const LVL1::jTower *tmpTower;
    
    for(auto [key,vec] : map_Etvalues){
        
        tmpTower = m_jTowerContainer->findTower(key);
        int Jet_NoiseCut = tmpTower->getNoiseForJet(layer);
        int Met_NoiseCut = tmpTower->getNoiseForMet(layer);
        
        if(m_apply_noise2jets && map_Etvalues[key][0]<=Jet_NoiseCut){ // Et for jets
            map_Etvalues[key][0]=0.;
        }        
        if(m_apply_noise2met && map_Etvalues[key][1]<=Met_NoiseCut){ // Et for Met
            map_Etvalues[key][1]=0.;
        }            
 
    }
    
}

◆ ApplyPileup()

StatusCode LVL1::jFEXPileupAndNoise::ApplyPileup ( )

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 263 of file jFEXPileupAndNoise.cxx.

                                                {
    SG::ReadCondHandle<jFEXDBCondData>   myDBTool = SG::ReadCondHandle<jFEXDBCondData>(m_BDToolKey);
    if(! myDBTool.isValid()) {
        ATH_MSG_ERROR("Could not retrieve DB tool " << m_BDToolKey);
        return StatusCode::FAILURE;
    }
    
    m_apply_pileup2jets = myDBTool->get_doPileUpJet();
    m_apply_pileup2met = myDBTool->get_doPileUpMet();
    
    return StatusCode::SUCCESS;
}

◆ CalculatePileup()

std::vector< int > LVL1::jFEXPileupAndNoise::CalculatePileup ( )

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 93 of file jFEXPileupAndNoise.cxx.

                                                      {
    
    reset_conters();
    
    SG::ReadCondHandle<jFEXDBCondData> myDBTool = SG::ReadCondHandle<jFEXDBCondData>(m_BDToolKey/*, ctx*/);
    if(! myDBTool.isValid()) {
        ATH_MSG_ERROR("Could not retrieve DB tool " << m_BDToolKey);
    }    
    
    for(int iphi=0;iphi<FEXAlgoSpaceDefs::jFEX_algoSpace_height;iphi++){
        for(int ieta=0;ieta<m_etaMAX;ieta++){
            
            int TTID = 0;
            
            if(m_is_FWD){
                TTID = m_FPGA_forward[iphi][ieta];
            }
            else{
                TTID = m_FPGA_central[iphi][ieta];
            }
            
            if(TTID == 0){
                continue; //skipping TTID iqual to 0
            } 
            
            const LVL1::jTower *tmpTower = m_jTowerContainer->findTower(TTID);
            
            int tmp_eta = getTTowerEta(tmpTower);
            // energies used below are in MeV, but to reproduce firmware behavior we need to truncate at the same position,
            // i.e., temporarily go back to the granularity used in firmware!
            int em_granularity  = 25;
            int had_granularity = tmp_eta < 15 ? 500 : 25; //For Tile inputs granularity is 500MeV, for LAr 25MeV
            //storing the energies
            int tmp_energy_EM  = getET_EM(tmpTower)/em_granularity;
            int tmp_energy_HAD = getET_HAD(tmpTower)/had_granularity;
            int tmp_EM_AreaINV  = getTTAreaINV_EM(tmpTower);
            int tmp_HD_AreaINV  = getTTAreaINV_HAD(tmpTower);
            m_FPGA_ET_EM[TTID]  = getET_EM(tmpTower); 
            m_FPGA_ET_HAD[TTID] = getET_HAD(tmpTower);
            
            tmp_energy_EM = (tmp_energy_EM * tmp_EM_AreaINV)/(1<<FEXAlgoSpaceDefs::pu_AreaINV);
            tmp_energy_HAD= (tmp_energy_HAD* tmp_HD_AreaINV)/(1<<FEXAlgoSpaceDefs::pu_AreaINV);
            
            //calculating rho's
            
            // EM layer ( not EM FCAL!! )
            
            if(tmp_eta < 32 ){
                if(tmp_energy_EM > myDBTool->get_PUThrLowEm() and tmp_energy_EM < myDBTool->get_PUThrHighEm()) {
                    m_rho_EM += tmp_energy_EM; 
                    m_count_rho_EM++;
                }
            }
            
            // Tile layer
            if(tmp_eta < 15){
                if(tmp_energy_HAD > myDBTool->get_PUThrLowHadTrex() and tmp_energy_HAD < myDBTool->get_PUThrHighHadTrex()){
                    m_rho_HAD1 += tmp_energy_HAD; 
                    m_count_rho_HAD1++;
                }
            }
            // HEC Overlap layer!
            else if(tmp_eta < 16 ){
                if(tmp_energy_HAD > myDBTool->get_PUThrLowHadHecOverlap() and tmp_energy_HAD < myDBTool->get_PUThrHighHadHecOverlap()){
                    m_rho_HAD2 += tmp_energy_HAD; 
                    m_count_rho_HAD2++;
                }
            }
            // Rest of HEC without overlap
            else if(tmp_eta < 32 ){
                if(tmp_energy_HAD > myDBTool->get_PUThrLowHadLar() and tmp_energy_HAD < myDBTool->get_PUThrHighHadLar()){        
                    m_rho_HAD3 += tmp_energy_HAD;
                    m_count_rho_HAD3++;
                }
            }            
            // FCAL is treated here!
            else if(tmp_eta >= 32){
                
                // Contributes the HAD layer (FCAL2 and FCAL3)
                if( TTID >= FEXAlgoSpaceDefs::jFEX_FCAL2_start){
                    if(tmp_energy_HAD > myDBTool->get_PUThrLowFcal() and tmp_energy_HAD < myDBTool->get_PUThrHighFcal()){
                        m_rho_FCAL += tmp_energy_HAD; 
                        m_count_rho_FCAL++;
                    }
                }
                // FCAL1 is EM layer so the energy is suposed to be in the EM layer
                else{
                    if(tmp_energy_EM > myDBTool->get_PUThrLowFcal() and tmp_energy_EM < myDBTool->get_PUThrHighFcal()){
                        m_rho_FCAL += tmp_energy_EM; 
                        m_count_rho_FCAL++;
                    }                    
                }
            }
        }
    }//end of iphi loop
        
    //calculating rho values for each region
    m_rho_EM    = m_count_rho_EM   > 0 ? ((m_rho_EM*rhoDivLUT(m_count_rho_EM)    )/(1<<FEXAlgoSpaceDefs::pu_rhoLUT)) : 0;
    m_rho_HAD1  = m_count_rho_HAD1 > 0 ? ((m_rho_HAD1*rhoDivLUT(m_count_rho_HAD1))/(1<<FEXAlgoSpaceDefs::pu_rhoLUT)) : 0;
    m_rho_HAD2  = m_count_rho_HAD2 > 0 ? ((m_rho_HAD2*rhoDivLUT(m_count_rho_HAD2))/(1<<FEXAlgoSpaceDefs::pu_rhoLUT)) : 0;
    m_rho_HAD3  = m_count_rho_HAD3 > 0 ? ((m_rho_HAD3*rhoDivLUT(m_count_rho_HAD3))/(1<<FEXAlgoSpaceDefs::pu_rhoLUT)) : 0;
    m_rho_FCAL  = m_count_rho_FCAL > 0 ? ((m_rho_FCAL*rhoDivLUT(m_count_rho_FCAL))/(1<<FEXAlgoSpaceDefs::pu_rhoLUT)) : 0;
    
    //return values in MeV -> m_rho_HAD1 corresponds to TileCal, so 500MeV/count, rest is 25MeV/count
    //note: do not convert the internal values yet, this needs to happen after the PU correction is applied
    //      to fully reproduce FW behavior!
    std::vector<int> rho_values {m_rho_EM*25,m_rho_HAD1*500,m_rho_HAD2*25,m_rho_HAD3*25,m_rho_FCAL*25};
    
    SubtractPileup();
    
    return rho_values;
}

◆ declareGaudiProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< AlgTool > >::declareGaudiProperty	(	Gaudi::Property< T, V, H > &	hndl,
		const SG::VarHandleKeyType &	)

inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

  {
    return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
                                                       hndl.value(), 
                                                       hndl.documentation());
 
  }

◆ declareProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< AlgTool > >::declareProperty ( Gaudi::Property< T, V, H > & t )

inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

                                                                     {
    typedef typename SG::HandleClassifier<T>::type htype;
    return AthCommonDataStore<PBASE>::declareGaudiProperty(t, htype());
  }

◆ detStore()

const ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< AlgTool > >::detStore ( ) const

inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

95{ return m_detStore; }

AthCommonDataStore< AthCommonMsg< AlgTool > >::m_detStore

StoreGateSvc_t m_detStore

Definition AthCommonDataStore.h:393

◆ evtStore()

ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< AlgTool > >::evtStore ( )

inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

85{ return m_evtStore; }

AthCommonDataStore< AthCommonMsg< AlgTool > >::m_evtStore

StoreGateSvc_t m_evtStore

Definition AthCommonDataStore.h:390

◆ extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase & ExtraDeps )

protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

◆ Get_EM_Et_values()

std::unordered_map< int, std::vector< int > > LVL1::jFEXPileupAndNoise::Get_EM_Et_values ( )

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 286 of file jFEXPileupAndNoise.cxx.

                                                                              {
    
    // map for energies sent to the FPGA
    m_map_Etvalues_EM.clear();
 
    
    for(int iphi=0; iphi<FEXAlgoSpaceDefs::jFEX_algoSpace_height; iphi++) {
        for(int ieta=0; ieta<m_etaMAX; ieta++) {
 
            int TTID = 0;
 
            if(m_is_FWD) {
                TTID = m_FPGA_forward[iphi][ieta];
            }
            else {
                TTID = m_FPGA_central[iphi][ieta];
            }
 
            if(TTID == 0) continue; //skipping TTID iqual to 0    
            const LVL1::jTower *tmpTower = m_jTowerContainer->findTower(TTID);
            
            // tmp variable to fill the map
            std::vector<int> v_energies;
            v_energies.clear();
            v_energies.resize(2,0);
            
            //saving the SG energy
            int tmp_TotalEt_jet=getET_EM(tmpTower);
            int tmp_TotalEt_met=getET_EM(tmpTower);
            
            // if true changing the raw energy to the pileup subtracted energy for jets
            if(m_apply_pileup2jets){
                tmp_TotalEt_jet = m_FPGA_ET_EM[TTID];
            }
            
            // if true changing the raw energy to the pileup subtracted energy for met
            if(m_apply_pileup2met){
                tmp_TotalEt_met = m_FPGA_ET_EM[TTID];
            }
            
            v_energies[0]=tmp_TotalEt_jet;
            v_energies[1]=tmp_TotalEt_met;
 
            m_map_Etvalues_EM.insert(std::make_pair(TTID, v_energies));    
        }
    }
 
    if(m_apply_noise2jets || m_apply_noise2met) ApplyNoiseCuts(m_map_Etvalues_EM,0);
    
    return m_map_Etvalues_EM;
}

◆ Get_HAD_Et_values()

std::unordered_map< int, std::vector< int > > LVL1::jFEXPileupAndNoise::Get_HAD_Et_values ( )

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 338 of file jFEXPileupAndNoise.cxx.

                                                                               {
    
    // map for energies sent to the FPGA
    m_map_Etvalues_HAD.clear();
 
    
    for(int iphi=0; iphi<FEXAlgoSpaceDefs::jFEX_algoSpace_height; iphi++) {
        for(int ieta=0; ieta<m_etaMAX; ieta++) {
 
            int TTID = 0;
 
            if(m_is_FWD) {
                TTID = m_FPGA_forward[iphi][ieta];
            }
            else {
                TTID = m_FPGA_central[iphi][ieta];
            }
 
            if(TTID == 0) continue; //skipping TTID iqual to 0    
            const LVL1::jTower *tmpTower = m_jTowerContainer->findTower(TTID);
            
            // tmp variable to fill the map
            std::vector<int> v_energies;
            v_energies.clear();
            v_energies.resize(2,0);
            
            //saving the SG energy
            int tmp_TotalEt_jet=getET_HAD(tmpTower);
            int tmp_TotalEt_met=getET_HAD(tmpTower);
            
            // if true changing the raw energy to the pileup subtracted energy for jets
            if(m_apply_pileup2jets){
                tmp_TotalEt_jet = m_FPGA_ET_HAD[TTID];
            }
            
            // if true changing the raw energy to the pileup subtracted energy for met
            if(m_apply_pileup2met){
                tmp_TotalEt_met = m_FPGA_ET_HAD[TTID];
            }
            
            v_energies[0]=tmp_TotalEt_jet;
            v_energies[1]=tmp_TotalEt_met;
 
            m_map_Etvalues_HAD.insert(std::make_pair(TTID, v_energies));
        }
    }
 
    if(m_apply_noise2jets || m_apply_noise2met) ApplyNoiseCuts(m_map_Etvalues_HAD,1);
    
    return m_map_Etvalues_HAD;
}

◆ getET_EM()

int LVL1::jFEXPileupAndNoise::getET_EM ( const LVL1::jTower * tmpTower ) const

private

Definition at line 445 of file jFEXPileupAndNoise.cxx.

                                                                     {
    return tmpTower->getET_EM();
}

◆ getET_HAD()

int LVL1::jFEXPileupAndNoise::getET_HAD ( const LVL1::jTower * tmpTower ) const

private

Definition at line 449 of file jFEXPileupAndNoise.cxx.

                                                                      {
    return tmpTower->getET_HAD();
}

◆ GetEt_values()

std::unordered_map< int, std::vector< int > > LVL1::jFEXPileupAndNoise::GetEt_values ( ) const

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 411 of file jFEXPileupAndNoise.cxx.

                                                                                 {
    
    // map for energies sent to the FPGA
    std::unordered_map<int,std::vector<int> > map_Etvalues;
    
    /* 
     *  The vector Et_energy has size 2
     *  Et_energy[0] is used un the Jet algos
     *  Et_energy[1] is used un the Met/SumEt algos
     */
    std::vector<int> Et_energy;
    
    for(auto [key,vec] : m_map_Etvalues_EM){
        
        Et_energy.clear();
        Et_energy.resize(2,0);
        
        Et_energy[0] = m_map_Etvalues_EM.at(key)[0] + m_map_Etvalues_HAD.at(key)[0];
        Et_energy[1] = m_map_Etvalues_EM.at(key)[1] + m_map_Etvalues_HAD.at(key)[1];
        map_Etvalues[key] = Et_energy;
    }
    return map_Etvalues;
}

◆ getTTArea_EM()

int LVL1::jFEXPileupAndNoise::getTTArea_EM ( const LVL1::jTower * tmpTower ) const

private

Definition at line 454 of file jFEXPileupAndNoise.cxx.

                                                                         {
    return tmpTower->getTTowerArea(0);
}

◆ getTTArea_HAD()

int LVL1::jFEXPileupAndNoise::getTTArea_HAD ( const LVL1::jTower * tmpTower ) const

private

Definition at line 459 of file jFEXPileupAndNoise.cxx.

                                                                          {
    return tmpTower->getTTowerArea(1);
}

◆ getTTAreaINV_EM()

int LVL1::jFEXPileupAndNoise::getTTAreaINV_EM ( const LVL1::jTower * tmpTower ) const

private

Definition at line 464 of file jFEXPileupAndNoise.cxx.

                                                                            {
    return tmpTower->getTTowerAreaInv(0);
}

◆ getTTAreaINV_HAD()

int LVL1::jFEXPileupAndNoise::getTTAreaINV_HAD ( const LVL1::jTower * tmpTower ) const

private

Definition at line 469 of file jFEXPileupAndNoise.cxx.

                                                                             {
    return tmpTower->getTTowerAreaInv(1);
}

◆ getTTowerET()

int LVL1::jFEXPileupAndNoise::getTTowerET ( const LVL1::jTower * tmpTower ) const

private

Definition at line 441 of file jFEXPileupAndNoise.cxx.

                                                                        {
    return tmpTower->getTotalET();
}

◆ getTTowerEta()

int LVL1::jFEXPileupAndNoise::getTTowerEta ( const LVL1::jTower * tmpTower ) const

private

Definition at line 437 of file jFEXPileupAndNoise.cxx.

                                                                         {
    return tmpTower->iEta() < 0 ? std::abs(tmpTower->iEta()+1) : tmpTower->iEta() ;
}

◆ initialize()

StatusCode LVL1::jFEXPileupAndNoise::initialize ( )

overridevirtual

standard Athena-Algorithm method

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 24 of file jFEXPileupAndNoise.cxx.

                                              {
    
    ATH_CHECK(m_jTowerContainerKey.initialize());
    ATH_CHECK( m_BDToolKey.initialize() );
    
    return StatusCode::SUCCESS;
}

◆ inputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< AlgTool > >::inputHandles ( ) const

overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ interfaceID()

const InterfaceID & LVL1::IjFEXPileupAndNoise::interfaceID ( )

inlinestaticinherited

Definition at line 45 of file IjFEXPileupAndNoise.h.

{
    return IID_IjFEXPileupAndNoise;
}

◆ msg()

MsgStream & AthCommonMsg< AlgTool >::msg ( ) const

inlineinherited

Definition at line 24 of file AthCommonMsg.h.

                                {
    return this->msgStream();
  }

◆ msgLvl()

bool AthCommonMsg< AlgTool >::msgLvl ( const MSG::Level lvl ) const

inlineinherited

Definition at line 30 of file AthCommonMsg.h.

                                               {
    return this->msgLevel(lvl);
  }

◆ outputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< AlgTool > >::outputHandles ( ) const

overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ renounce()

std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > AthCommonDataStore< AthCommonMsg< AlgTool > >::renounce ( T & h )

inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

  {
    h.renounce();
    PBASE::renounce (h);
  }

◆ renounceArray()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::renounceArray ( SG::VarHandleKeyArray & handlesArray )

inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

                                                          {
    handlesArray.renounce();
  }

◆ reset()

StatusCode LVL1::jFEXPileupAndNoise::reset ( )

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 44 of file jFEXPileupAndNoise.cxx.

                                         {
 
    m_is_FWD=0;
    m_apply_pileup2jets=0; 
    m_apply_pileup2met=0;
    m_apply_noise2jets=0;
    m_apply_noise2met=0;
 
    reset_conters();
    
    return StatusCode::SUCCESS;
}

◆ reset_conters()

void LVL1::jFEXPileupAndNoise::reset_conters ( )

private

Definition at line 57 of file jFEXPileupAndNoise.cxx.

                                           {
   
    m_rho_EM   = 0;
    m_rho_HAD1 = 0;
    m_rho_HAD2 = 0;
    m_rho_HAD3 = 0;
    m_rho_FCAL = 0;
    
    m_count_rho_EM   = 0;
    m_count_rho_HAD1 = 0;
    m_count_rho_HAD2 = 0;
    m_count_rho_HAD3 = 0;
    m_count_rho_FCAL = 0;    
}

◆ rhoDivLUT()

int LVL1::jFEXPileupAndNoise::rhoDivLUT ( int ntowers ) const

private

Definition at line 206 of file jFEXPileupAndNoise.cxx.

                                                        {
    
    //This is to save one bit in the firmware (19 bit will set be set to 1 instead of the 20th bit and rest are 0) 
    if(ntowers == 1) return ((1<<FEXAlgoSpaceDefs::pu_rhoLUT) - 1);
    return static_cast<int>((1.0/ntowers)*(1<<FEXAlgoSpaceDefs::pu_rhoLUT) );
}

◆ safetyTest()

StatusCode LVL1::jFEXPileupAndNoise::safetyTest ( )

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 33 of file jFEXPileupAndNoise.cxx.

                                              {
    
    m_jTowerContainer = SG::ReadHandle<jTowerContainer>(m_jTowerContainerKey);
    if(! m_jTowerContainer.isValid()) {
        ATH_MSG_ERROR("Could not retrieve jTowerContainer " << m_jTowerContainerKey.key());
        return StatusCode::FAILURE;
    }
 
    return StatusCode::SUCCESS;
}

◆ setup() [1/2]

void LVL1::jFEXPileupAndNoise::setup ( int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width] )

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 74 of file jFEXPileupAndNoise.cxx.

                                                                                                                             {
 
    ATH_MSG_DEBUG("---------------- jFEXPileupAndNoise::setup ----------------");
    m_is_FWD = 0; //central region
    m_etaMAX = FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width;
    std::copy(&FPGA[0][0], &FPGA[0][0] + FEXAlgoSpaceDefs::jFEX_algoSpace_height*FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width, &m_FPGA_central[0][0]);
}

◆ setup() [2/2]

void LVL1::jFEXPileupAndNoise::setup ( int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width] )

overridevirtual

Implements LVL1::IjFEXPileupAndNoise.

Definition at line 84 of file jFEXPileupAndNoise.cxx.

                                                                                                                             {
    
    ATH_MSG_DEBUG("---------------- jFEXPileupAndNoise::setup ----------------");
    m_is_FWD = 1; //forward region
    m_etaMAX = FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width;
    std::copy(&FPGA[0][0], &FPGA[0][0] + FEXAlgoSpaceDefs::jFEX_algoSpace_height*FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width, &m_FPGA_forward[0][0]);
}

◆ SubtractPileup()

void LVL1::jFEXPileupAndNoise::SubtractPileup ( )

private

Definition at line 213 of file jFEXPileupAndNoise.cxx.

                                            {
    
    for(int iphi=0; iphi<FEXAlgoSpaceDefs::jFEX_algoSpace_height; iphi++) {
        for(int ieta=0; ieta<m_etaMAX; ieta++) {
 
            int TTID = 0;
 
            if(m_is_FWD) {
                TTID = m_FPGA_forward[iphi][ieta];
            }
            else {
                TTID = m_FPGA_central[iphi][ieta];
            }
 
            if(TTID == 0) continue; //skipping TTID iqual to 0
 
            const LVL1::jTower *tmpTower = m_jTowerContainer->findTower(TTID);
            int tmp_eta = getTTowerEta(tmpTower);
            int tmp_EM_Area = getTTArea_EM(tmpTower);
            int tmp_HD_Area = getTTArea_HAD(tmpTower);
 
            if(tmp_eta < 32) {
                m_FPGA_ET_EM[TTID] =m_FPGA_ET_EM[TTID] - ((m_rho_EM * tmp_EM_Area)/(1<<FEXAlgoSpaceDefs::pu_Area)) * 25; //factor 25: jFEX internal counts -> MeV (LAr)
            }
 
            if(tmp_eta < 15) {
                m_FPGA_ET_HAD[TTID]=m_FPGA_ET_HAD[TTID] - ((m_rho_HAD1 * tmp_HD_Area)/(1<<FEXAlgoSpaceDefs::pu_Area)) * 500; //factor 500: jFEX internal counts -> MeV (Tile)
            }
            else if(tmp_eta < 16 ) {
                m_FPGA_ET_HAD[TTID]=m_FPGA_ET_HAD[TTID] - ((m_rho_HAD2 * tmp_HD_Area)/(1<<FEXAlgoSpaceDefs::pu_Area)) * 25; //factor 25: jFEX internal counts -> MeV (LAr)
            }
            else if(tmp_eta < 32 ) {
                m_FPGA_ET_HAD[TTID]=m_FPGA_ET_HAD[TTID] - ((m_rho_HAD3 * tmp_HD_Area)/(1<<FEXAlgoSpaceDefs::pu_Area)) * 25; //factor 25: jFEX internal counts -> MeV (LAr)
            }
            else if(tmp_eta >= 32) {
                // Contributes the HAD layer (FCAL2 and FCAL3)
                if( TTID >= FEXAlgoSpaceDefs::jFEX_FCAL2_start){
                    m_FPGA_ET_HAD[TTID] = m_FPGA_ET_HAD[TTID] - ((m_rho_FCAL * (tmp_HD_Area))/(1<<FEXAlgoSpaceDefs::pu_Area)) * 25; //factor 25: jFEX internal counts -> MeV (LAr)
                }
                // FCAL1 is EM layer so the energy is suposed to be in the EM layer
                else{
                    m_FPGA_ET_EM[TTID]  = m_FPGA_ET_EM[TTID] - ((m_rho_FCAL * (tmp_EM_Area))/(1<<FEXAlgoSpaceDefs::pu_Area)) * 25; //factor 25: jFEX internal counts -> MeV (LAr)
                }
            }            
        }
    }
}

◆ sysInitialize()

virtual StatusCode AthCommonDataStore< AthCommonMsg< AlgTool > >::sysInitialize ( )

overridevirtualinherited

Perform system initialization for an algorithm.

We override this to declare all the elements of handle key arrays at the end of initialization. See comments on updateVHKA.

Reimplemented in asg::AsgMetadataTool, AthCheckedComponent< AthAlgTool >, and AthCheckedComponent<::AthAlgTool >.

◆ sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< AlgTool > >::sysStart ( )

overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

◆ updateVHKA()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::updateVHKA ( Gaudi::Details::PropertyBase & )

inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

                                               {
    // debug() << "updateVHKA for property " << p.name() << " " << p.toString() 
    //         << "  size: " << m_vhka.size() << endmsg;
    for (auto &a : m_vhka) {
      std::vector<SG::VarHandleKey*> keys = a->keys();
      for (auto k : keys) {
        k->setOwner(this);
      }
    }
  }

Member Data Documentation

◆ m_apply_noise2jets

bool LVL1::jFEXPileupAndNoise::m_apply_noise2jets = false

private

Definition at line 89 of file jFEXPileupAndNoise.h.

◆ m_apply_noise2met

bool LVL1::jFEXPileupAndNoise::m_apply_noise2met = false

private

Definition at line 90 of file jFEXPileupAndNoise.h.

◆ m_apply_pileup2jets

bool LVL1::jFEXPileupAndNoise::m_apply_pileup2jets = false

private

Definition at line 87 of file jFEXPileupAndNoise.h.

◆ m_apply_pileup2met

bool LVL1::jFEXPileupAndNoise::m_apply_pileup2met = false

private

Definition at line 88 of file jFEXPileupAndNoise.h.

◆ m_BDToolKey

SG::ReadCondHandleKey<jFEXDBCondData> LVL1::jFEXPileupAndNoise::m_BDToolKey {this, "BDToolKey", "jFEXDBParams", "DB tool key"}

private

Definition at line 61 of file jFEXPileupAndNoise.h.

61{this, "BDToolKey", "jFEXDBParams", "DB tool key"};

◆ m_count_rho_EM

int LVL1::jFEXPileupAndNoise::m_count_rho_EM = 0

private

Definition at line 79 of file jFEXPileupAndNoise.h.

◆ m_count_rho_FCAL

int LVL1::jFEXPileupAndNoise::m_count_rho_FCAL = 0

private

Definition at line 83 of file jFEXPileupAndNoise.h.

◆ m_count_rho_HAD1

int LVL1::jFEXPileupAndNoise::m_count_rho_HAD1 = 0

private

Definition at line 80 of file jFEXPileupAndNoise.h.

◆ m_count_rho_HAD2

int LVL1::jFEXPileupAndNoise::m_count_rho_HAD2 = 0

private

Definition at line 81 of file jFEXPileupAndNoise.h.

◆ m_count_rho_HAD3

int LVL1::jFEXPileupAndNoise::m_count_rho_HAD3 = 0

private

Definition at line 82 of file jFEXPileupAndNoise.h.

◆ m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< AlgTool > >::m_detStore

privateinherited

Pointer to StoreGate (detector store by default).

Definition at line 393 of file AthCommonDataStore.h.

◆ m_etaMAX

int LVL1::jFEXPileupAndNoise::m_etaMAX =0

private

Definition at line 66 of file jFEXPileupAndNoise.h.

◆ m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< AlgTool > >::m_evtStore

privateinherited

Pointer to StoreGate (event store by default).

Definition at line 390 of file AthCommonDataStore.h.

◆ m_FPGA_central

int LVL1::jFEXPileupAndNoise::m_FPGA_central[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width] ={{0}}

private

Definition at line 63 of file jFEXPileupAndNoise.h.

63{0}};

◆ m_FPGA_ET_EM

std::unordered_map<int,int > LVL1::jFEXPileupAndNoise::m_FPGA_ET_EM

private

Definition at line 68 of file jFEXPileupAndNoise.h.

◆ m_FPGA_ET_HAD

std::unordered_map<int,int > LVL1::jFEXPileupAndNoise::m_FPGA_ET_HAD

private

Definition at line 69 of file jFEXPileupAndNoise.h.

◆ m_FPGA_forward

int LVL1::jFEXPileupAndNoise::m_FPGA_forward[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width] ={{0}}

private

Definition at line 64 of file jFEXPileupAndNoise.h.

64{0}};

◆ m_is_FWD

bool LVL1::jFEXPileupAndNoise::m_is_FWD = false

private

Definition at line 86 of file jFEXPileupAndNoise.h.

◆ m_jTowerContainer

SG::ReadHandle<jTowerContainer> LVL1::jFEXPileupAndNoise::m_jTowerContainer

private

Definition at line 59 of file jFEXPileupAndNoise.h.

◆ m_jTowerContainerKey

SG::ReadHandleKey<LVL1::jTowerContainer> LVL1::jFEXPileupAndNoise::m_jTowerContainerKey {this, "MyjTowers", "jTowerContainer", "Input container for jTowers"}

private

Definition at line 58 of file jFEXPileupAndNoise.h.

58{this, "MyjTowers", "jTowerContainer", "Input container for jTowers"};

◆ m_map_Etvalues_EM

std::unordered_map<int,std::vector<int> > LVL1::jFEXPileupAndNoise::m_map_Etvalues_EM

private

Definition at line 107 of file jFEXPileupAndNoise.h.

◆ m_map_Etvalues_HAD

std::unordered_map<int,std::vector<int> > LVL1::jFEXPileupAndNoise::m_map_Etvalues_HAD

private

Definition at line 108 of file jFEXPileupAndNoise.h.

◆ m_rho_EM

int LVL1::jFEXPileupAndNoise::m_rho_EM = 0

private

Definition at line 72 of file jFEXPileupAndNoise.h.

◆ m_rho_FCAL

int LVL1::jFEXPileupAndNoise::m_rho_FCAL = 0

private

Definition at line 76 of file jFEXPileupAndNoise.h.

◆ m_rho_HAD1

int LVL1::jFEXPileupAndNoise::m_rho_HAD1 = 0

private

Definition at line 73 of file jFEXPileupAndNoise.h.

◆ m_rho_HAD2

int LVL1::jFEXPileupAndNoise::m_rho_HAD2 = 0

private

Definition at line 74 of file jFEXPileupAndNoise.h.

◆ m_rho_HAD3

int LVL1::jFEXPileupAndNoise::m_rho_HAD3 = 0

private

Definition at line 75 of file jFEXPileupAndNoise.h.

◆ m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< AlgTool > >::m_varHandleArraysDeclared

privateinherited

Definition at line 399 of file AthCommonDataStore.h.

◆ m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< AlgTool > >::m_vhka

privateinherited

Definition at line 398 of file AthCommonDataStore.h.

The documentation for this class was generated from the following files:

Public Member Functions

Static Public Member Functions

Protected Member Functions

Private Types

Private Member Functions

Private Attributes

Detailed Description

Member Typedef Documentation

◆ StoreGateSvc_t

Constructor & Destructor Documentation

◆ jFEXPileupAndNoise()

◆ ~jFEXPileupAndNoise()

Member Function Documentation

◆ ApplyNoise2Jets()

◆ ApplyNoise2Met()

◆ ApplyNoiseCuts()

◆ ApplyPileup()

◆ CalculatePileup()

◆ declareGaudiProperty()

◆ declareProperty()

◆ detStore()

◆ evtStore()

◆ extraDeps_update_handler()

◆ Get_EM_Et_values()

◆ Get_HAD_Et_values()

◆ getET_EM()

◆ getET_HAD()

◆ GetEt_values()

◆ getTTArea_EM()

◆ getTTArea_HAD()

◆ getTTAreaINV_EM()

◆ getTTAreaINV_HAD()

◆ getTTowerET()

◆ getTTowerEta()

◆ initialize()

◆ inputHandles()

◆ interfaceID()

◆ msg()

◆ msgLvl()

◆ outputHandles()

◆ renounce()

◆ renounceArray()

◆ reset()

◆ reset_conters()

◆ rhoDivLUT()

◆ safetyTest()

◆ setup() [1/2]

◆ setup() [2/2]

◆ SubtractPileup()

◆ sysInitialize()

◆ sysStart()

◆ updateVHKA()

Member Data Documentation

◆ m_apply_noise2jets

◆ m_apply_noise2met

◆ m_apply_pileup2jets

◆ m_apply_pileup2met

◆ m_BDToolKey

◆ m_count_rho_EM

◆ m_count_rho_FCAL

◆ m_count_rho_HAD1

◆ m_count_rho_HAD2

◆ m_count_rho_HAD3

◆ m_detStore

◆ m_etaMAX

◆ m_evtStore

◆ m_FPGA_central

◆ m_FPGA_ET_EM

◆ m_FPGA_ET_HAD

◆ m_FPGA_forward

◆ m_is_FWD

◆ m_jTowerContainer

◆ m_jTowerContainerKey

◆ m_map_Etvalues_EM

◆ m_map_Etvalues_HAD

◆ m_rho_EM

◆ m_rho_FCAL

◆ m_rho_HAD1

◆ m_rho_HAD2

◆ m_rho_HAD3