TRT_FillCablingData_SR1 Class Reference

#include <TRT_FillCablingData_SR1.h>

Inheritance diagram for TRT_FillCablingData_SR1:

Public Member Functions
	TRT_FillCablingData_SR1 (const std::string &type, const std::string &name, const IInterface *parent)
virtual	~TRT_FillCablingData_SR1 ()
virtual StatusCode	initialize ()
virtual StatusCode	finalize ()
TRT_CablingData *	fillData ()
void	defineCollID ()
std::vector< uint32_t >	getRobID (Identifier id) const
void	fillCollID (uint32_t rob_id, std::vector< IdentifierHash > &ids)
ServiceHandle< StoreGateSvc > &	evtStore ()
	The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.
const ServiceHandle< StoreGateSvc > &	detStore () const
	The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.
virtual StatusCode	sysInitialize () override
	Perform system initialization for an algorithm.
virtual StatusCode	sysStart () override
	Handle START transition.
virtual std::vector< Gaudi::DataHandle * >	inputHandles () const override
	Return this algorithm's input handles.
virtual std::vector< Gaudi::DataHandle * >	outputHandles () const override
	Return this algorithm's output handles.
Gaudi::Details::PropertyBase &	declareProperty (Gaudi::Property< T, V, H > &t)
void	updateVHKA (Gaudi::Details::PropertyBase &)
MsgStream &	msg () const
bool	msgLvl (const MSG::Level lvl) const

Static Public Member Functions
static const InterfaceID &	interfaceID ()

Protected Member Functions
void	renounceArray (SG::VarHandleKeyArray &handlesArray)
	remove all handles from I/O resolution
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void >	renounce (T &h)
void	extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
	Add StoreName to extra input/output deps as needed.

Private Types
typedef ServiceHandle< StoreGateSvc >	StoreGateSvc_t

Private Member Functions
void	defineParameters ()
void	defineTables ()
Gaudi::Details::PropertyBase &	declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
	specialization for handling Gaudi::Property<SG::VarHandleKey>

Private Attributes
const TRT_ID *	m_TRTHelper
IdContext	m_cntx
TRT_CablingData *	m_cabling = nullptr
int	m_numberOfRings = 0
int	m_numberOfLayersA = 0
int	m_numberOfLayersB = 0
int	m_numberOfLayersC = 0
int	m_numberOfIdentifierSectors = 0
std::map< int, std::vector< uint32_t > >	m_phi_to_source
std::vector< std::vector< Identifier > >	m_identfierForAllStraws
std::vector< std::vector< IdentifierHash > >	m_identfierHashForAllStraws
std::vector< std::vector< IdentifierHash > * >	m_collID
std::vector< int >	m_numberOfStrawsInLayers
std::map< int, int >	m_1BS_1BL_map
std::map< int, int >	m_2BS_2BL1_map
std::map< int, int >	m_2BL2_3BL1_map
std::map< int, int >	m_3BL2_map
std::map< int, int >	m_3BS_map
std::map< int, int >	m_1FS_1FL_map
std::map< int, int >	m_2FS_2FL1_map
std::map< int, int >	m_2FL2_3FL1_map
std::map< int, int >	m_3FL2_map
std::map< int, int >	m_3FS_map
std::map< int, int >	m_ec_1l_map
std::map< int, int >	m_ec_2l_map
std::map< int, int >	m_ec_3l_map
std::map< int, int >	m_ec_1r_map
std::map< int, int >	m_ec_2r_map
std::map< int, int >	m_ec_3r_map
GlobalCableMap	m_CableMap
StoreGateSvc_t	m_evtStore
	Pointer to StoreGate (event store by default)
StoreGateSvc_t	m_detStore
	Pointer to StoreGate (detector store by default)
std::vector< SG::VarHandleKeyArray * >	m_vhka
bool	m_varHandleArraysDeclared

Detailed Description

Definition at line 37 of file TRT_FillCablingData_SR1.h.

Member Typedef Documentation

StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< AlgTool > >::StoreGateSvc_t

privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

TRT_FillCablingData_SR1()

TRT_FillCablingData_SR1::TRT_FillCablingData_SR1	(	const std::string &	type,
		const std::string &	name,
		const IInterface *	parent )

Definition at line 42 of file TRT_FillCablingData_SR1.cxx.

                               :  AthAlgTool(type,name,parent),
                  m_TRTHelper(nullptr)
{
  declareInterface< TRT_FillCablingData_SR1 >( this );   
}

~TRT_FillCablingData_SR1()

TRT_FillCablingData_SR1::~TRT_FillCablingData_SR1 ( )

virtual

Definition at line 51 of file TRT_FillCablingData_SR1.cxx.

{}

Member Function Documentation

declareGaudiProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< AlgTool > >::declareGaudiProperty ( Gaudi::Property< T, V, H > & hndl, const SG::VarHandleKeyType &  )

inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

  {
    return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
                                                       hndl.value(), 
                                                       hndl.documentation());
 
  }

declareProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< AlgTool > >::declareProperty ( Gaudi::Property< T, V, H > & t )

inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

                                                                     {
    typedef typename SG::HandleClassifier<T>::type htype;
    return AthCommonDataStore<PBASE>::declareGaudiProperty(t, htype());
  }

defineCollID()

void TRT_FillCablingData_SR1::defineCollID

(

)

Definition at line 766 of file TRT_FillCablingData_SR1.cxx.

{
   ATH_MSG_INFO( "In defineCollID()" );
 
   GlobalCableMap::iterator pos;
   for ( pos=m_CableMap.begin(); pos != m_CableMap.end(); ++pos )
   {   
      std::vector<IdentifierHash> * vectID = new std::vector<IdentifierHash>();
      fillCollID( pos->first, *vectID);
 
      ATH_MSG_INFO( "Adding Collid for ROB " << std::hex << pos->first << std::dec );
 
      m_cabling->add_collID( pos->first, vectID);
   }
 
   return;
}

defineParameters()

void TRT_FillCablingData_SR1::defineParameters ( )

private

Definition at line 102 of file TRT_FillCablingData_SR1.cxx.

{
  m_numberOfRings = 3;
 
  m_numberOfLayersA = 19;
  m_numberOfLayersB = 24;
  m_numberOfLayersC = 30;
 
  //  m_numberOfStrawsInBarrelROD = 1642;
  m_numberOfIdentifierSectors = 3;
 
  // Mapping from phi sector index to source id
  //m_phi_to_source.push_back( 2 );        // Phi 0 is Source ID 0x3102
  //m_phi_to_source.push_back( 3 );        // Phi 1 is Source ID 0x3103
  //  m_phi_to_source.push_back( 3 );        // Phi 0 is Source ID 0x3103
  //  m_phi_to_source.push_back( 2 );        // Phi 1 is Source ID 0x3102
  // NB: Source ID 0x3101 is the 3S boards on BOTH Phi 0 and Phi 1
     
   
  int tmpArray[] = {15, 16, 16, 16, 16, 17, 17, 17, 17, 17, 18,           // Module Type 1
            18, 18, 18, 18, 19, 19, 19, 18,                       // Module Type 1
            19, 20, 20, 20, 20, 20, 21, 21, 21, 21, 21,           // Module Type 2
            22, 22, 22, 22, 22, 23, 23, 23, 23, 23, 24, 24, 23,   // Module Type 2
            23, 24, 24, 24, 24, 25, 25, 25, 25, 25, 26,           // Module Type 3
            26, 26, 26, 26, 27, 27, 27, 27, 27, 28, 28, 28, 28,   // Module Type 3
            28, 29, 29, 29, 29, 28, -1};                          // Module Type 3
 
  int i=0;
  int RunningCount=0;
  while( -1 != tmpArray[i] )
  {
     RunningCount += tmpArray[i];
     m_numberOfStrawsInLayers.push_back( RunningCount );
 
     i++;
  }
  m_numberOfStrawsInLayers.push_back( -1 );
 
  return;
}

defineTables()

void TRT_FillCablingData_SR1::defineTables ( )

private

Definition at line 145 of file TRT_FillCablingData_SR1.cxx.

{
  ATH_MSG_INFO( "In defineTables" ); 
 
 
  // Reading mapping   
  int  moduleId, strawLayerId, strawInLayerId;
  Identifier strawID;
  IdentifierHash hashId;
 
  uint32_t strawNumber, bufferOffset;
  string thisLine;
 
  std::string dataFile;
  std::string file;
 
  std::ifstream *inputFile;
 
  /**************************************************************/
  /*                Back Side Connector Tables                  */
  /**************************************************************/
 
    /*
     * Module Type 1, Back Side, Small and Large Triangles
     */
    ATH_MSG_INFO( "defineTables: 1BS-1BL " ); 
 
    dataFile = "TRT_SR1_1BS-1BL_map.dat";
    file = PathResolver::find_file (dataFile, "DATAPATH");
    inputFile = new std::ifstream( file.c_str() );
 
    if (!inputFile->is_open())
    {
      ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
    }
 
    while ( getline( *inputFile, thisLine ) )
    {
      istringstream parse( thisLine );
 
      parse >> strawNumber >> bufferOffset;
 
      m_1BS_1BL_map[bufferOffset] = strawNumber;
    }
 
 
    inputFile->close();
    delete inputFile;
 
    
    /*
     * Module Type 2, Back Side, Small Triangle and Large Quad
     */
    ATH_MSG_INFO( "defineTables: 2BS-2BL1 " ); 
 
    dataFile = "TRT_SR1_2BS-2BL1_map.dat";
    file = PathResolver::find_file (dataFile, "DATAPATH");
    inputFile = new std::ifstream( file.c_str() );
 
    if (!inputFile->is_open())
    {
      ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
    }
 
    while ( getline( *inputFile, thisLine ) )
    {
      istringstream parse( thisLine );
 
      parse >> strawNumber >> bufferOffset;
 
      m_2BS_2BL1_map[bufferOffset] = strawNumber;
    }
 
 
    inputFile->close();
    delete inputFile;
 
 
    /*
     * Back Side, Module Type 2 Large Triangle and Module Type 3 Large Quad
     */
    ATH_MSG_INFO( "defineTables: 2BL2-3BL1 " ); 
 
    dataFile = "TRT_SR1_2BL2-3BL1_map.dat";
    file = PathResolver::find_file (dataFile, "DATAPATH");
    inputFile = new std::ifstream( file.c_str() );
 
    if (!inputFile->is_open())
    {
      ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
    }
 
    while ( getline( *inputFile, thisLine ) )
    {
      istringstream parse( thisLine );
 
      parse >> strawNumber >> bufferOffset;
 
      m_2BL2_3BL1_map[bufferOffset] = strawNumber;
    }
 
    inputFile->close();
 
 
    /*
     * Back Side, Module Type 3 Large Triangle
     */
    ATH_MSG_INFO( "defineTables: 3BL2 " ); 
 
    dataFile = "TRT_SR1_3BL2_map.dat";
    file = PathResolver::find_file (dataFile, "DATAPATH");
    inputFile = new std::ifstream( file.c_str() );
 
    if (!inputFile->is_open())
      {
    ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
      }
 
    while ( getline( *inputFile, thisLine ) )
      {
    istringstream parse( thisLine );
 
    parse >> strawNumber >> bufferOffset;
 
    m_3BL2_map[bufferOffset] = strawNumber;
      }
 
    inputFile->close();
 
 
    /*
     * Back Side, Module Type 3 Small Triangle
     */
    ATH_MSG_INFO( "defineTables: 3BS " ); 
 
    dataFile = "TRT_SR1_3BS_map.dat";
    file = PathResolver::find_file (dataFile, "DATAPATH");
    inputFile = new std::ifstream( file.c_str() );
 
    if (!inputFile->is_open())
      {
    ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
      }
 
    while ( getline( *inputFile, thisLine ) )
      {
    istringstream parse( thisLine );
 
    parse >> strawNumber >> bufferOffset;
 
    m_3BS_map[bufferOffset] = strawNumber;
      }
 
    inputFile->close();
 
 
    /**************************************************************/
    /*               Front Side Connector Tables                  */
    /**************************************************************/
 
    /*
     * Module Type 1, Front Side, Small and Large Triangles
     */
    ATH_MSG_INFO( "defineTables: 1FS-1FL " ); 
 
    dataFile = "TRT_SR1_1FS-1FL_map.dat";
    file = PathResolver::find_file (dataFile, "DATAPATH");
    inputFile = new std::ifstream( file.c_str() );
 
    if (!inputFile->is_open())
      {
    ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
      }
 
    while ( getline( *inputFile, thisLine ) )
      {
    istringstream parse( thisLine );
 
    parse >> strawNumber >> bufferOffset;
 
    m_1FS_1FL_map[bufferOffset] = strawNumber;
      }
 
    inputFile->close();
 
 
    /*
     * Module Type 2, Front Side, Small Triangle and Large Trapezoid
     */
    ATH_MSG_INFO( "defineTables: 2FS-2FL1 " ); 
 
    dataFile = "TRT_SR1_2FS-2FL1_map.dat";
    file = PathResolver::find_file (dataFile, "DATAPATH");
    inputFile = new std::ifstream( file.c_str() );
 
    if (!inputFile->is_open())
      {
    ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
      }
 
    while ( getline( *inputFile, thisLine ) )
      {
    istringstream parse( thisLine );
 
    parse >> strawNumber >> bufferOffset;
 
    m_2FS_2FL1_map[bufferOffset] = strawNumber;
      }
 
    inputFile->close();
 
 
    /*
     * Front Side, Module Type 2 Large Triangle and Module Type 3 Large Quad
     */
    ATH_MSG_INFO( "defineTables: 2FL2-3FL1 " ); 
 
    dataFile = "TRT_SR1_2FL2-3FL1_map.dat";
    file = PathResolver::find_file (dataFile, "DATAPATH");
    inputFile = new std::ifstream( file.c_str() );
 
    if (!inputFile->is_open())
      {
    ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
      }
 
    while ( getline( *inputFile, thisLine ) )
      {
    istringstream parse( thisLine );
 
    parse >> strawNumber >> bufferOffset;
 
    m_2FL2_3FL1_map[bufferOffset] = strawNumber;
      }
 
    inputFile->close();
 
 
    /*
     * Front Side, Module Type 3 Large Triangle
     */
    ATH_MSG_INFO( "defineTables: 3FL2 " ); 
 
    dataFile = "TRT_SR1_3FL2_map.dat";
    file = PathResolver::find_file (dataFile, "DATAPATH");
    inputFile = new std::ifstream( file.c_str() );
 
    if (!inputFile->is_open())
      {
    ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
      }
 
    while ( getline( *inputFile, thisLine ) )
      {
    istringstream parse( thisLine );
 
    parse >> strawNumber >> bufferOffset;
 
    m_3FL2_map[bufferOffset] = strawNumber;
      }
 
    inputFile->close();
 
 
    /*
     * Front Side, Module Type 3 Small Triangle
     */
    ATH_MSG_INFO( "defineTables: 3FS " ); 
 
    dataFile = "TRT_SR1_3FS_map.dat";
    file = PathResolver::find_file (dataFile, "DATAPATH");
    inputFile = new std::ifstream( file.c_str() );
 
    if (!inputFile->is_open())
      {
    ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
      }
 
    while ( getline( *inputFile, thisLine ) )
      {
    istringstream parse( thisLine );
 
    parse >> strawNumber >> bufferOffset;
 
    m_3FS_map[bufferOffset] = strawNumber;
      }
 
    inputFile->close();
 
 
  /**************************************************************/
  /*               Global Cabling Specification                 */
  /**************************************************************/
 
  ATH_MSG_INFO( "defineTables: Global Spec " ); 
 
  dataFile = "TRT_SR1_Barrel_Cable_map.dat";
 
 
  file = PathResolver::find_file (dataFile, "DATAPATH");
  inputFile = new std::ifstream( file.c_str() );
 
  if (!inputFile->is_open())
  {
     ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Could not open file " << dataFile );
  }
 
  uint32_t srcId;
  std::string feId;
 
  while ( getline( *inputFile, thisLine ) )
  {
    if ( thisLine.length() == 0 )
      continue;
 
    string::size_type loc = thisLine.find( '#' );
    if ( loc != string::npos )
    {
      thisLine.replace( loc, thisLine.length(), 1, ' ' );
      
      loc = thisLine.find_first_not_of( " \t" );
      if ( loc == string::npos )
    continue;
    }
 
 
     istringstream parse( thisLine );
 
     GlobalCableMap_t *my_map = new GlobalCableMap_t;
 
     parse >> (hex) >> srcId >> (dec) >> my_map->Phi >> my_map->RODGroup >> my_map->FEid;
 
 
     //     int this_phi;   // set but not used
 
     if ( (srcId & 0xFF0000) == 0x310000 )
     {
    my_map->SubDet = 1;
    //  this_phi = my_map->Phi;  // set but not used
     }
     else if ( (srcId & 0xFF0000) == 0x320000 )
     {
    my_map->SubDet = -1;
    //  this_phi = -my_map->Phi;   // set but not used
     }
     else if ( (srcId & 0xFF0000) == 0x330000 )
     {
    my_map->SubDet = 2;
    //  this_phi = my_map->Phi;    // set but not used
     }
     else if ( (srcId & 0xFF0000) == 0x340000 )
     {
    my_map->SubDet = -2;
    //  this_phi = -my_map->Phi;  // set but not used
     }
     else {
    ATH_MSG_FATAL( "TRT_FillCablingData_SR1: Invalid source id " << (hex) << srcId << (dec) );
        my_map->SubDet = 0;
     }
 
 
     /*
      * my_phi is 
                    32 -  63 for +barrel
            64 -  95 for +end cap
           -32 - -63 for -barrel
           -64 - -95 for -end cap
     */
 
 
     //     int my_phi = my_map->Phi * my_map->SubDet;
     int my_phi = my_map->SubDet * 32 + my_map->Phi;
 
 
     std::vector<uint32_t>::iterator it = (m_phi_to_source[my_phi]).begin();
     while ( (it != (m_phi_to_source[my_phi]).end()) && (srcId != *it) )
    ++it;
 
     if ( it == m_phi_to_source[my_phi].end() )
     {
    (m_phi_to_source[my_phi]).push_back( srcId );
     }
 
 
     (m_CableMap[srcId]).push_back( my_map );
  }
 
  inputFile->close();
 
#ifdef NOTDEF
  int ptk_i;
  for ( ptk_i=1; ptk_i<=444; ptk_i++ )
  {
     std::map<int, int>::iterator map_it = m_1BS_1BL_map.find( ptk_i );
     //     if ( map_it != m_1BS_1BL_map.end() )
     // cout << "Offset " << map_it->first << " is Straw " << map_it->second << endl;
  }
#endif // NOTDEF
 
  GlobalCableMap::iterator pos;
  for ( pos=m_CableMap.begin(); pos != m_CableMap.end(); ++pos )
  {
     std::vector< GlobalCableMap_t *> GCM;
 
     GCM = pos->second;
 
     sort( GCM.begin(), GCM.end(), greater_RG_GCM );
 
     int ConnectorCount=-1;
     std::vector< GlobalCableMap_t *>::iterator it;
     for ( it=GCM.begin(); it != GCM.end(); ++it )
     {
    ConnectorCount++;
 
    GlobalCableMap_t *my_map = *it;
    std::map<int, int> con_map;
 
 
    if ( my_map->FEid == "1BS_1BL" )
       con_map = m_1BS_1BL_map;
    else if ( my_map->FEid == "2BS_2BL1" )
       con_map = m_2BS_2BL1_map;
    else if ( my_map->FEid == "2BL2_3BL1" )
       con_map = m_2BL2_3BL1_map;
    else if ( my_map->FEid == "3BL2" )
       con_map = m_3BL2_map;
    else if ( my_map->FEid == "3BS" )
       con_map = m_3BS_map;
    else if ( my_map->FEid == "1FS_1FL" )
       con_map = m_1FS_1FL_map;
    else if ( my_map->FEid == "2FS_2FL1" )
       con_map = m_2FS_2FL1_map;
    else if ( my_map->FEid == "2FL2_3FL1" )
       con_map = m_2FL2_3FL1_map;
    else if ( my_map->FEid == "3FL2" )
       con_map = m_3FL2_map;
    else if ( my_map->FEid == "3FS" )
       con_map = m_3FS_map;
    else if ( my_map->FEid == "ec_rod1l" )
       con_map = m_ec_1l_map;
    else if ( my_map->FEid == "ec_rod2l" )
       con_map = m_ec_2l_map;
    else if ( my_map->FEid == "ec_rod3l" )
       con_map = m_ec_3l_map;
    else if ( my_map->FEid == "ec_rod1r" )
       con_map = m_ec_1r_map;
    else if ( my_map->FEid == "ec_rod2r" )
       con_map = m_ec_2r_map;
    else if ( my_map->FEid == "ec_rod3r" )
       con_map = m_ec_3r_map;
 
 
    int i;
    Identifier NULLstrawID(0);
 
    if ( abs( my_map->SubDet ) == 1 )   // barrel
    {
      for ( i=1; i<=444; i++ )      // loop over buffer offset
      {
        std::map<int, int>::iterator map_it = con_map.find( i );
 
        if ( map_it == con_map.end() )
        {
          m_cabling->set_identifierForAllStraws( pos->first, 
                            i + ConnectorCount*444,
                            NULLstrawID );
          continue;
        }
 
        int BufferLocation = map_it->first + ConnectorCount*444;
        int Straw = map_it->second - 1;   // Offline starts at 0
 
        strawLayerId = 0;
        while ( (m_numberOfStrawsInLayers[strawLayerId] <= Straw) &&
            (m_numberOfStrawsInLayers[strawLayerId] != -1) )
        {
          strawLayerId++;
        }
 
        if ( m_numberOfStrawsInLayers[strawLayerId] == -1)
        {
          ATH_MSG_WARNING( "Invalid Straw in table: " << Straw ); 
          continue;
        }
 
 
        strawInLayerId = m_numberOfStrawsInLayers[strawLayerId] - Straw - 1;
 
        moduleId = -1;
        if ( strawLayerId < m_numberOfLayersA )
          moduleId = 0;
        else if ( strawLayerId < (m_numberOfLayersA + m_numberOfLayersB) )
        {
          moduleId = 1;
          strawLayerId = strawLayerId - m_numberOfLayersA;
        }
        else if ( strawLayerId < (m_numberOfLayersA + m_numberOfLayersB + m_numberOfLayersC) )
        {
          moduleId = 2;
          strawLayerId = strawLayerId - (m_numberOfLayersA + m_numberOfLayersB);
        }
 
 
 
        strawID = m_TRTHelper->straw_id( my_map->SubDet, my_map->Phi, 
                         moduleId, strawLayerId, 
                         strawInLayerId );
 
 
        m_cabling->set_identifierForAllStraws( pos->first, BufferLocation,
                          strawID );
 
 
        //     IdLayer = m_TRTHelper->layer_id( strawID );
        
        //     int result = m_TRTHelper->get_hash( strawID, hashId, &m_cntx );
 
        Identifier Lid = m_TRTHelper->layer_id( my_map->SubDet,
                            my_map->Phi, moduleId,
                            strawLayerId );
 
        int result = m_TRTHelper->get_hash( Lid, hashId, &m_cntx );
        if ( result != 0 )
        {
          ATH_MSG_WARNING( ">>>>>>>>>>> Get Hash FAILED! <<<<<<<<<<" );
          ATH_MSG_WARNING( "Straw     = " << Straw \
          << " array    = " << m_numberOfStrawsInLayers[strawLayerId] \
          << " SubDet    = " << my_map->SubDet \
          << " Phi      = " << my_map->Phi \
          << " Module   = " << moduleId \
          << " Layer    = " << strawLayerId \
          << " StrInLay = " << strawInLayerId );
        }  
 
 
        m_cabling->set_identifierHashForAllStraws( pos->first,
                              BufferLocation,
                              hashId );
      }
    }
    else       // Endcap
    {
      for ( i=0; i<1776; i++ )      // loop over buffer offset
      {
        std::map<int, int>::iterator map_it = con_map.find( i );
 
        if ( map_it == con_map.end() )
        {
          m_cabling->set_identifierForAllStraws( pos->first, i,
                            NULLstrawID );
          continue;
        }
 
        int BufferLocation = i;
        int Straw = map_it->second;   // Offline starts at 0
 
        strawLayerId = (Straw >> 8) & 0xff;
        strawInLayerId = Straw & 0xff;
 
        moduleId = strawLayerId / 8;
        if ( moduleId < 12 )           // A wheel?
        {
          moduleId = moduleId / 2;
          strawLayerId = strawLayerId % 16;
        }
        else                           // B wheel
        {
          moduleId = moduleId - 6;
          strawLayerId = strawLayerId % 8;
        }
 
 
        strawID = m_TRTHelper->straw_id( my_map->SubDet, my_map->Phi, 
                         moduleId, strawLayerId, 
                         strawInLayerId );
 
 
        m_cabling->set_identifierForAllStraws( pos->first, BufferLocation,
                          strawID );
 
 
        //     IdLayer = m_TRTHelper->layer_id( strawID );
        
        //     int result = m_TRTHelper->get_hash( strawID, hashId, &m_cntx );
 
        Identifier Lid = m_TRTHelper->layer_id( my_map->SubDet,
                            my_map->Phi, moduleId,
                            strawLayerId );
 
        int result = m_TRTHelper->get_hash( Lid, hashId, &m_cntx );
        if ( result != 0 )
        {
          ATH_MSG_WARNING( ">>>>>>>>>>> Get Hash FAILED! <<<<<<<<<<" );
 
              ATH_MSG_WARNING( "Straw     = " << Straw \
                    << " SubDet    = " << my_map->SubDet \
                    << " Phi      = " << my_map->Phi \
                    << " Module   = " << moduleId \
                    << " Layer    = " << strawLayerId \
                    << " StrInLay = " << strawInLayerId );
        }
 
 
        m_cabling->set_identifierHashForAllStraws( pos->first,
                                                       BufferLocation,
                                                       hashId );
      } // loop over bufferOffsets
    }   // Endcap
     }      // loop over GCM
  }         // loop over CableMap
 
 
 
  ATH_MSG_INFO( "Out of defineTables" ); 
 
  return;
}

detStore()

const ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< AlgTool > >::detStore ( ) const

inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

{ return m_detStore; }

evtStore()

ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< AlgTool > >::evtStore ( )

inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

{ return m_evtStore; }

extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase & ExtraDeps )

protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

fillCollID()

void TRT_FillCablingData_SR1::fillCollID	(	uint32_t	rob_id,
		std::vector< IdentifierHash > &	ids )

Definition at line 789 of file TRT_FillCablingData_SR1.cxx.

{
 
  IdentifierHash idHash;
  
  //  eformat::SubDetector det_id;   // set but not used
  //  int module;  // set but not used
 
  eformat::helper::SourceIdentifier id (rob_id);
  //  det_id = id.subdetector_id();  // set but not used
  //  module = (int) id.module_id();  // set but not used
 
 
  std::map<int, std::vector<GlobalCableMap_t *> >::iterator map_it = m_CableMap.find( rob_id );
  if ( map_it == m_CableMap.end() )
  {     
     ATH_MSG_FATAL( "fillCollID: Unable to get CableMap for rob_id " << std::hex << rob_id << std::dec );
     return;
  }
 
  std::vector< GlobalCableMap_t *> GCM = map_it->second;   
 
  sort( GCM.begin(), GCM.end(), greater_Phi_GCM );
 
  std::vector<GlobalCableMap_t *>::iterator it;
 
 
  it=GCM.begin();
  while ( it != GCM.end() )
  {
     GlobalCableMap_t *my_map = *it;
     int rings = 0;
     int phi = my_map->Phi;
     int barrelId = my_map->SubDet;
 
     if ( abs( barrelId ) == 1 )   // barrel?
     {
 
       bool done = !((my_map->SubDet == barrelId) && (my_map->Phi == phi));
       while ( !done && (it != GCM.end()) )
       {
 
 
     if ( (my_map->FEid == "1BS_1BL") || (my_map->FEid == "1FS_1FL") )
       rings |= 1;
     else if ( (my_map->FEid == "2BS_2BL1") || (my_map->FEid == "2FS_2FL1") )
       rings |= 2;
     else if ( (my_map->FEid == "2BL2_3BL1") || (my_map->FEid == "2FL2_3FL1") )
       rings |= 3;
     else if ( (my_map->FEid == "3BL2") || (my_map->FEid == "3BS") ||
           (my_map->FEid == "3FL2") || (my_map->FEid == "3FS") )
       rings |= 4;
 
     ++it;
    
     if ( it != GCM.end() )
     {
       my_map = *it;
       done = !((my_map->SubDet == barrelId) && (my_map->Phi == phi));
     }
 
       }
 
 
       int phiModule = phi;
 
       for (int ring = 0; ring < m_numberOfRings; ++ring)
       {
     if ( (ring == 0) && ((1<<ring) & rings) )  // Module Type 1
     {
       for (int layer = 0; layer < m_numberOfLayersA; ++layer) 
       {
          Identifier id = m_TRTHelper->layer_id(barrelId, phiModule, 
                            ring, layer);
 
          if (!m_TRTHelper->get_hash(id, idHash, &m_cntx)) 
          {
          ids.push_back(idHash);
          }
          else
         ATH_MSG_FATAL( " Unable to get hash for id " << m_TRTHelper->show_to_string(id) );
       }
     }
     else if ( (ring == 1) && ((1<<ring) & rings) )   // Module Type 2
     {
       for (int layer = 0; layer < m_numberOfLayersB; ++layer) 
       {
          Identifier id = m_TRTHelper->layer_id(barrelId, phiModule,
                            ring, layer);
 
          if (!m_TRTHelper->get_hash(id, idHash, &m_cntx))
          {
          ids.push_back(idHash);
          }
          else  
         ATH_MSG_FATAL( " Unable to get hash for id " << m_TRTHelper->show_to_string(id) );
       }
     }
     else if ( (ring == 2) && ((1<<ring) & rings) )   //  Module Type 3
     {
       for (int layer = 0; layer < m_numberOfLayersC; ++layer) 
       {
          Identifier id = m_TRTHelper->layer_id(barrelId, phiModule,
                            ring, layer);
 
          if (!m_TRTHelper->get_hash(id, idHash, &m_cntx)) 
          {
          ids.push_back(idHash);
          }
          else 
         ATH_MSG_FATAL( " Unable to get hash for id " << m_TRTHelper->show_to_string(id) );
 
       }
     }
       }
     }
     else   // End cap
     {
       int StartWheel=0;
       int EndWheel=0;
       int StartLayer=0;
       int EndLayer=0;
 
       int phiModule = phi;
 
       bool done = !((my_map->SubDet == barrelId) && (my_map->Phi == phi));
       while ( !done && (it != GCM.end()) )
       {
 
     if ( (my_map->FEid == "ec_rod1l") || 
          (my_map->FEid == "ec_rod1r") )
     {
       StartWheel = 0;
       EndWheel   = 4;
       StartLayer = 0;
       EndLayer   = 16;
     }
     else if ( (my_map->FEid == "ec_rod2l") || 
           (my_map->FEid == "ec_rod2r") )
     {
       StartWheel = 4;
       EndWheel   = 6;
       StartLayer = 0;
       EndLayer   = 16;
     }
     else    if ( (my_map->FEid == "ec_rod3l") || 
          (my_map->FEid == "ec_rod3r") )
     {
       StartWheel = 6;
       EndWheel   = 14;
       StartLayer = 0;
       EndLayer   = 8;
     }
     else
     {
       ATH_MSG_ERROR( "Invalid my_map->FEid.  This should not happen!" );
       return;
     }
 
     ++it;
    
     if ( it != GCM.end() )
     {
       my_map = *it;
       done = !((my_map->SubDet == barrelId) && (my_map->Phi == phi));
     }
 
       }
 
       
       for (int wheel = StartWheel; wheel < EndWheel; wheel++ ) 
       {
     for (int layer = StartLayer; layer < EndLayer; layer++ ) 
     {
       Identifier id = m_TRTHelper->layer_id( barrelId, phiModule, 
                          wheel, layer);
 
       if (!m_TRTHelper->get_hash(id, idHash, &m_cntx)) 
       {
         ids.push_back(idHash);
       }
       else
         ATH_MSG_FATAL( " Unable to get hash for id " << m_TRTHelper->show_to_string(id) );
     }  // loop over layer
       }    // loop over wheel
     }      // endcap
  }
 
  return;
}

fillData()

TRT_CablingData * TRT_FillCablingData_SR1::fillData

(

)

Definition at line 96 of file TRT_FillCablingData_SR1.cxx.

{
  return m_cabling;
}  

finalize()

StatusCode TRT_FillCablingData_SR1::finalize ( )

virtual

Definition at line 87 of file TRT_FillCablingData_SR1.cxx.

{
  delete m_cabling;
 
  StatusCode sc = AlgTool::finalize(); 
  return sc;
}

getRobID()

std::vector< uint32_t > TRT_FillCablingData_SR1::getRobID

(

Identifier

id

)

const

Definition at line 987 of file TRT_FillCablingData_SR1.cxx.

{
  std::vector<uint32_t> v;
 
 
  int id_barrel_ec = m_TRTHelper->barrel_ec(id);
  int id_phi_module = m_TRTHelper->phi_module(id);
  //  int id_layer = m_TRTHelper->layer_or_wheel(id);
 
  /*
   * It seems to be assumed that the ROD/ROB source IDs are aligned to
   * the phi sector numbering.  This is NOT the case for SR1, so we
   * need to fix it up.
   * In addition, for Module type 3 (ie, layer 2), we need to read out
   * the ROB with the 3S boards (number 1), as well as the ROB with
   * the rest of the sector.
   * We assume only one side here.
   */
 
  id_phi_module = id_phi_module + 32 * id_barrel_ec;
 
  const auto& it = m_phi_to_source.find (id_phi_module);
  if (it != m_phi_to_source.end()) {
    for (u_int32_t thisId : it->second) {
      eformat::helper::SourceIdentifier sid( thisId );
      v.push_back(sid.code());
    }
  }
 
  return v;
}

initialize()

StatusCode TRT_FillCablingData_SR1::initialize ( )

virtual

Definition at line 60 of file TRT_FillCablingData_SR1.cxx.

{
  ATH_MSG_INFO( "TRT_FillCablingData_SR1::initialize" ); 
 
 
  // Get the TRT Helper
  if (detStore()->retrieve(m_TRTHelper, "TRT_ID").isFailure()) 
  {
    ATH_MSG_FATAL( "Could not get TRT ID helper" );
    return StatusCode::FAILURE;
  }
  m_cntx = m_TRTHelper->straw_layer_context();
 
 
  m_cabling = new TRT_CablingData;
  
 
  defineParameters();
  defineTables();
  defineCollID();
  
  ATH_MSG_INFO( "TRT_FillCablingData_SR1::initializiation finished" );
 
  return StatusCode::SUCCESS;
}

inputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< AlgTool > >::inputHandles ( ) const

overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

interfaceID()

const InterfaceID & TRT_FillCablingData_SR1::interfaceID ( )

static

Definition at line 55 of file TRT_FillCablingData_SR1.cxx.

{ return IID_ITRT_FillCablingData_SR1; }

msg()

MsgStream & AthCommonMsg< AlgTool >::msg ( ) const

inlineinherited

Definition at line 24 of file AthCommonMsg.h.

                                {
    return this->msgStream();
  }

msgLvl()

bool AthCommonMsg< AlgTool >::msgLvl ( const MSG::Level lvl ) const

inlineinherited

Definition at line 30 of file AthCommonMsg.h.

                                               {
    return this->msgLevel(lvl);
  }

outputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< AlgTool > >::outputHandles ( ) const

overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

renounce()

std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > AthCommonDataStore< AthCommonMsg< AlgTool > >::renounce ( T & h )

inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

  {
    h.renounce();
    PBASE::renounce (h);
  }

renounceArray()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::renounceArray ( SG::VarHandleKeyArray & handlesArray )

inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

                                                          {
    handlesArray.renounce();
  }

sysInitialize()

virtual StatusCode AthCommonDataStore< AthCommonMsg< AlgTool > >::sysInitialize ( )

overridevirtualinherited

Perform system initialization for an algorithm.

We override this to declare all the elements of handle key arrays at the end of initialization. See comments on updateVHKA.

Reimplemented in asg::AsgMetadataTool, AthCheckedComponent< AthAlgTool >, AthCheckedComponent<::AthAlgTool >, and DerivationFramework::CfAthAlgTool.

sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< AlgTool > >::sysStart ( )

overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

updateVHKA()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::updateVHKA ( Gaudi::Details::PropertyBase & )

inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

                                               {
    // debug() << "updateVHKA for property " << p.name() << " " << p.toString() 
    //         << "  size: " << m_vhka.size() << endmsg;
    for (auto &a : m_vhka) {
      std::vector<SG::VarHandleKey*> keys = a->keys();
      for (auto k : keys) {
        k->setOwner(this);
      }
    }
  }

Member Data Documentation

m_1BS_1BL_map

std::map< int, int > TRT_FillCablingData_SR1::m_1BS_1BL_map

private

Definition at line 109 of file TRT_FillCablingData_SR1.h.

m_1FS_1FL_map

std::map< int, int > TRT_FillCablingData_SR1::m_1FS_1FL_map

private

Definition at line 115 of file TRT_FillCablingData_SR1.h.

m_2BL2_3BL1_map

std::map< int, int > TRT_FillCablingData_SR1::m_2BL2_3BL1_map

private

Definition at line 111 of file TRT_FillCablingData_SR1.h.

m_2BS_2BL1_map

std::map< int, int > TRT_FillCablingData_SR1::m_2BS_2BL1_map

private

Definition at line 110 of file TRT_FillCablingData_SR1.h.

m_2FL2_3FL1_map

std::map< int, int > TRT_FillCablingData_SR1::m_2FL2_3FL1_map

private

Definition at line 117 of file TRT_FillCablingData_SR1.h.

m_2FS_2FL1_map

std::map< int, int > TRT_FillCablingData_SR1::m_2FS_2FL1_map

private

Definition at line 116 of file TRT_FillCablingData_SR1.h.

m_3BL2_map

std::map< int, int > TRT_FillCablingData_SR1::m_3BL2_map

private

Definition at line 112 of file TRT_FillCablingData_SR1.h.

m_3BS_map

std::map< int, int > TRT_FillCablingData_SR1::m_3BS_map

private

Definition at line 113 of file TRT_FillCablingData_SR1.h.

m_3FL2_map

std::map< int, int > TRT_FillCablingData_SR1::m_3FL2_map

private

Definition at line 118 of file TRT_FillCablingData_SR1.h.

m_3FS_map

std::map< int, int > TRT_FillCablingData_SR1::m_3FS_map

private

Definition at line 119 of file TRT_FillCablingData_SR1.h.

m_CableMap

GlobalCableMap TRT_FillCablingData_SR1::m_CableMap

private

Definition at line 132 of file TRT_FillCablingData_SR1.h.

m_cabling

TRT_CablingData* TRT_FillCablingData_SR1::m_cabling = nullptr

private

Definition at line 71 of file TRT_FillCablingData_SR1.h.

m_cntx

IdContext TRT_FillCablingData_SR1::m_cntx

private

Definition at line 69 of file TRT_FillCablingData_SR1.h.

m_collID

std::vector<std::vector<IdentifierHash> *> TRT_FillCablingData_SR1::m_collID

private

Definition at line 103 of file TRT_FillCablingData_SR1.h.

m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< AlgTool > >::m_detStore

privateinherited

Pointer to StoreGate (detector store by default)

Definition at line 393 of file AthCommonDataStore.h.

m_ec_1l_map

std::map< int, int > TRT_FillCablingData_SR1::m_ec_1l_map

private

Definition at line 121 of file TRT_FillCablingData_SR1.h.

m_ec_1r_map

std::map< int, int > TRT_FillCablingData_SR1::m_ec_1r_map

private

Definition at line 125 of file TRT_FillCablingData_SR1.h.

m_ec_2l_map

std::map< int, int > TRT_FillCablingData_SR1::m_ec_2l_map

private

Definition at line 122 of file TRT_FillCablingData_SR1.h.

m_ec_2r_map

std::map< int, int > TRT_FillCablingData_SR1::m_ec_2r_map

private

Definition at line 126 of file TRT_FillCablingData_SR1.h.

m_ec_3l_map

std::map< int, int > TRT_FillCablingData_SR1::m_ec_3l_map

private

Definition at line 123 of file TRT_FillCablingData_SR1.h.

m_ec_3r_map

std::map< int, int > TRT_FillCablingData_SR1::m_ec_3r_map

private

Definition at line 127 of file TRT_FillCablingData_SR1.h.

m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< AlgTool > >::m_evtStore

privateinherited

Pointer to StoreGate (event store by default)

Definition at line 390 of file AthCommonDataStore.h.

m_identfierForAllStraws

std::vector< std::vector<Identifier> > TRT_FillCablingData_SR1::m_identfierForAllStraws

private

Definition at line 96 of file TRT_FillCablingData_SR1.h.

m_identfierHashForAllStraws

std::vector< std::vector<IdentifierHash> > TRT_FillCablingData_SR1::m_identfierHashForAllStraws

private

Definition at line 100 of file TRT_FillCablingData_SR1.h.

m_numberOfIdentifierSectors

int TRT_FillCablingData_SR1::m_numberOfIdentifierSectors = 0

private

Definition at line 85 of file TRT_FillCablingData_SR1.h.

m_numberOfLayersA

int TRT_FillCablingData_SR1::m_numberOfLayersA = 0

private

Definition at line 80 of file TRT_FillCablingData_SR1.h.

m_numberOfLayersB

int TRT_FillCablingData_SR1::m_numberOfLayersB = 0

private

Definition at line 81 of file TRT_FillCablingData_SR1.h.

m_numberOfLayersC

int TRT_FillCablingData_SR1::m_numberOfLayersC = 0

private

Definition at line 82 of file TRT_FillCablingData_SR1.h.

m_numberOfRings

int TRT_FillCablingData_SR1::m_numberOfRings = 0

private

Definition at line 79 of file TRT_FillCablingData_SR1.h.

m_numberOfStrawsInLayers

std::vector< int > TRT_FillCablingData_SR1::m_numberOfStrawsInLayers

private

Definition at line 106 of file TRT_FillCablingData_SR1.h.

m_phi_to_source

std::map<int, std::vector<uint32_t> > TRT_FillCablingData_SR1::m_phi_to_source

private

Definition at line 92 of file TRT_FillCablingData_SR1.h.

m_TRTHelper

const TRT_ID* TRT_FillCablingData_SR1::m_TRTHelper

private

Definition at line 68 of file TRT_FillCablingData_SR1.h.

m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< AlgTool > >::m_varHandleArraysDeclared

privateinherited

Definition at line 399 of file AthCommonDataStore.h.

m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< AlgTool > >::m_vhka

privateinherited

Definition at line 398 of file AthCommonDataStore.h.

---

The documentation for this class was generated from the following files:

• TRT_FillCablingData_SR1.h
• TRT_FillCablingData_SR1.cxx