ATLAS Offline Software
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CMAprogram.cxx
Go to the documentation of this file.
1/*
2 Copyright (C) 2002-2021 CERN for the benefit of the ATLAS collaboration
3*/
4
6
7#include <string>
8
10
11 // initialize multi-dimensional arrays:
12 std::fill_n(reinterpret_cast<uint32_t*>(m_program_bytes),
14 0xffffffff);
15
16 std::fill_n(reinterpret_cast<bool*>(m_threshold_registers),
18 true);
19}
20
21CMAprogram::CMAprogram(std::ifstream& file, bool NewCab) :
22 CMAprogram() {
23
24 m_isnewcab = NewCab;
27}
28
29CMAprogram::CMAprogram(std::istringstream& filestr, bool NewCab) :
30 CMAprogram() {
31
32 m_isnewcab = NewCab;
33 DBline data(filestr);
35}
36
38 uint32_t right_bit = 0x1;
39 std::string ignore;
40
41 ++data;
42
43 while (data) {
44 data("set_main_control") >> data.dbhex() >> m_main_control >> data.dbdec();
45 data("set_main_count") >> data.dbhex() >> m_main_count >> data.dbdec();
46 data("set_main_status") >> data.dbhex() >> m_main_status >> data.dbdec();
47
48 data("set_pipe_i0_mask0_in") >> data.dbhex() >> m_pipe_i0_mask0_in >> data.dbdec();
49 data("set_pipe_i0_edge") >> data.dbhex() >> m_pipe_i0_edge >> data.dbdec();
50 data("set_pipe_i0_ipb_regdepth") >> data.dbhex() >> m_pipe_i0_ipb_regdepth >> data.dbdec();
51 data("set_pipe_i0_shape") >> data.dbhex() >> m_pipe_i0_shape >> data.dbdec();
52 data("set_pipe_i0_mask0_readout") >> data.dbhex() >> m_pipe_i0_mask0_readout >> data.dbdec();
53 data("set_pipe_i0_mask0_trig") >> data.dbhex() >> m_pipe_i0_mask0_trig >> data.dbdec();
54
55 data("set_pipe_i1_mask0_in") >> data.dbhex() >> m_pipe_i1_mask0_in >> data.dbdec();
56 data("set_pipe_i1_edge") >> data.dbhex() >> m_pipe_i1_edge >> data.dbdec();
57 data("set_pipe_i1_ipb_regdepth") >> data.dbhex() >> m_pipe_i1_ipb_regdepth >> data.dbdec();
58 data("set_pipe_i1_shape") >> data.dbhex() >> m_pipe_i1_shape >> data.dbdec();
59 data("set_pipe_i1_mask0_readout") >> data.dbhex() >> m_pipe_i1_mask0_readout >> data.dbdec();
60 data("set_pipe_i1_mask0_trig") >> data.dbhex() >> m_pipe_i1_mask0_trig >> data.dbdec();
61
62 data("set_pipe_j0_mask0_in") >> data.dbhex() >> m_pipe_j0_mask0_in >> data.dbdec();
63 data("set_pipe_j0_edge") >> data.dbhex() >> m_pipe_j0_edge >> data.dbdec();
64 data("set_pipe_j0_ipb_regdepth") >> data.dbhex() >> m_pipe_j0_ipb_regdepth >> data.dbdec();
65 data("set_pipe_j0_shape") >> data.dbhex() >> m_pipe_j0_shape >> data.dbdec();
66 data("set_pipe_j0_mask0_readout") >> data.dbhex() >> m_pipe_j0_mask0_readout >> data.dbdec();
67 data("set_pipe_j0_mask0_trig") >> data.dbhex() >> m_pipe_j0_mask0_trig >> data.dbdec();
68
69 data("set_pipe_j1_mask0_in") >> data.dbhex() >> m_pipe_j1_mask0_in >> data.dbdec();
70 data("set_pipe_j1_edge") >> data.dbhex() >> m_pipe_j1_edge >> data.dbdec();
71 data("set_pipe_j1_ipb_regdepth") >> data.dbhex() >> m_pipe_j1_ipb_regdepth >> data.dbdec();
72 data("set_pipe_j1_shape") >> data.dbhex() >> m_pipe_j1_shape >> data.dbdec();
73 data("set_pipe_j1_mask0_readout") >> data.dbhex() >> m_pipe_j1_mask0_readout >> data.dbdec();
74 data("set_pipe_j1_mask0_trig") >> data.dbhex() >> m_pipe_j1_mask0_trig >> data.dbdec();
75
76 data("set_trig_thr0_maj_reg") >> data.dbhex() >> m_trig_thr0_maj_reg >> data.dbdec();
77 data("set_trig_thr0_mask_1_i_ge1_reg") >> data.dbhex() >> m_trig_thr0_mask_1_i_ge1_reg >> data.dbdec();
78 data("set_trig_thr0_mask_1_i_eq2_reg") >> data.dbhex() >> m_trig_thr0_mask_1_i_eq2_reg >> data.dbdec();
79 data("set_trig_thr0_mask_1_j_ge1_reg") >> data.dbhex() >> m_trig_thr0_mask_1_j_ge1_reg >> data.dbdec();
80 data("set_trig_thr0_mask_1_j_eq2_reg") >> data.dbhex() >> m_trig_thr0_mask_1_j_eq2_reg >> data.dbdec();
81
82 data("set_trig_thr1_maj_reg") >> data.dbhex() >> m_trig_thr1_maj_reg >> data.dbdec();
83 data("set_trig_thr1_mask_1_i_ge1_reg") >> data.dbhex() >> m_trig_thr1_mask_1_i_ge1_reg >> data.dbdec();
84 data("set_trig_thr1_mask_1_i_eq2_reg") >> data.dbhex() >> m_trig_thr1_mask_1_i_eq2_reg >> data.dbdec();
85 data("set_trig_thr1_mask_1_j_ge1_reg") >> data.dbhex() >> m_trig_thr1_mask_1_j_ge1_reg >> data.dbdec();
86 data("set_trig_thr1_mask_1_j_eq2_reg") >> data.dbhex() >> m_trig_thr1_mask_1_j_eq2_reg >> data.dbdec();
87
88 data("set_trig_thr2_maj_reg") >> data.dbhex() >> m_trig_thr2_maj_reg >> data.dbdec();
89 data("set_trig_thr2_mask_1_i_ge1_reg") >> data.dbhex() >> m_trig_thr2_mask_1_i_ge1_reg >> data.dbdec();
90 data("set_trig_thr2_mask_1_i_eq2_reg") >> data.dbhex() >> m_trig_thr2_mask_1_i_eq2_reg >> data.dbdec();
91 data("set_trig_thr2_mask_1_j_ge1_reg") >> data.dbhex() >> m_trig_thr2_mask_1_j_ge1_reg >> data.dbdec();
92 data("set_trig_thr2_mask_1_j_eq2_reg") >> data.dbhex() >> m_trig_thr2_mask_1_j_eq2_reg >> data.dbdec();
93
94 data("set_trig_declu_i0_clsize") >> data.dbhex() >> m_trig_declu_i0_clsize >> data.dbdec();
95 data("set_trig_declu_i1_clsize") >> data.dbhex() >> m_trig_declu_i1_clsize >> data.dbdec();
96 data("set_trig_declu_j0_clsize") >> data.dbhex() >> m_trig_declu_j0_clsize >> data.dbdec();
97 data("set_trig_declu_j1_clsize") >> data.dbhex() >> m_trig_declu_j1_clsize >> data.dbdec();
98
99 data("set_trig_prp_i_eta_reg") >> data.dbhex() >> m_trig_local_direc_i >> data.dbdec();
100 data("set_trig_prp_j_eta_reg") >> data.dbhex() >> m_trig_local_direc_j >> data.dbdec();
101 data("set_trig_shape_k_reg") >> data.dbhex() >> m_trig_shape_k_reg >> data.dbdec();
102 data("set_trig_ovl_sx_reg") >> data.dbhex() >> m_overlap2 >> data.dbdec();
103 data("set_trig_ovl_dx_reg") >> data.dbhex() >> m_overlap1 >> data.dbdec();
104 data("set_trig_edge_reg") >> data.dbhex() >> m_trig_edge_reg >> data.dbdec();
105
106 data("set_readout_buffer_empty") >> data.dbhex() >> m_readout_buffer_empty >> data.dbdec();
107 data("set_readout_buffer_almost_empty") >> data.dbhex() >> m_readout_buffer_almost_empty >> data.dbdec();
108 data("set_readout_buffer_half_full") >> data.dbhex() >> m_readout_buffer_half_full >> data.dbdec();
109 data("set_readout_buffer_almost_full") >> data.dbhex() >> m_readout_buffer_almost_full >> data.dbdec();
110 data("set_readout_buffer_full") >> data.dbhex() >> m_readout_buffer_full >> data.dbdec();
111 data("set_readout_buffer_latreg") >> data.dbhex() >> m_readout_buffer_latreg >> data.dbdec();
112 data("set_readout_buffer_hireg") >> data.dbhex() >> m_readout_buffer_hireg >> data.dbdec();
113 data("set_readout_buffer_lowreg") >> data.dbhex() >> m_readout_buffer_lowreg >> data.dbdec();
114 data("set_readout_serializer_dslink") >> data.dbhex() >> m_readout_serializer_dslink >> data.dbdec();
115
116 data("set_l1c_pre") >> data.dbhex() >> m_l1c_pre >> data.dbdec();
117 data("set_bcc_pre") >> data.dbhex() >> m_bcc_pre >> data.dbdec();
118
119 // start reading the threshold registers
120
121 uint64_t twowords;
122
123 if (m_isnewcab) {
124 // case RPC_CondCabling
125 if (data("set_trig_thr0_thr_reg_00")) {
126 for (int i = 0; i < 32; ++i) {
127 ignore.clear();
128 if (i == 0)
129 data >> data.dbhex() >> twowords >> data.dbdec();
130 else
131 data >> ignore >> data.dbhex() >> twowords >> data.dbdec();
132
133 union Data {
134 uint64_t bits;
135 uint32_t words[2];
136 } dataun{};
137
138 dataun.bits = twowords;
139
140 m_program_bytes[0][i][0] = dataun.words[0];
141 m_program_bytes[0][i][1] = dataun.words[1];
142
143 for (int bit = 0; bit < 32; ++bit) {
144 m_threshold_registers[0][i][bit] = ((dataun.words[0] >> bit) & right_bit) != 0;
145 m_threshold_registers[0][i][bit + 32] = ((dataun.words[1] >> bit) & right_bit) != 0;
146 }
147 if (i < 31) ++data;
148 }
149 }
150
151 if (data("set_trig_thr1_thr_reg_00")) {
152 ignore.clear();
153 for (int i = 0; i < 32; ++i) {
154 if (i == 0)
155 data >> data.dbhex() >> twowords >> data.dbdec();
156 else
157 data >> ignore >> data.dbhex() >> twowords >> data.dbdec();
158
159 union Data {
160 uint64_t bits;
161 uint32_t words[2];
162 } dataun{};
163
164 dataun.bits = twowords;
165
166 m_program_bytes[1][i][0] = dataun.words[0];
167 m_program_bytes[1][i][1] = dataun.words[1];
168
169 for (int bit = 0; bit < 32; ++bit) {
170 m_threshold_registers[1][i][bit] = ((dataun.words[0] >> bit) & right_bit) != 0;
171 m_threshold_registers[1][i][bit + 32] = ((dataun.words[1] >> bit) & right_bit) != 0;
172 }
173
174 if (i < 31) ++data;
175 }
176 }
177
178 if (data("set_trig_thr2_thr_reg_00")) {
179 ignore.clear();
180 for (int i = 0; i < 32; ++i) {
181 if (i == 0)
182 data >> data.dbhex() >> twowords >> data.dbdec();
183 else
184 data >> ignore >> data.dbhex() >> twowords >> data.dbdec();
185
186 union Data {
187 uint64_t bits;
188 uint32_t words[2];
189 } dataun{};
190
191 dataun.bits = twowords;
192
193 m_program_bytes[2][i][0] = dataun.words[0];
194 m_program_bytes[2][i][1] = dataun.words[1];
195
196 for (int bit = 0; bit < 32; ++bit) {
197 m_threshold_registers[2][i][bit] = ((dataun.words[0] >> bit) & right_bit) != 0;
198 m_threshold_registers[2][i][bit + 32] = ((dataun.words[1] >> bit) & right_bit) != 0;
199 }
200
201 if (i < 31) ++data;
202 }
203 }
204 ++data;
205 }
206
207 else {
208 // case RPCcablingSim
209 // old format ///////////////////////////////////////////////////////
210 for (int i = 1; i <= 3; ++i) {
211 int majority;
212
213 if (data("th #", i) && data("maj_reg") >> majority) {
214 int th = 0;
215 int ch = 0;
216 uint32_t first_word = 0;
217 uint32_t second_word = 0;
218
219 ++data;
220
221 while (data("th") >> th >> "thr_reg" >> ch >> data.dbhex() >> first_word >> second_word >> data.dbdec()) {
222 if (th < 1) return false;
223 m_program_bytes[th - 1][ch][1] = first_word;
224 m_program_bytes[th - 1][ch][0] = second_word;
225
226 for (int bit = 0; bit < 32; ++bit) {
227 m_threshold_registers[th - 1][ch][bit] = ((second_word >> bit) & right_bit) != 0;
228 m_threshold_registers[th - 1][ch][bit + 32] = ((first_word >> bit) & right_bit) != 0;
229 }
230
231 ++data;
232 }
233 }
234 }
235
236 data("overlap1") >> data.dbhex() >> m_overlap1 >> data.dbdec();
237 data("overlap2") >> data.dbhex() >> m_overlap2 >> data.dbdec();
238 data("trig_local_direc_i") >> m_trig_local_direc_i;
239 data("trig_local_direc_j") >> m_trig_local_direc_j;
240 data("trig_k_readout") >> m_trig_k_readout;
241
242 ++data;
243 }
244 }
245
246 return true;
247}
248
250 if (th >= 3) return;
251 for (int ch = 0; ch < CMAparameters::pivot_channels; ++ch) {
252 m_program_bytes[th][ch][1] = 0xffffffff;
253 m_program_bytes[th][ch][0] = 0xffffffff;
254
255 for (int bit = 0; bit < 32; ++bit) {
256 m_threshold_registers[th][ch][bit] = true;
257 m_threshold_registers[th][ch][bit + 32] = true;
258 }
259 }
260}
261
262void CMAprogram::copy_over(int source, int dest) {
263 if (source >= 3 || dest >= 3) return;
264 if (source == dest) return;
265
266 for (int ch = 0; ch < CMAparameters::pivot_channels; ++ch) {
267 m_program_bytes[dest][ch][1] = m_program_bytes[source][ch][1];
268 m_program_bytes[dest][ch][0] = m_program_bytes[source][ch][0];
269
270 for (int bit = 0; bit < 32; ++bit) {
271 m_threshold_registers[dest][ch][bit] = m_threshold_registers[source][ch][bit];
272 m_threshold_registers[dest][ch][bit + 32] = m_threshold_registers[source][ch][bit + 32];
273 }
274 }
275}
276
277bool CMAprogram::hasProgrammed(unsigned int th) const {
278 if (th >= 3) return false;
279 for (int ch = 0; ch < CMAparameters::pivot_channels; ++ch) {
280 if (m_program_bytes[th][ch][1] != 0x0) return true;
281 if (m_program_bytes[th][ch][0] != 0x0) return true;
282 }
283 return false;
284}
285
286std::ostream& operator<<(std::ostream& stream, const CMAprogram& program) {
287 unsigned int no_coincidence = 183;
288
289 for (int piv = CMAparameters::pivot_channels - 1; piv >= 0; --piv) {
290 for (int con = 0; con < CMAparameters::confirm_channels; ++con) {
291 for (int th = 2; th >= 0; --th) {
292 if (program.m_threshold_registers[th][piv][con]) {
293 stream << th + 1;
294 break;
295 }
296 if (th == 0) stream << (char)no_coincidence;
297 }
298 }
299 stream << std::endl;
300 }
301 return stream;
302}
@ Data
Definition BaseObject.h:11
std::ostream & operator<<(std::ostream &stream, const CMAprogram &program)
char data[hepevt_bytes_allocation_ATLAS]
Definition HepEvt.cxx:11
static constexpr int confirm_channels
static constexpr int pivot_channels
uint64_t m_pipe_j0_shape
Definition CMAprogram.h:50
uint64_t m_trig_thr2_mask_1_j_ge1_reg
Definition CMAprogram.h:72
bool m_threshold_registers[3][CMAparameters::pivot_channels][CMAparameters::confirm_channels]
Definition CMAprogram.h:106
uint32_t m_pipe_i1_shape
Definition CMAprogram.h:41
uint64_t m_trig_thr1_mask_1_j_eq2_reg
Definition CMAprogram.h:68
uint32_t m_pipe_i0_mask0_trig
Definition CMAprogram.h:37
uint8_t m_main_count
Definition CMAprogram.h:18
uint32_t m_pipe_i0_mask0_in
Definition CMAprogram.h:33
uint32_t m_trig_local_direc_j
Definition CMAprogram.h:27
uint32_t m_trig_shape_k_reg
Definition CMAprogram.h:76
uint32_t m_pipe_i0_shape
Definition CMAprogram.h:35
uint64_t m_pipe_j1_mask0_readout
Definition CMAprogram.h:57
uint32_t m_pipe_i1_mask0_in
Definition CMAprogram.h:39
uint32_t m_trig_thr0_mask_1_i_ge1_reg
Definition CMAprogram.h:60
uint64_t m_pipe_j1_edge
Definition CMAprogram.h:55
uint32_t m_pipe_i0_mask0_readout
Definition CMAprogram.h:36
void copy_over(int, int)
uint8_t m_trig_declu_i1_clsize
Definition CMAprogram.h:87
uint16_t m_bcc_pre
Definition CMAprogram.h:104
uint64_t m_pipe_j0_mask0_in
Definition CMAprogram.h:48
uint8_t m_readout_buffer_hireg
Definition CMAprogram.h:99
uint32_t m_main_control
Definition CMAprogram.h:21
uint32_t m_pipe_i1_mask0_readout
Definition CMAprogram.h:42
uint8_t m_trig_declu_j1_clsize
Definition CMAprogram.h:89
uint64_t m_trig_thr0_mask_1_j_eq2_reg
Definition CMAprogram.h:63
uint8_t m_trig_thr0_maj_reg
Definition CMAprogram.h:94
uint16_t m_readout_buffer_empty
Definition CMAprogram.h:80
uint32_t m_trig_k_readout
Definition CMAprogram.h:28
uint32_t m_pipe_j1_ipb_regdepth
Definition CMAprogram.h:46
uint8_t m_trig_declu_j0_clsize
Definition CMAprogram.h:88
uint32_t m_overlap1
Definition CMAprogram.h:23
uint16_t m_pipe_i1_ipb_regdepth
Definition CMAprogram.h:31
uint8_t m_readout_buffer_lowreg
Definition CMAprogram.h:100
uint64_t m_pipe_j0_edge
Definition CMAprogram.h:49
uint32_t m_pipe_i1_edge
Definition CMAprogram.h:40
uint8_t m_trig_declu_i0_clsize
Definition CMAprogram.h:86
uint16_t m_l1c_pre
Definition CMAprogram.h:103
uint8_t m_trig_thr2_maj_reg
Definition CMAprogram.h:96
bool m_status
Definition CMAprogram.h:16
uint16_t m_readout_buffer_full
Definition CMAprogram.h:84
void open_threshold(int th)
uint32_t m_pipe_j0_ipb_regdepth
Definition CMAprogram.h:45
uint16_t m_readout_buffer_almost_empty
Definition CMAprogram.h:81
uint16_t m_readout_buffer_almost_full
Definition CMAprogram.h:83
bool hasProgrammed(unsigned int th) const
uint64_t m_trig_thr1_mask_1_j_ge1_reg
Definition CMAprogram.h:67
bool read_v02(DBline &)
uint8_t m_main_status
Definition CMAprogram.h:19
uint64_t m_pipe_j1_mask0_trig
Definition CMAprogram.h:58
uint32_t m_overlap2
Definition CMAprogram.h:24
uint32_t m_trig_thr1_mask_1_i_eq2_reg
Definition CMAprogram.h:66
uint32_t m_trig_thr2_mask_1_i_eq2_reg
Definition CMAprogram.h:71
uint32_t m_pipe_i1_mask0_trig
Definition CMAprogram.h:43
uint32_t m_pipe_i0_edge
Definition CMAprogram.h:34
uint64_t m_pipe_j0_mask0_readout
Definition CMAprogram.h:51
uint64_t m_trig_thr0_mask_1_j_ge1_reg
Definition CMAprogram.h:62
uint64_t m_trig_edge_reg
Definition CMAprogram.h:75
uint32_t m_trig_local_direc_i
Definition CMAprogram.h:26
uint32_t m_trig_thr2_mask_1_i_ge1_reg
Definition CMAprogram.h:70
uint64_t m_pipe_j1_shape
Definition CMAprogram.h:56
bool m_isnewcab
Definition CMAprogram.h:15
uint64_t m_trig_thr2_mask_1_j_eq2_reg
Definition CMAprogram.h:73
uint32_t m_trig_thr1_mask_1_i_ge1_reg
Definition CMAprogram.h:65
uint8_t m_readout_buffer_latreg
Definition CMAprogram.h:98
uint64_t m_pipe_j1_mask0_in
Definition CMAprogram.h:54
uint16_t m_pipe_i0_ipb_regdepth
Definition CMAprogram.h:30
uint16_t m_readout_buffer_half_full
Definition CMAprogram.h:82
uint8_t m_trig_thr1_maj_reg
Definition CMAprogram.h:95
uint32_t m_trig_thr0_mask_1_i_eq2_reg
Definition CMAprogram.h:61
uint8_t m_readout_serializer_dslink
Definition CMAprogram.h:101
uint64_t m_pipe_j0_mask0_trig
Definition CMAprogram.h:52
uint32_t m_program_bytes[3][CMAparameters::pivot_channels][2]
Definition CMAprogram.h:107
TFile * file