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125 if (
data(
"set_trig_thr0_thr_reg_00")) {
126 for (
int i = 0;
i < 32; ++
i) {
138 dataun.bits = twowords;
143 for (
int bit = 0; bit < 32; ++bit) {
151 if (
data(
"set_trig_thr1_thr_reg_00")) {
153 for (
int i = 0;
i < 32; ++
i) {
164 dataun.bits = twowords;
169 for (
int bit = 0; bit < 32; ++bit) {
178 if (
data(
"set_trig_thr2_thr_reg_00")) {
180 for (
int i = 0;
i < 32; ++
i) {
191 dataun.bits = twowords;
196 for (
int bit = 0; bit < 32; ++bit) {
210 for (
int i = 1;
i <= 3; ++
i) {
213 if (
data(
"th #",
i) &&
data(
"maj_reg") >> majority) {
221 while (
data(
"th") >>
th >>
"thr_reg" >>
ch >>
data.dbhex() >> first_word >> second_word >>
data.dbdec()) {
222 if (
th < 1)
return false;
226 for (
int bit = 0; bit < 32; ++bit) {
255 for (
int bit = 0; bit < 32; ++bit) {
270 for (
int bit = 0; bit < 32; ++bit) {
278 if (
th >= 3)
return false;
287 unsigned int no_coincidence = 183;
291 for (
int th = 2;
th >= 0; --
th) {
uint8_t m_trig_thr1_maj_reg
uint16_t m_readout_buffer_almost_full
uint32_t m_program_bytes[3][CMAparameters::pivot_channels][2]
char data[hepevt_bytes_allocation_ATLAS]
uint32_t m_trig_thr1_mask_1_i_eq2_reg
uint8_t m_trig_declu_i1_clsize
uint64_t m_trig_thr1_mask_1_j_ge1_reg
uint16_t m_readout_buffer_almost_empty
uint8_t m_readout_serializer_dslink
uint64_t m_pipe_j0_mask0_trig
uint64_t m_pipe_j0_mask0_in
uint64_t m_pipe_j0_mask0_readout
uint64_t m_pipe_j1_mask0_in
uint32_t m_trig_thr0_mask_1_i_ge1_reg
uint32_t m_trig_local_direc_j
uint8_t m_trig_declu_i0_clsize
uint64_t m_trig_thr2_mask_1_j_eq2_reg
void open_threshold(int th)
uint32_t m_trig_thr2_mask_1_i_eq2_reg
uint8_t m_trig_thr2_maj_reg
uint8_t m_trig_declu_j0_clsize
uint32_t m_pipe_i0_mask0_readout
uint16_t m_pipe_i0_ipb_regdepth
static constexpr int confirm_channels
uint64_t m_trig_thr0_mask_1_j_ge1_reg
uint32_t m_pipe_i0_mask0_trig
bool hasProgrammed(unsigned int th) const
uint32_t m_trig_thr2_mask_1_i_ge1_reg
uint32_t m_trig_shape_k_reg
uint32_t m_pipe_i1_mask0_trig
uint32_t m_trig_k_readout
uint64_t m_trig_thr2_mask_1_j_ge1_reg
uint8_t m_trig_thr0_maj_reg
std::ostream & operator<<(std::ostream &stream, const CMAprogram &program)
uint64_t m_pipe_j1_mask0_readout
uint8_t m_trig_declu_j1_clsize
bool m_threshold_registers[3][CMAparameters::pivot_channels][CMAparameters::confirm_channels]
uint32_t m_trig_local_direc_i
uint64_t m_trig_thr1_mask_1_j_eq2_reg
uint8_t m_readout_buffer_latreg
uint16_t m_pipe_i1_ipb_regdepth
uint64_t m_pipe_j1_mask0_trig
uint32_t m_pipe_i1_mask0_in
uint32_t m_pipe_i1_mask0_readout
uint32_t m_pipe_j1_ipb_regdepth
uint32_t m_pipe_j0_ipb_regdepth
static constexpr int pivot_channels
uint16_t m_readout_buffer_half_full
uint64_t m_trig_thr0_mask_1_j_eq2_reg
uint32_t m_trig_thr0_mask_1_i_eq2_reg
uint16_t m_readout_buffer_full
uint32_t m_pipe_i0_mask0_in
uint32_t m_trig_thr1_mask_1_i_ge1_reg
uint16_t m_readout_buffer_empty
uint8_t m_readout_buffer_lowreg
uint8_t m_readout_buffer_hireg