#include <jFEXsumETAlgo.h>

Inheritance diagram for LVL1::jFEXsumETAlgo:

Collaboration diagram for LVL1::jFEXsumETAlgo:

Public Member Functions
	jFEXsumETAlgo (const std::string &type, const std::string &name, const IInterface *parent)
	Constructors.
virtual StatusCode	initialize () override
	standard Athena-Algorithm method
virtual StatusCode	reset () override
virtual	~jFEXsumETAlgo ()
	Destructor.
virtual StatusCode	safetyTest () override
virtual void	setup (int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width]) override
virtual void	setup (int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width]) override
virtual int	getTTowerET (unsigned int TTID=0) override
virtual void	buildBarrelSumET () override
virtual void	buildFWDSumET () override
virtual std::tuple< int, bool >	getETlowerEta (uint bin) override
virtual std::tuple< int, bool >	getETupperEta (uint bin) override
virtual void	setFPGAEnergy (std::unordered_map< int, std::vector< int > > et_map) override
ServiceHandle< StoreGateSvc > &	evtStore ()
	The standard `StoreGateSvc` (event store) Returns (kind of) a pointer to the `StoreGateSvc`.
const ServiceHandle< StoreGateSvc > &	detStore () const
	The standard `StoreGateSvc/DetectorStore` Returns (kind of) a pointer to the `StoreGateSvc`.
virtual StatusCode	sysInitialize () override
	Perform system initialization for an algorithm.
virtual StatusCode	sysStart () override
	Handle START transition.
virtual std::vector< Gaudi::DataHandle * >	inputHandles () const override
	Return this algorithm's input handles.
virtual std::vector< Gaudi::DataHandle * >	outputHandles () const override
	Return this algorithm's output handles.
Gaudi::Details::PropertyBase &	declareProperty (Gaudi::Property< T, V, H > &t)
void	updateVHKA (Gaudi::Details::PropertyBase &)
MsgStream &	msg () const
bool	msgLvl (const MSG::Level lvl) const

Static Public Member Functions
static const InterfaceID &	interfaceID ()

Protected Member Functions
void	renounceArray (SG::VarHandleKeyArray &handlesArray)
	remove all handles from I/O resolution
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void >	renounce (T &h)
void	extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
	Add StoreName to extra input/output deps as needed.

Private Types
typedef ServiceHandle< StoreGateSvc >	StoreGateSvc_t

Private Member Functions
bool	getTTowerSat (unsigned int TTID)
Gaudi::Details::PropertyBase &	declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
	specialization for handling Gaudi::Property<SG::VarHandleKey>

Private Attributes
SG::ReadHandleKey< LVL1::jTowerContainer >	m_jTowerContainerKey {this, "MyjTowers", "jTowerContainer", "Input container for jTowers"}
SG::ReadHandle< jTowerContainer >	m_jTowerContainer
std::vector< std::vector< int > >	m_FPGA
std::vector< std::vector< int > >	m_FPGA_phi02
std::vector< std::vector< int > >	m_FPGA_fcal
std::vector< int >	m_SumET
std::vector< bool >	m_SumETSat
int	m_SumlowEta =0
bool	m_SumlowEtaSat =0
int	m_SumhighEta =0
bool	m_SumhighEtaSat =0
std::unordered_map< int, std::vector< int > >	m_map_Etvalues
StoreGateSvc_t	m_evtStore
	Pointer to StoreGate (event store by default)
StoreGateSvc_t	m_detStore
	Pointer to StoreGate (detector store by default)
std::vector< SG::VarHandleKeyArray * >	m_vhka
bool	m_varHandleArraysDeclared

Detailed Description

Definition at line 30 of file jFEXsumETAlgo.h.

Member Typedef Documentation

◆ StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< AlgTool > >::StoreGateSvc_t

privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

◆ jFEXsumETAlgo()

LVL1::jFEXsumETAlgo::jFEXsumETAlgo	(	const std::string &	type,
		const std::string &	name,
		const IInterface *	parent )

Constructors.

Definition at line 22 of file jFEXsumETAlgo.cxx.

                                                                                                      : AthAlgTool(type, name, parent) {
    declareInterface<IjFEXsumETAlgo>(this);
}

◆ ~jFEXsumETAlgo()

LVL1::jFEXsumETAlgo::~jFEXsumETAlgo ( )

virtual

Destructor.

Definition at line 27 of file jFEXsumETAlgo.cxx.

27 {

28}

Member Function Documentation

◆ buildBarrelSumET()

void LVL1::jFEXsumETAlgo::buildBarrelSumET ( )

overridevirtual

Implements LVL1::IjFEXsumETAlgo.

Definition at line 91 of file jFEXsumETAlgo.cxx.

{
    ATH_MSG_DEBUG("---------------- jFEXsumETAlgo::buildBarrelSumET ----------------");
    
    m_SumET.clear();
    m_SumET.resize(8,0);
    m_SumETSat.clear();
    m_SumETSat.resize(8,0);
    
    for(uint iphi=0;iphi<m_FPGA.size();iphi++){
        for(uint ieta=0;ieta<m_FPGA[iphi].size();ieta++){
            m_SumET[ieta]+=getTTowerET(m_FPGA[iphi][ieta]);
            m_SumETSat[ieta] = m_SumETSat[ieta] || getTTowerSat(m_FPGA[iphi][ieta]);
        }
    }
 
}

◆ buildFWDSumET()

void LVL1::jFEXsumETAlgo::buildFWDSumET ( )

overridevirtual

Implements LVL1::IjFEXsumETAlgo.

Definition at line 110 of file jFEXsumETAlgo.cxx.

{
    ATH_MSG_DEBUG("---------------- jFEXsumETAlgo::buildFWDSumET ----------------");
    
    m_SumET.clear();
    m_SumET.resize(14,0);
    m_SumETSat.clear();
    m_SumETSat.resize(14,0);
    
    // ECal with resolution of 0.1x0.1
    for(uint iphi=0;iphi<m_FPGA.size();iphi++){
        for(uint ieta=0;ieta<m_FPGA[iphi].size();ieta++){
            m_SumET[ieta]+=getTTowerET(m_FPGA[iphi][ieta]);
            m_SumETSat.at(ieta) = m_SumETSat.at(ieta) || getTTowerSat(m_FPGA[iphi][ieta]);
        }
    }
 
    // ECal with resolution of 0.2x0.2
    for(uint iphi=0;iphi<m_FPGA_phi02.size();iphi++){
        for(uint ieta=0;ieta<m_FPGA_phi02[iphi].size();ieta++){
            m_SumET[ieta+9]+=getTTowerET(m_FPGA_phi02[iphi][ieta]);
            m_SumETSat.at(ieta+9) = m_SumETSat.at(ieta+9) || getTTowerSat(m_FPGA_phi02[iphi][ieta]);
        }
    }    
    
    // Fcal
    for(uint iphi=0;iphi<m_FPGA_fcal.size();iphi++){
        for(uint ieta=0;ieta<m_FPGA_fcal[iphi].size();ieta++){
            m_SumET[13]+=getTTowerET(m_FPGA_fcal[iphi][ieta]); //All FCAL is considered one slice due to the non-aligment of the FCal layers
            m_SumETSat.at(13) = m_SumETSat.at(13) || getTTowerSat(m_FPGA_fcal[iphi][ieta]);
        }
    }       
 
}

◆ declareGaudiProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< AlgTool > >::declareGaudiProperty	(	Gaudi::Property< T, V, H > &	hndl,
		const SG::VarHandleKeyType &	)

inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

  {
    return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
                                                       hndl.value(), 
                                                       hndl.documentation());
 
  }

◆ declareProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< AlgTool > >::declareProperty ( Gaudi::Property< T, V, H > & t )

inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

                                                                     {
    typedef typename SG::HandleClassifier<T>::type htype;
    return AthCommonDataStore<PBASE>::declareGaudiProperty(t, htype());
  }

◆ detStore()

const ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< AlgTool > >::detStore ( ) const

inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

95{ return m_detStore; }

AthCommonDataStore< AthCommonMsg< AlgTool > >::m_detStore

StoreGateSvc_t m_detStore

Definition AthCommonDataStore.h:393

◆ evtStore()

ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< AlgTool > >::evtStore ( )

inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

85{ return m_evtStore; }

AthCommonDataStore< AthCommonMsg< AlgTool > >::m_evtStore

StoreGateSvc_t m_evtStore

Definition AthCommonDataStore.h:390

◆ extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase & ExtraDeps )

protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

◆ getETlowerEta()

std::tuple< int, bool > LVL1::jFEXsumETAlgo::getETlowerEta ( uint bin )

overridevirtual

Implements LVL1::IjFEXsumETAlgo.

Definition at line 145 of file jFEXsumETAlgo.cxx.

{
    uint max = m_SumET.size() > (bin + 1) ? bin : m_SumET.size();
    m_SumlowEta = 0;
    m_SumlowEtaSat = 0;
    for(uint ieta=0;ieta<max;ieta++){
        m_SumlowEta+=m_SumET.at(ieta);
        m_SumlowEtaSat = m_SumlowEtaSat || m_SumETSat.at(ieta);
    }
    return {m_SumlowEta,m_SumlowEtaSat};
}

◆ getETupperEta()

std::tuple< int, bool > LVL1::jFEXsumETAlgo::getETupperEta ( uint bin )

overridevirtual

Implements LVL1::IjFEXsumETAlgo.

Definition at line 159 of file jFEXsumETAlgo.cxx.

{
    uint min = m_SumET.size() > (bin + 1) ? bin : m_SumET.size();
    m_SumhighEta = 0;
    m_SumhighEtaSat = 0;
    for(uint ieta=min;ieta<m_SumET.size();ieta++){
        m_SumhighEta+=m_SumET.at(ieta);
        m_SumhighEtaSat = m_SumhighEtaSat || m_SumETSat.at(ieta);
    }
    return {m_SumhighEta,m_SumhighEtaSat};
}

◆ getTTowerET()

int LVL1::jFEXsumETAlgo::getTTowerET ( unsigned int TTID = 0 )

overridevirtual

Implements LVL1::IjFEXsumETAlgo.

Definition at line 183 of file jFEXsumETAlgo.cxx.

                                                     {
    if(TTID == 0) {
        return 0;
    } 
    
    auto itr = m_map_Etvalues.find(TTID);
    if( itr == m_map_Etvalues.end()) {
        return 0;
    }
    
    return (itr->second).at(1);
}

◆ getTTowerSat()

bool LVL1::jFEXsumETAlgo::getTTowerSat ( unsigned int TTID )

private

Definition at line 173 of file jFEXsumETAlgo.cxx.

                                                       {
    if(TTID == 0) {
        return false;
    } 
    
    const LVL1::jTower * tmpTower = m_jTowerContainer->findTower(TTID);
    return tmpTower->getTowerSat();
}

◆ initialize()

StatusCode LVL1::jFEXsumETAlgo::initialize ( )

overridevirtual

standard Athena-Algorithm method

Definition at line 30 of file jFEXsumETAlgo.cxx.

                                         {
    ATH_CHECK(m_jTowerContainerKey.initialize());
    return StatusCode::SUCCESS;
}

◆ inputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< AlgTool > >::inputHandles ( ) const

overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ interfaceID()

const InterfaceID & LVL1::IjFEXsumETAlgo::interfaceID ( )

inlinestaticinherited

Definition at line 40 of file IjFEXsumETAlgo.h.

{
    return IID_IjFEXsumETAlgo;
}

◆ msg()

MsgStream & AthCommonMsg< AlgTool >::msg ( ) const

inlineinherited

Definition at line 24 of file AthCommonMsg.h.

                                {
    return this->msgStream();
  }

◆ msgLvl()

bool AthCommonMsg< AlgTool >::msgLvl ( const MSG::Level lvl ) const

inlineinherited

Definition at line 30 of file AthCommonMsg.h.

                                               {
    return this->msgLevel(lvl);
  }

◆ outputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< AlgTool > >::outputHandles ( ) const

overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ renounce()

std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > AthCommonDataStore< AthCommonMsg< AlgTool > >::renounce ( T & h )

inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

  {
    h.renounce();
    PBASE::renounce (h);
  }

◆ renounceArray()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::renounceArray ( SG::VarHandleKeyArray & handlesArray )

inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

                                                          {
    handlesArray.renounce();
  }

◆ reset()

StatusCode LVL1::jFEXsumETAlgo::reset ( )

overridevirtual

Implements LVL1::IjFEXsumETAlgo.

Definition at line 47 of file jFEXsumETAlgo.cxx.

                                    {
    m_FPGA.clear();
    m_FPGA_phi02.clear();
    m_FPGA_fcal.clear();
    return StatusCode::SUCCESS;
}

◆ safetyTest()

StatusCode LVL1::jFEXsumETAlgo::safetyTest ( )

overridevirtual

Implements LVL1::IjFEXsumETAlgo.

Definition at line 36 of file jFEXsumETAlgo.cxx.

                                         {
 
    m_jTowerContainer = SG::ReadHandle<jTowerContainer>(m_jTowerContainerKey);
    if(! m_jTowerContainer.isValid()) {
        ATH_MSG_ERROR("Could not retrieve  jTowerContainer " << m_jTowerContainerKey.key());
        return StatusCode::FAILURE;
    }
 
    return StatusCode::SUCCESS;
}

◆ setFPGAEnergy()

void LVL1::jFEXsumETAlgo::setFPGAEnergy ( std::unordered_map< int, std::vector< int > > et_map )

overridevirtual

Implements LVL1::IjFEXsumETAlgo.

Definition at line 197 of file jFEXsumETAlgo.cxx.

                                                                                 {
    m_map_Etvalues=std::move(et_map);
}

◆ setup() [1/2]

void LVL1::jFEXsumETAlgo::setup ( int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width] )

overridevirtual

Implements LVL1::IjFEXsumETAlgo.

Definition at line 55 of file jFEXsumETAlgo.cxx.

                                                                                                                        {
 
    ATH_MSG_DEBUG("---------------- jFEXsumETAlgo::setup ----------------");
    m_FPGA.resize(FEXAlgoSpaceDefs::jFEX_algoSpace_height);
    for(int iphi=0;iphi<FEXAlgoSpaceDefs::jFEX_algoSpace_height;iphi++){
        for(int ieta=8;ieta<16;ieta++){
            m_FPGA[iphi].push_back(FPGA[iphi][ieta]);
        }
    }
}

◆ setup() [2/2]

void LVL1::jFEXsumETAlgo::setup ( int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width] )

overridevirtual

Implements LVL1::IjFEXsumETAlgo.

Definition at line 66 of file jFEXsumETAlgo.cxx.

                                                                                                                        {
 
    ATH_MSG_DEBUG("---------------- jFEXsumETAlgo::setup ----------------");
    m_FPGA.resize(FEXAlgoSpaceDefs::jFEX_algoSpace_height);
    for(int iphi=0;iphi<FEXAlgoSpaceDefs::jFEX_algoSpace_height;iphi++){
        for(int ieta=8;ieta<17;ieta++){
            m_FPGA[iphi].push_back(FPGA[iphi][ieta]);
        }
    }
    m_FPGA_phi02.resize(16);
    for(int iphi=0;iphi<16;iphi++){
        for(int ieta=17;ieta<21;ieta++){
            m_FPGA_phi02[iphi].push_back(FPGA[iphi][ieta]);
        }
    }    
    m_FPGA_fcal.resize(8);
    for(int iphi=0;iphi<8;iphi++){
        for(int ieta=21;ieta<FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width;ieta++){
            m_FPGA_fcal[iphi].push_back(FPGA[iphi][ieta]);
        }
    }    
    
}

◆ sysInitialize()

virtual StatusCode AthCommonDataStore< AthCommonMsg< AlgTool > >::sysInitialize ( )

overridevirtualinherited

Perform system initialization for an algorithm.

We override this to declare all the elements of handle key arrays at the end of initialization. See comments on updateVHKA.

Reimplemented in asg::AsgMetadataTool, AthCheckedComponent< AthAlgTool >, AthCheckedComponent<::AthAlgTool >, and DerivationFramework::CfAthAlgTool.

◆ sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< AlgTool > >::sysStart ( )

overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

◆ updateVHKA()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::updateVHKA ( Gaudi::Details::PropertyBase & )

inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

                                               {
    // debug() << "updateVHKA for property " << p.name() << " " << p.toString() 
    //         << "  size: " << m_vhka.size() << endmsg;
    for (auto &a : m_vhka) {
      std::vector<SG::VarHandleKey*> keys = a->keys();
      for (auto k : keys) {
        k->setOwner(this);
      }
    }
  }

Member Data Documentation

◆ m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< AlgTool > >::m_detStore

privateinherited

Pointer to StoreGate (detector store by default)

Definition at line 393 of file AthCommonDataStore.h.

◆ m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< AlgTool > >::m_evtStore

privateinherited

Pointer to StoreGate (event store by default)

Definition at line 390 of file AthCommonDataStore.h.

◆ m_FPGA

std::vector<std::vector<int> > LVL1::jFEXsumETAlgo::m_FPGA

private

Definition at line 59 of file jFEXsumETAlgo.h.

◆ m_FPGA_fcal

std::vector<std::vector<int> > LVL1::jFEXsumETAlgo::m_FPGA_fcal

private

Definition at line 61 of file jFEXsumETAlgo.h.

◆ m_FPGA_phi02

std::vector<std::vector<int> > LVL1::jFEXsumETAlgo::m_FPGA_phi02

private

Definition at line 60 of file jFEXsumETAlgo.h.

◆ m_jTowerContainer

SG::ReadHandle<jTowerContainer> LVL1::jFEXsumETAlgo::m_jTowerContainer

private

Definition at line 58 of file jFEXsumETAlgo.h.

◆ m_jTowerContainerKey

SG::ReadHandleKey<LVL1::jTowerContainer> LVL1::jFEXsumETAlgo::m_jTowerContainerKey {this, "MyjTowers", "jTowerContainer", "Input container for jTowers"}

private

Definition at line 57 of file jFEXsumETAlgo.h.

57{this, "MyjTowers", "jTowerContainer", "Input container for jTowers"};

◆ m_map_Etvalues

std::unordered_map<int,std::vector<int> > LVL1::jFEXsumETAlgo::m_map_Etvalues

private

Definition at line 69 of file jFEXsumETAlgo.h.

◆ m_SumET

std::vector<int> LVL1::jFEXsumETAlgo::m_SumET

private

Definition at line 62 of file jFEXsumETAlgo.h.

◆ m_SumETSat

std::vector<bool> LVL1::jFEXsumETAlgo::m_SumETSat

private

Definition at line 63 of file jFEXsumETAlgo.h.

◆ m_SumhighEta

int LVL1::jFEXsumETAlgo::m_SumhighEta =0

private

Definition at line 66 of file jFEXsumETAlgo.h.

◆ m_SumhighEtaSat

bool LVL1::jFEXsumETAlgo::m_SumhighEtaSat =0

private

Definition at line 67 of file jFEXsumETAlgo.h.

◆ m_SumlowEta

int LVL1::jFEXsumETAlgo::m_SumlowEta =0

private

Definition at line 64 of file jFEXsumETAlgo.h.

◆ m_SumlowEtaSat

bool LVL1::jFEXsumETAlgo::m_SumlowEtaSat =0

private

Definition at line 65 of file jFEXsumETAlgo.h.

◆ m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< AlgTool > >::m_varHandleArraysDeclared

privateinherited

Definition at line 399 of file AthCommonDataStore.h.

◆ m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< AlgTool > >::m_vhka

privateinherited

Definition at line 398 of file AthCommonDataStore.h.

The documentation for this class was generated from the following files:

Public Member Functions

Static Public Member Functions

Protected Member Functions

Private Types

Private Member Functions

Private Attributes

Detailed Description

Member Typedef Documentation

◆ StoreGateSvc_t

Constructor & Destructor Documentation

◆ jFEXsumETAlgo()

◆ ~jFEXsumETAlgo()

Member Function Documentation

◆ buildBarrelSumET()

◆ buildFWDSumET()

◆ declareGaudiProperty()

◆ declareProperty()

◆ detStore()

◆ evtStore()

◆ extraDeps_update_handler()

◆ getETlowerEta()

◆ getETupperEta()

◆ getTTowerET()

◆ getTTowerSat()

◆ initialize()

◆ inputHandles()

◆ interfaceID()

◆ msg()

◆ msgLvl()

◆ outputHandles()

◆ renounce()

◆ renounceArray()

◆ reset()

◆ safetyTest()

◆ setFPGAEnergy()

◆ setup() [1/2]

◆ setup() [2/2]

◆ sysInitialize()

◆ sysStart()

◆ updateVHKA()

Member Data Documentation

◆ m_detStore

◆ m_evtStore

◆ m_FPGA

◆ m_FPGA_fcal

◆ m_FPGA_phi02

◆ m_jTowerContainer

◆ m_jTowerContainerKey

◆ m_map_Etvalues

◆ m_SumET

◆ m_SumETSat

◆ m_SumhighEta

◆ m_SumhighEtaSat

◆ m_SumlowEta

◆ m_SumlowEtaSat

◆ m_varHandleArraysDeclared

◆ m_vhka