Provide tower-FPGA mapping Load information stored in a .csv file and provide the IDs of all towers in an FPGA or an eFEX module. More...

#include <eFEXFPGATowerIdProvider.h>

Inheritance diagram for LVL1::eFEXFPGATowerIdProvider:

Collaboration diagram for LVL1::eFEXFPGATowerIdProvider:

Classes
struct	towerinfo
	Sturcture defines the id, eta and phi position of a tower. More...

Public Member Functions
	eFEXFPGATowerIdProvider (const std::string &type, const std::string &name, const IInterface *parent)
	Constructor.
	~eFEXFPGATowerIdProvider ()
	Destructor.
StatusCode	initialize ()
	initialize the tool
StatusCode	setAddress (const std::string &inputaddress)
	set path to the csv file and load
StatusCode	getRankedTowerIDinFPGA (int eFEXID, int FPGAID, int(&towerlist)[10][6]) const
	obtain ordered tower IDs in an FPGA
StatusCode	getRankedTowerIDineFEX (int eFEXID, int(&towerlist)[10][18]) const
	obtain ordered tower IDs in an eFEX
bool	ifhaveinputfile () const
ServiceHandle< StoreGateSvc > &	evtStore ()
	The standard `StoreGateSvc` (event store) Returns (kind of) a pointer to the `StoreGateSvc`.
const ServiceHandle< StoreGateSvc > &	detStore () const
	The standard `StoreGateSvc/DetectorStore` Returns (kind of) a pointer to the `StoreGateSvc`.
virtual StatusCode	sysInitialize () override
	Perform system initialization for an algorithm.
virtual StatusCode	sysStart () override
	Handle START transition.
virtual std::vector< Gaudi::DataHandle * >	inputHandles () const override
	Return this algorithm's input handles.
virtual std::vector< Gaudi::DataHandle * >	outputHandles () const override
	Return this algorithm's output handles.
Gaudi::Details::PropertyBase &	declareProperty (Gaudi::Property< T, V, H > &t)
void	updateVHKA (Gaudi::Details::PropertyBase &)
MsgStream &	msg () const
bool	msgLvl (const MSG::Level lvl) const

Static Public Member Functions
static const InterfaceID &	interfaceID ()

Protected Member Functions
void	renounceArray (SG::VarHandleKeyArray &handlesArray)
	remove all handles from I/O resolution
std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void >	renounce (T &h)
void	extraDeps_update_handler (Gaudi::Details::PropertyBase &ExtraDeps)
	Add StoreName to extra input/output deps as needed.

Private Types
typedef ServiceHandle< StoreGateSvc >	StoreGateSvc_t

Private Member Functions
StatusCode	rankTowerinFPGA (int FPGAindex)
	rank the tower ids in an FPGA This function determines the order of towers in an FPGA.
bool	hasFPGA (int) const
	check if an FPGA exists in the csv file
StatusCode	loadcsv ()
	load the mapping info in the csv file
int	getFPGAIndex (int eFEXid, int FPGAid) const
	determine the index of an FPGA
Gaudi::Details::PropertyBase &	declareGaudiProperty (Gaudi::Property< T, V, H > &hndl, const SG::VarHandleKeyType &)
	specialization for handling Gaudi::Property<SG::VarHandleKey>

Private Attributes
bool	m_hascsvfile {false}
	if the csv file is valid
std::vector< std::unique_ptr< std::vector< int > > >	m_towerrankingcache
	Ordered tower Ids in each FPGAs. The index is the index of the FPGA.
std::unordered_map< int, std::unique_ptr< std::vector< towerinfo > > >	m_alltowers
	Unordered tower Ids in each FPGAs. The index is the index of the FPGA.
std::string	m_csvaddress
	path to the input csv file
StoreGateSvc_t	m_evtStore
	Pointer to StoreGate (event store by default)
StoreGateSvc_t	m_detStore
	Pointer to StoreGate (detector store by default)
std::vector< SG::VarHandleKeyArray * >	m_vhka
bool	m_varHandleArraysDeclared

Detailed Description

Provide tower-FPGA mapping Load information stored in a .csv file and provide the IDs of all towers in an FPGA or an eFEX module.

Definition at line 35 of file eFEXFPGATowerIdProvider.h.

Member Typedef Documentation

◆ StoreGateSvc_t

typedef ServiceHandle<StoreGateSvc> AthCommonDataStore< AthCommonMsg< AlgTool > >::StoreGateSvc_t

privateinherited

Definition at line 388 of file AthCommonDataStore.h.

Constructor & Destructor Documentation

◆ eFEXFPGATowerIdProvider()

LVL1::eFEXFPGATowerIdProvider::eFEXFPGATowerIdProvider	(	const std::string &	type,
		const std::string &	name,
		const IInterface *	parent )

Constructor.

Definition at line 12 of file eFEXFPGATowerIdProvider.cxx.

                                                                                                                          :
  AthAlgTool(type, name, parent)
{
  declareInterface<eFEXFPGATowerIdProvider>(this);
}

◆ ~eFEXFPGATowerIdProvider()

LVL1::eFEXFPGATowerIdProvider::~eFEXFPGATowerIdProvider ( )

Destructor.

Definition at line 27 of file eFEXFPGATowerIdProvider.cxx.

{
  m_alltowers.clear();
  m_towerrankingcache.clear();
}

Member Function Documentation

◆ declareGaudiProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< AlgTool > >::declareGaudiProperty	(	Gaudi::Property< T, V, H > &	hndl,
		const SG::VarHandleKeyType &	)

inlineprivateinherited

specialization for handling Gaudi::Property<SG::VarHandleKey>

Definition at line 156 of file AthCommonDataStore.h.

  {
    return *AthCommonDataStore<PBASE>::declareProperty(hndl.name(),
                                                       hndl.value(), 
                                                       hndl.documentation());
 
  }

◆ declareProperty()

Gaudi::Details::PropertyBase & AthCommonDataStore< AthCommonMsg< AlgTool > >::declareProperty ( Gaudi::Property< T, V, H > & t )

inlineinherited

Definition at line 145 of file AthCommonDataStore.h.

                                                                     {
    typedef typename SG::HandleClassifier<T>::type htype;
    return AthCommonDataStore<PBASE>::declareGaudiProperty(t, htype());
  }

◆ detStore()

const ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< AlgTool > >::detStore ( ) const

inlineinherited

The standard StoreGateSvc/DetectorStore Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 95 of file AthCommonDataStore.h.

95{ return m_detStore; }

AthCommonDataStore< AthCommonMsg< AlgTool > >::m_detStore

StoreGateSvc_t m_detStore

Definition AthCommonDataStore.h:393

◆ evtStore()

ServiceHandle< StoreGateSvc > & AthCommonDataStore< AthCommonMsg< AlgTool > >::evtStore ( )

inlineinherited

The standard StoreGateSvc (event store) Returns (kind of) a pointer to the StoreGateSvc.

Definition at line 85 of file AthCommonDataStore.h.

85{ return m_evtStore; }

AthCommonDataStore< AthCommonMsg< AlgTool > >::m_evtStore

StoreGateSvc_t m_evtStore

Definition AthCommonDataStore.h:390

◆ extraDeps_update_handler()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::extraDeps_update_handler ( Gaudi::Details::PropertyBase & ExtraDeps )

protectedinherited

Add StoreName to extra input/output deps as needed.

use the logic of the VarHandleKey to parse the DataObjID keys supplied via the ExtraInputs and ExtraOuputs Properties to add the StoreName if it's not explicitly given

◆ getFPGAIndex()

int LVL1::eFEXFPGATowerIdProvider::getFPGAIndex	(	int	eFEXid,
		int	FPGAid ) const

private

determine the index of an FPGA

Parameters

eFEXID	Id of the eFEX module (0-23)
FPGAID	Id of the FPGA (0-3)

Returns: FPGA index

Definition at line 283 of file eFEXFPGATowerIdProvider.cxx.

{
  // check the range of eFEX ID and FPGA ID
  // There is supposed to be 24 eFex and each eFex
  // contains 4 FPGAs.
  if (FPGAid < 0 or FPGAid > 3) {
    return -1;
  }
  if (eFEXid < 0 or FPGAid > 23) {
    return -1;
  }
  return eFEXid * 4 + FPGAid;
}

◆ getRankedTowerIDineFEX()

StatusCode LVL1::eFEXFPGATowerIdProvider::getRankedTowerIDineFEX	(	int	eFEXID,
		int(&)	towerlist[10][18] ) const

obtain ordered tower IDs in an eFEX

Parameters

eFEXID	Id of the eFEX module (0-23)
towerlist	a 1018 (phieta) array to store the output tower Ids

Returns: status code

Definition at line 84 of file eFEXFPGATowerIdProvider.cxx.

                                                                                                        {
  int FPGA0index{ getFPGAIndex(eFEXID, 0) };
  int FPGA1index{ getFPGAIndex(eFEXID, 1) };
  int FPGA2index{ getFPGAIndex(eFEXID, 2) };
  int FPGA3index{ getFPGAIndex(eFEXID, 3) };
  //
  auto is_negative = [](int val){return val<0;};
  if (std::ranges::any_of(std::initializer_list{FPGA0index, FPGA1index, FPGA2index, FPGA3index}, is_negative)){
    return StatusCode::FAILURE;
  }
  
 
  if (!m_towerrankingcache[FPGA0index] || !m_towerrankingcache[FPGA1index] ||
      !m_towerrankingcache[FPGA2index] || !m_towerrankingcache[FPGA3index]) {
    for (int i{ 0 }; i < 10; i++) {
      for (int j{ 0 }; j < 18; j++) {
        towerlist[i][j] = 0;
      }
    }
    ATH_MSG_ERROR("FPGA mapping info missing.");
    return StatusCode::FAILURE; 
  }
 
  // FPGA0
  int vectorindex{ 0 };
  for (int i{ 0 }; i < 10; i++) {
    for (int j{ 0 }; j < 6; j++) {
      towerlist[i][j] = (*m_towerrankingcache[FPGA0index]).at(vectorindex++);
    }
  }
 
  // fPGA1 skipping overlap with FPGA0 and FPGA2
  vectorindex = 0;
  for (int i{ 0 }; i < 10; i++) {
    vectorindex += 2;
    for (int j{ 2 }; j < 4; j++) {
      towerlist[i][j + 4] = (*m_towerrankingcache[FPGA1index]).at(vectorindex++);
    }
    vectorindex += 2;
  }
  
  // FPGA2
  vectorindex = 0;
  for (int i{ 0 }; i < 10; i++) {
    for (int j{ 0 }; j < 6; j++) {
      towerlist[i][j + 8] = (*m_towerrankingcache[FPGA2index]).at(vectorindex++);
    }
  }
 
  // FPGA4 skipping overlap with FPGA2
  vectorindex = 0;
  for (int i{ 0 }; i < 10; i++) {
    vectorindex += 2;
    for (int j{ 2 }; j < 6; j++) {
      towerlist[i][j + 12] = (*m_towerrankingcache[FPGA3index]).at(vectorindex++);
    }
  }
  return StatusCode::SUCCESS;
}

◆ getRankedTowerIDinFPGA()

StatusCode LVL1::eFEXFPGATowerIdProvider::getRankedTowerIDinFPGA	(	int	eFEXID,
		int	FPGAID,
		int(&)	towerlist[10][6] ) const

obtain ordered tower IDs in an FPGA

Parameters

eFEXID	Id of the eFEX module (0-23)
FPGAID	Id of the FPGA (0-3)
towerlist	a 106 (phieta) array to store the output tower Ids

Returns: status code

Definition at line 59 of file eFEXFPGATowerIdProvider.cxx.

                                                                                                                   {
  int FPGAindex{ getFPGAIndex(eFEXID, FPGAID) };
  if (FPGAindex<0) return StatusCode::FAILURE;
  if (m_towerrankingcache[FPGAindex]) {
    // obtain the tower order from cache
    int vectorindex{ 0 };
    for (int i{ 0 }; i < 10; i++) {
      for (int j{ 0 }; j < 6; j++) {
        towerlist[i][j] = (*m_towerrankingcache[FPGAindex]).at(vectorindex++);
      }
    }
  }
  // set tower ids to 0 if the information about the FPGA stored in the .csv file is damaged
  else {
    for (int i{ 0 }; i < 10; i++) {
      for (int j{ 0 }; j < 6; j++) {
        towerlist[i][j] = 0;
      }
    }
    ATH_MSG_ERROR("FPGA mapping info missing.");
    return StatusCode::FAILURE;
  }
  return StatusCode::SUCCESS;
}

◆ hasFPGA()

bool LVL1::eFEXFPGATowerIdProvider::hasFPGA ( int FPGAindex ) const

private

check if an FPGA exists in the csv file

Definition at line 190 of file eFEXFPGATowerIdProvider.cxx.

{
  // check if the info of a speific FPGA has been loaded or not
  return m_alltowers.contains(FPGAindex);
}

◆ ifhaveinputfile()

bool LVL1::eFEXFPGATowerIdProvider::ifhaveinputfile ( ) const

Definition at line 144 of file eFEXFPGATowerIdProvider.cxx.

                                                        {
  return m_hascsvfile;
}

◆ initialize()

StatusCode LVL1::eFEXFPGATowerIdProvider::initialize ( )

initialize the tool

Definition at line 18 of file eFEXFPGATowerIdProvider.cxx.

{
  std::string csvpath =  PathResolver::find_file("tower_fpga_efex_map.csv", "DATAPATH");
  if (setAddress(csvpath) == StatusCode::FAILURE) {
    ATH_MSG_WARNING("tower_fpga_efex_map.csv missing or invalid. Swiching to hard-coded mapping.");
  };
  return StatusCode::SUCCESS;   
}

◆ inputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< AlgTool > >::inputHandles ( ) const

overridevirtualinherited

Return this algorithm's input handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ interfaceID()

const InterfaceID & LVL1::eFEXFPGATowerIdProvider::interfaceID ( )

inlinestatic

Definition at line 48 of file eFEXFPGATowerIdProvider.h.

48{ return IID_IIeFEXFPGATowerIdProvider; };

LVL1::IID_IIeFEXFPGATowerIdProvider

static const InterfaceID IID_IIeFEXFPGATowerIdProvider("LVL1::eFEXFPGATowerIdProvider", 1, 0)

◆ loadcsv()

StatusCode LVL1::eFEXFPGATowerIdProvider::loadcsv ( )

private

load the mapping info in the csv file

Definition at line 196 of file eFEXFPGATowerIdProvider.cxx.

{
  // read the .csv file line by line
  std::string eachline;
  std::ifstream myfile(m_csvaddress);
  if (myfile.is_open()) {
    while (std::getline(myfile, eachline)) {
      // ignore text after #
      std::string::size_type ipos = eachline.find("#");
      if (ipos!=std::string::npos) eachline.resize(ipos);
 
      // prevent reading lines with only white spaces
      if (std::all_of(eachline.begin(), eachline.end(), ::isspace)) {
        continue;
      }
 
      // ignore lines with non-digit characters
      auto validchar = [](char ch) { return (::isspace(ch) || ::isdigit(ch) || ch==','); };
      if (!std::all_of(eachline.begin(), eachline.end(), validchar)) {
        ATH_MSG_INFO("invalid line '" << eachline << "'");
        break;
      }
 
      // split lines in the .csv file by comma
      std::stringstream eachline_stream(eachline);
      std::vector<int> numbers_in_eachline;
      while (eachline_stream.good()) {
        std::string tem_string;
        std::getline(eachline_stream, tem_string, ',');
        try {
          numbers_in_eachline.push_back(std::stoi(tem_string));
        }
        catch (...) {
          ATH_MSG_WARNING( "Invalid input in tower_fpga_efex_map.csv." );
           return StatusCode::FAILURE;
        }
      }
 
      // There is supposed to be 5 numbers in each line: 
      // eFEX ID, FPGA ID, eTower ID, eta, phi
      if (numbers_in_eachline.size() != 5) {
        ATH_MSG_WARNING( "Invalid input in tower_fpga_efex_map.csv." );
        return StatusCode::FAILURE;
      }
      // eta and phi are supposed to be positive
      if (numbers_in_eachline[3] < 0 || numbers_in_eachline[4] < 0) {
        ATH_MSG_WARNING("Invalid input in tower_fpga_efex_map.csv.");
        // return scodefail
        return StatusCode::FAILURE;
      }
      int FPGAindex = getFPGAIndex(numbers_in_eachline[0], numbers_in_eachline[1]);
      // check the range of eFEX ID and FPGA ID
      if (FPGAindex == -1) {
        ATH_MSG_WARNING("Invalid input in tower_fpga_efex_map.csv.");
        return StatusCode::FAILURE;
      }
      towerinfo tem_towerinfo;
      tem_towerinfo.eTowerID = numbers_in_eachline[2];
      // determine the sign of eta using the tower id
      // positive: 200000-299999, 400000-499999, 600000-699999
      // negative: 100000-199999, 300000-399999, 500000-599999
      int etasign;
      if (int(numbers_in_eachline[2] / 100000) % 2 != 0) {
        etasign = -1;
      } else {
        etasign = 1;
      }
      tem_towerinfo.eTowerEta = etasign * (numbers_in_eachline[3]);
      tem_towerinfo.eTowerPhi = numbers_in_eachline[4];
 
      // Create a key for the FPGA if the the FPGA key is not 
      // avaliable in the m_alltowers hash table object yet.
      // Otherwise append the tower to the existing bucket.
      if (hasFPGA(FPGAindex)) {
        m_alltowers[FPGAindex]->push_back(tem_towerinfo);
      } else {
        m_alltowers[FPGAindex] = std::make_unique<std::vector<towerinfo>>(std::vector{tem_towerinfo});
      }
    }
    myfile.close();
  } else {
    ATH_MSG_WARNING("Unable to open share/tower_fpga_efex_map.csv.");
    return StatusCode::FAILURE;
  }
  return StatusCode::SUCCESS;
}

◆ msg()

MsgStream & AthCommonMsg< AlgTool >::msg ( ) const

inlineinherited

Definition at line 24 of file AthCommonMsg.h.

                                {
    return this->msgStream();
  }

◆ msgLvl()

bool AthCommonMsg< AlgTool >::msgLvl ( const MSG::Level lvl ) const

inlineinherited

Definition at line 30 of file AthCommonMsg.h.

                                               {
    return this->msgLevel(lvl);
  }

◆ outputHandles()

virtual std::vector< Gaudi::DataHandle * > AthCommonDataStore< AthCommonMsg< AlgTool > >::outputHandles ( ) const

overridevirtualinherited

Return this algorithm's output handles.

We override this to include handle instances from key arrays if they have not yet been declared. See comments on updateVHKA.

◆ rankTowerinFPGA()

StatusCode LVL1::eFEXFPGATowerIdProvider::rankTowerinFPGA ( int FPGAindex )

private

rank the tower ids in an FPGA This function determines the order of towers in an FPGA.

Towers are sorted using eta and phi, and then store the result in m_towerrankingcache object for future use.

Parameters

FPGAindex index of the FPGA

Returns: status code

See also: getFPGAIndex

Definition at line 148 of file eFEXFPGATowerIdProvider.cxx.

{  
  // This function determines the order of towers in an FPGA.
  // Towers are sorted using eta and phi, and 
  // then store the result in m_towerrankingcache object for future use.
  if (FPGAindex < 0) return StatusCode::FAILURE;
  // If the tower order of an FPGA has not been determined yet, start sorting.
  if (!m_towerrankingcache[FPGAindex]) {
    std::vector<std::pair<int, int>> rankingmap;
    // the row order is determined by eta while the column order is determined by phi
    for (auto each : *m_alltowers[FPGAindex]) {
      if (each.eTowerPhi < 3 && each.eTowerPhi > -1 && FPGAindex >= getFPGAIndex(21, 0)) {
        rankingmap.push_back(std::pair<int, int>(-each.eTowerEta - (90 + each.eTowerPhi) * 100, each.eTowerID));
      } else {
        rankingmap.push_back(std::pair<int, int>(-each.eTowerEta - each.eTowerPhi * 100, each.eTowerID));
      }
    }
    // There is supposed to be 60 towers in each FPGA
    if (rankingmap.size() != 60) {
      return StatusCode::FAILURE;
    }
    std::sort(rankingmap.begin(), rankingmap.end(),
      [](std::pair<int, int> a, std::pair<int, int> b) {
        // tower around eta == 0 has the same eta.
        if (a.first == b.first) {
          return (a.second < b.second);
        }
        return (a.first > b.first);
      });
    auto output = std::make_unique<std::vector<int>>();
    output->reserve(60);
    int vectorindex = 0;
    for (int i{ 0 }; i < 10; i++) {
      for (int j{ 0 }; j < 6; j++) {
        output->push_back(rankingmap[vectorindex++].second);
      }
    }
    m_towerrankingcache[FPGAindex] = std::move(output);
  }
  return StatusCode::SUCCESS;
}

◆ renounce()

std::enable_if_t< std::is_void_v< std::result_of_t< decltype(&T::renounce)(T)> > &&!std::is_base_of_v< SG::VarHandleKeyArray, T > &&std::is_base_of_v< Gaudi::DataHandle, T >, void > AthCommonDataStore< AthCommonMsg< AlgTool > >::renounce ( T & h )

inlineprotectedinherited

Definition at line 380 of file AthCommonDataStore.h.

  {
    h.renounce();
    PBASE::renounce (h);
  }

◆ renounceArray()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::renounceArray ( SG::VarHandleKeyArray & handlesArray )

inlineprotectedinherited

remove all handles from I/O resolution

Definition at line 364 of file AthCommonDataStore.h.

                                                          {
    handlesArray.renounce();
  }

◆ setAddress()

StatusCode LVL1::eFEXFPGATowerIdProvider::setAddress ( const std::string & inputaddress )

set path to the csv file and load

Definition at line 33 of file eFEXFPGATowerIdProvider.cxx.

{
  if (inputaddress.empty()) {
    m_hascsvfile = false;
    return StatusCode::FAILURE;
  }
  m_hascsvfile = true;
  m_csvaddress = inputaddress;
  if (loadcsv() == StatusCode::FAILURE) {
    m_hascsvfile = false;
    return StatusCode::FAILURE;
  }
  m_towerrankingcache.clear();
  m_towerrankingcache.resize(96);
  // sort the towers in each FPGA
  for (int efex{ 0 }; efex < 24; efex++) {
    for (int fpga{ 0 }; fpga < 4; fpga++) {
      if (rankTowerinFPGA(getFPGAIndex(efex, fpga)) == StatusCode::FAILURE) {
        m_hascsvfile = false;
        return StatusCode::FAILURE;
      }
    }
  }
  return StatusCode::SUCCESS;
}

◆ sysInitialize()

virtual StatusCode AthCommonDataStore< AthCommonMsg< AlgTool > >::sysInitialize ( )

overridevirtualinherited

Perform system initialization for an algorithm.

We override this to declare all the elements of handle key arrays at the end of initialization. See comments on updateVHKA.

Reimplemented in asg::AsgMetadataTool, AthCheckedComponent< AthAlgTool >, AthCheckedComponent<::AthAlgTool >, and DerivationFramework::CfAthAlgTool.

◆ sysStart()

virtual StatusCode AthCommonDataStore< AthCommonMsg< AlgTool > >::sysStart ( )

overridevirtualinherited

Handle START transition.

We override this in order to make sure that conditions handle keys can cache a pointer to the conditions container.

◆ updateVHKA()

void AthCommonDataStore< AthCommonMsg< AlgTool > >::updateVHKA ( Gaudi::Details::PropertyBase & )

inlineinherited

Definition at line 308 of file AthCommonDataStore.h.

                                               {
    // debug() << "updateVHKA for property " << p.name() << " " << p.toString() 
    //         << "  size: " << m_vhka.size() << endmsg;
    for (auto &a : m_vhka) {
      std::vector<SG::VarHandleKey*> keys = a->keys();
      for (auto k : keys) {
        k->setOwner(this);
      }
    }
  }

Member Data Documentation

◆ m_alltowers

std::unordered_map<int, std::unique_ptr<std::vector<towerinfo> > > LVL1::eFEXFPGATowerIdProvider::m_alltowers

private

Unordered tower Ids in each FPGAs. The index is the index of the FPGA.

See also: getFPGAIndex

Definition at line 107 of file eFEXFPGATowerIdProvider.h.

◆ m_csvaddress

std::string LVL1::eFEXFPGATowerIdProvider::m_csvaddress

private

path to the input csv file

Definition at line 126 of file eFEXFPGATowerIdProvider.h.

◆ m_detStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< AlgTool > >::m_detStore

privateinherited

Pointer to StoreGate (detector store by default)

Definition at line 393 of file AthCommonDataStore.h.

◆ m_evtStore

StoreGateSvc_t AthCommonDataStore< AthCommonMsg< AlgTool > >::m_evtStore

privateinherited

Pointer to StoreGate (event store by default)

Definition at line 390 of file AthCommonDataStore.h.

◆ m_hascsvfile

bool LVL1::eFEXFPGATowerIdProvider::m_hascsvfile {false}

private

if the csv file is valid

Definition at line 86 of file eFEXFPGATowerIdProvider.h.

86{false};

◆ m_towerrankingcache

std::vector<std::unique_ptr<std::vector<int> > > LVL1::eFEXFPGATowerIdProvider::m_towerrankingcache

private

Ordered tower Ids in each FPGAs. The index is the index of the FPGA.

See also: getFPGAIndex

Definition at line 104 of file eFEXFPGATowerIdProvider.h.

◆ m_varHandleArraysDeclared

bool AthCommonDataStore< AthCommonMsg< AlgTool > >::m_varHandleArraysDeclared

privateinherited

Definition at line 399 of file AthCommonDataStore.h.

◆ m_vhka

std::vector<SG::VarHandleKeyArray*> AthCommonDataStore< AthCommonMsg< AlgTool > >::m_vhka

privateinherited

Definition at line 398 of file AthCommonDataStore.h.

The documentation for this class was generated from the following files:

Classes

Public Member Functions

Static Public Member Functions

Protected Member Functions

Private Types

Private Member Functions

Private Attributes

Detailed Description

Member Typedef Documentation

◆ StoreGateSvc_t

Constructor & Destructor Documentation

◆ eFEXFPGATowerIdProvider()

◆ ~eFEXFPGATowerIdProvider()

Member Function Documentation

◆ declareGaudiProperty()

◆ declareProperty()

◆ detStore()

◆ evtStore()

◆ extraDeps_update_handler()

◆ getFPGAIndex()

◆ getRankedTowerIDineFEX()

◆ getRankedTowerIDinFPGA()

◆ hasFPGA()

◆ ifhaveinputfile()

◆ initialize()

◆ inputHandles()

◆ interfaceID()

◆ loadcsv()

◆ msg()

◆ msgLvl()

◆ outputHandles()

◆ rankTowerinFPGA()

◆ renounce()

◆ renounceArray()

◆ setAddress()

◆ sysInitialize()

◆ sysStart()

◆ updateVHKA()

Member Data Documentation

◆ m_alltowers

◆ m_csvaddress

◆ m_detStore

◆ m_evtStore

◆ m_hascsvfile

◆ m_towerrankingcache

◆ m_varHandleArraysDeclared

◆ m_vhka