ATLAS Offline Software
FPGATrackSimAnalysisConfig.py
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1 # Copyright (C) 2002-2024 CERN for the benefit of the ATLAS collaboration
2 
3 from AthenaConfiguration.ComponentAccumulator import ComponentAccumulator
4 from AthenaConfiguration.ComponentFactory import CompFactory
5 from AthenaCommon.Logging import AthenaLogger
6 from PathResolver import PathResolver
7 
8 log = AthenaLogger(__name__)
9 
10 def getBaseName(flags):
11  if (not (flags.Trigger.FPGATrackSim.baseName == '')):
12  return flags.Trigger.FPGATrackSim.baseName
13  elif (flags.Trigger.FPGATrackSim.region == 0):
14  return 'eta0103phi0305'
15  elif (flags.Trigger.FPGATrackSim.region == 1):
16  return 'eta0709phi0305'
17  elif (flags.Trigger.FPGATrackSim.region == 2):
18  return 'eta1214phi0305'
19  elif (flags.Trigger.FPGATrackSim.region == 3):
20  return 'eta2022phi0305'
21  elif (flags.Trigger.FPGATrackSim.region == 4):
22  return 'eta3234phi0305'
23  elif (flags.Trigger.FPGATrackSim.region == 5):
24  return 'eta0103phi1113'
25  elif (flags.Trigger.FPGATrackSim.region == 6):
26  return 'eta0103phi1921'
27  elif (flags.Trigger.FPGATrackSim.region == 7):
28  return 'eta0103phi3436'
29  else:
30  return 'default'
31 
32 
33 def getNSubregions(filePath):
34  with open(PathResolver.FindCalibFile(filePath), 'r') as f:
35  fields = f.readline()
36  assert(fields.startswith('towers'))
37  n = fields.split()[1]
38  return int(n)
39 
40 def FPGATrackSimEventSelectionCfg(flags):
41  result=ComponentAccumulator()
42  eventSelector = CompFactory.FPGATrackSimEventSelectionSvc()
43  eventSelector.regions = "HTT/TrigHTTMaps/V1/map_file/slices_v01_Jan21.txt"
44  eventSelector.regionID = flags.Trigger.FPGATrackSim.region
45  eventSelector.sampleType = flags.Trigger.FPGATrackSim.sampleType
46  eventSelector.withPU = False
47  result.addService(eventSelector, create=True, primary=True)
48  return result
49 
50 def FPGATrackSimMappingCfg(flags):
51  result=ComponentAccumulator()
52 
53  mappingSvc = CompFactory.FPGATrackSimMappingSvc()
54  mappingSvc.mappingType = "FILE"
55  mappingSvc.rmap = flags.Trigger.FPGATrackSim.mapsDir+"/"+getBaseName(flags)+".rmap" # we need more configurability here i.e. file choice should depend on some flag
56  mappingSvc.subrmap = flags.Trigger.FPGATrackSim.mapsDir+"/"+getBaseName(flags)+".subrmap" # presumably also here we want to be able to change the slices definition file
57  mappingSvc.pmap = flags.Trigger.FPGATrackSim.mapsDir+"/pmap"
58  mappingSvc.modulemap = flags.Trigger.FPGATrackSim.mapsDir+"/moduleidmap"
59  mappingSvc.radiiFile = flags.Trigger.FPGATrackSim.mapsDir + "/"+getBaseName(flags)+"_radii.txt"
60  mappingSvc.NNmap = ""
61  mappingSvc.layerOverride = []
62  result.addService(mappingSvc, create=True, primary=True)
63  return result
64 
65 def FPGATrackSimBankSvcCfg(flags):
66  result=ComponentAccumulator()
67  FPGATrackSimBankSvc = CompFactory.FPGATrackSimBankSvc()
68  pathBankSvc = flags.Trigger.FPGATrackSim.bankDir if flags.Trigger.FPGATrackSim.bankDir != '' else f'/eos/atlas/atlascerngroupdisk/det-htt/HTTsim/{flags.GeoModel.AtlasVersion}/21.9.16/'+getBaseName(flags)+'/SectorBanks/'
69  FPGATrackSimBankSvc.constantsNoGuess_1st = [
70  f'{pathBankSvc}corrgen_raw_8L_skipPlane0.gcon',
71  f'{pathBankSvc}corrgen_raw_8L_skipPlane1.gcon',
72  f'{pathBankSvc}corrgen_raw_8L_skipPlane2.gcon',
73  f'{pathBankSvc}corrgen_raw_8L_skipPlane3.gcon',
74  f'{pathBankSvc}corrgen_raw_8L_skipPlane4.gcon',
75  f'{pathBankSvc}corrgen_raw_8L_skipPlane5.gcon',
76  f'{pathBankSvc}corrgen_raw_8L_skipPlane6.gcon',
77  f'{pathBankSvc}corrgen_raw_8L_skipPlane7.gcon']
78  FPGATrackSimBankSvc.constantsNoGuess_2nd = [
79  f'{pathBankSvc}corrgen_raw_13L_skipPlane0.gcon',
80  f'{pathBankSvc}corrgen_raw_13L_skipPlane1.gcon',
81  f'{pathBankSvc}corrgen_raw_13L_skipPlane2.gcon',
82  f'{pathBankSvc}corrgen_raw_13L_skipPlane3.gcon',
83  f'{pathBankSvc}corrgen_raw_13L_skipPlane4.gcon',
84  f'{pathBankSvc}corrgen_raw_13L_skipPlane5.gcon',
85  f'{pathBankSvc}corrgen_raw_13L_skipPlane6.gcon',
86  f'{pathBankSvc}corrgen_raw_13L_skipPlane7.gcon']
87  FPGATrackSimBankSvc.constants_1st = f'{pathBankSvc}corrgen_raw_9L_reg{flags.Trigger.FPGATrackSim.region}_checkGood1.gcon'
88  FPGATrackSimBankSvc.constants_2nd = f'{pathBankSvc}corrgen_raw_13L_reg{flags.Trigger.FPGATrackSim.region}_checkGood1.gcon'
89  FPGATrackSimBankSvc.sectorBank_1st = f'{pathBankSvc}sectorsHW_raw_9L_reg{flags.Trigger.FPGATrackSim.region}_checkGood1.patt'
90  FPGATrackSimBankSvc.sectorBank_2nd = f'{pathBankSvc}sectorsHW_raw_13L_reg{flags.Trigger.FPGATrackSim.region}_checkGood1.patt'
91  FPGATrackSimBankSvc.sectorSlices = f'{pathBankSvc}slices_9L_reg{flags.Trigger.FPGATrackSim.region}.root'
92 
93  # These should be configurable. The tag system needs updating though.
94  import FPGATrackSimConfTools.FPGATrackSimTagConfig as FPGATrackSimTagConfig
95  bank_tag = FPGATrackSimTagConfig.getTags(stage='bank')['bank']
96  FPGATrackSimBankSvc.sectorQPtBins = bank_tag['sectorQPtBins']
97  FPGATrackSimBankSvc.qptAbsBinning = bank_tag['qptAbsBinning']
98 
99  result.addService(FPGATrackSimBankSvc, create=True, primary=True)
100  return result
101 
102 
103 def FPGATrackSimRoadUnionToolCfg(flags):
104  result=ComponentAccumulator()
105  RF = CompFactory.FPGATrackSimRoadUnionTool()
106 
107  xBins = flags.Trigger.FPGATrackSim.ActiveConfig.xBins
108  xBufferBins = flags.Trigger.FPGATrackSim.ActiveConfig.xBufferBins
109  yBins = flags.Trigger.FPGATrackSim.ActiveConfig.yBins
110  yBufferBins = flags.Trigger.FPGATrackSim.ActiveConfig.yBufferBins
111  xMin = flags.Trigger.FPGATrackSim.ActiveConfig.phiMin
112  xMax = flags.Trigger.FPGATrackSim.ActiveConfig.phiMax
113  xBuffer = (xMax - xMin) / xBins * xBufferBins
114  xMin = xMin - xBuffer
115  xMax = xMax + xBuffer
116  yMin = flags.Trigger.FPGATrackSim.ActiveConfig.qptMin
117  yMax = flags.Trigger.FPGATrackSim.ActiveConfig.qptMax
118  yBuffer = (yMax - yMin) / yBins * yBufferBins
119  yMin -= yBuffer
120  yMax += yBuffer
121  tools = []
122 
123  FPGATrackSimMapping = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
124  for number in range(getNSubregions(FPGATrackSimMapping.subrmap)):
125  HoughTransform = CompFactory.FPGATrackSimHoughTransformTool("HoughTransform_0_" + str(number))
126  HoughTransform.FPGATrackSimEventSelectionSvc = result.getPrimaryAndMerge(FPGATrackSimEventSelectionCfg(flags))
127  HoughTransform.FPGATrackSimBankSvc = result.getPrimaryAndMerge(FPGATrackSimBankSvcCfg(flags))
128  HoughTransform.FPGATrackSimMappingSvc = FPGATrackSimMapping
129  HoughTransform.combine_layers = flags.Trigger.FPGATrackSim.ActiveConfig.combineLayers
130  HoughTransform.convSize_x = flags.Trigger.FPGATrackSim.ActiveConfig.convSizeX
131  HoughTransform.convSize_y = flags.Trigger.FPGATrackSim.ActiveConfig.convSizeY
132  HoughTransform.convolution = flags.Trigger.FPGATrackSim.ActiveConfig.convolution
133  HoughTransform.d0_max = 0
134  HoughTransform.d0_min = 0
135  HoughTransform.fieldCorrection = flags.Trigger.FPGATrackSim.ActiveConfig.fieldCorrection
136  HoughTransform.hitExtend_x = flags.Trigger.FPGATrackSim.ActiveConfig.hitExtendX
137  HoughTransform.localMaxWindowSize = flags.Trigger.FPGATrackSim.ActiveConfig.localMaxWindowSize
138  HoughTransform.nBins_x = xBins + 2 * xBufferBins
139  HoughTransform.nBins_y = yBins + 2 * yBufferBins
140  HoughTransform.phi_max = xMax
141  HoughTransform.phi_min = xMin
142  HoughTransform.qpT_max = yMax
143  HoughTransform.qpT_min = yMin
144  HoughTransform.scale = flags.Trigger.FPGATrackSim.ActiveConfig.scale
145  HoughTransform.subRegion = number
146  HoughTransform.threshold = flags.Trigger.FPGATrackSim.ActiveConfig.threshold
147  HoughTransform.traceHits = True
148  HoughTransform.IdealGeoRoads = flags.Trigger.FPGATrackSim.ActiveConfig.IdealGeoRoads
149  HoughTransform.useSpacePoints = flags.Trigger.FPGATrackSim.spacePoints
150 
151  tools.append(HoughTransform)
152 
153  RF.tools = tools
154  result.addPublicTool(RF, primary=True)
155  return result
156 
157 def FPGATrackSimRoadUnionTool1DCfg(flags):
158  result=ComponentAccumulator()
159  tools = []
160  RF = CompFactory.FPGATrackSimRoadUnionTool()
161  splitpt=flags.Trigger.FPGATrackSim.Hough1D.splitpt
162  FPGATrackSimMapping = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
163  for ptstep in range(splitpt):
164  qpt_min = flags.Trigger.FPGATrackSim.Hough1D.qptMin
165  qpt_max = flags.Trigger.FPGATrackSim.Hough1D.qptMax
166  lowpt = qpt_min + (qpt_max-qpt_min)/splitpt*ptstep
167  highpt = qpt_min + (qpt_max-qpt_min)/splitpt*(ptstep+1)
168  nSlice = getNSubregions(FPGATrackSimMapping.subrmap)
169  for iSlice in range(nSlice):
170  tool = CompFactory.FPGATrackSimHough1DShiftTool("Hough1DShift" + str(iSlice)+(("_pt{}".format(ptstep)) if splitpt>1 else ""))
171  tool.subRegion = iSlice if nSlice > 1 else -1
172  tool.phiMin = flags.Trigger.FPGATrackSim.Hough1D.phiMin
173  tool.phiMax = flags.Trigger.FPGATrackSim.Hough1D.phiMax
174  tool.qptMin = lowpt
175  tool.qptMax = highpt
176  tool.nBins = flags.Trigger.FPGATrackSim.Hough1D.xBins
177  tool.useDiff = True
178  tool.variableExtend = True
179  tool.drawHitMasks = False
180  tool.phiRangeCut = flags.Trigger.FPGATrackSim.Hough1D.phiRangeCut
181  tool.d0spread=-1.0 # mm
182  tool.iterStep = 0 # auto, TODO put in tag
183  tool.iterLayer = 7 # TODO put in tag
184  tool.threshold = flags.Trigger.FPGATrackSim.Hough1D.threshold[0]
185  tool.hitExtend = flags.Trigger.FPGATrackSim.Hough1D.hitExtendX
186  tool.FPGATrackSimEventSelectionSvc = result.getPrimaryAndMerge(FPGATrackSimEventSelectionCfg(flags))
187  tool.FPGATrackSimBankSvc = result.getPrimaryAndMerge(FPGATrackSimBankSvcCfg(flags))
188  tool.FPGATrackSimMappingSvc = FPGATrackSimMapping
189  tool.IdealGeoRoads = flags.Trigger.FPGATrackSim.ActiveConfig.IdealGeoRoads
190  tool.useSpacePoints = flags.Trigger.FPGATrackSim.spacePoints
191 
192  tools.append(tool)
193 
194  RF.tools = tools
195  result.addPublicTool(RF, primary=True)
196  return result
197 
198 
199 
200 
201 
202 def FPGATrackSimRawLogicCfg(flags):
203  result=ComponentAccumulator()
204  FPGATrackSimRawLogic = CompFactory.FPGATrackSimRawToLogicalHitsTool()
205  FPGATrackSimRawLogic.SaveOptional = 2
206  if (flags.Trigger.FPGATrackSim.ActiveConfig.sampleType == 'skipTruth'):
207  FPGATrackSimRawLogic.SaveOptional = 1
208  FPGATrackSimRawLogic.TowersToMap = [0] # TODO TODO why is this hardcoded?
209  FPGATrackSimRawLogic.FPGATrackSimEventSelectionSvc = result.getPrimaryAndMerge(FPGATrackSimEventSelectionCfg(flags))
210  FPGATrackSimRawLogic.FPGATrackSimMappingSvc = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
211  result.addPublicTool(FPGATrackSimRawLogic, primary=True)
212  return result
213 
214 def FPGATrackSimDataFlowToolCfg(flags):
215  result=ComponentAccumulator()
216  DataFlowTool = CompFactory.FPGATrackSimDataFlowTool()
217  DataFlowTool.FPGATrackSimEventSelectionSvc = result.getPrimaryAndMerge(FPGATrackSimEventSelectionCfg(flags))
218  DataFlowTool.FPGATrackSimMappingSvc = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
219  DataFlowTool.THistSvc = CompFactory.THistSvc()
220  result.setPrivateTools(DataFlowTool)
221  return result
222 
223 def FPGATrackSimSpacePointsToolCfg(flags):
224  result=ComponentAccumulator()
225  SpacePointTool = CompFactory.FPGATrackSimSpacePointsTool()
226  SpacePointTool.Filtering = flags.Trigger.FPGATrackSim.ActiveConfig.spacePointFiltering
227  SpacePointTool.FilteringClosePoints = False
228  SpacePointTool.PhiWindow = 0.004
229  SpacePointTool.Duplication = True
230  result.addPublicTool(SpacePointTool, primary=True)
231  return result
232 
233 
234 def FPGATrackSimHitFilteringToolCfg(flags):
235  result=ComponentAccumulator()
236  HitFilteringTool = CompFactory.FPGATrackSimHitFilteringTool()
237  HitFilteringTool.barrelStubDphiCut = 3.0
238  HitFilteringTool.doRandomRemoval = False
239  HitFilteringTool.doStubs = False
240  HitFilteringTool.endcapStubDphiCut = 1.5
241  HitFilteringTool.pixelClusRmFrac = 0
242  HitFilteringTool.pixelHitRmFrac = 0
243  HitFilteringTool.stripClusRmFrac = 0
244  HitFilteringTool.stripHitRmFrac = 0
245  HitFilteringTool.useNstrips = False
246  result.addPublicTool(HitFilteringTool, primary=True)
247  return result
248 
249 
250 def FPGATrackSimHoughRootOutputToolCfg(flags):
251  result=ComponentAccumulator()
252  HoughRootOutputTool = CompFactory.FPGATrackSimHoughRootOutputTool()
253  HoughRootOutputTool.FPGATrackSimEventSelectionSvc = result.getPrimaryAndMerge(FPGATrackSimEventSelectionCfg(flags))
254  HoughRootOutputTool.FPGATrackSimMappingSvc = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
255  HoughRootOutputTool.THistSvc = CompFactory.THistSvc()
256  result.setPrivateTools(HoughRootOutputTool)
257  return result
258 
259 def LRTRoadFinderCfg(flags):
260  result=ComponentAccumulator()
261  LRTRoadFinder =CompFactory.FPGATrackSimHoughTransform_d0phi0_Tool()
262  LRTRoadFinder.FPGATrackSimBankSvc = result.getPrimaryAndMerge(FPGATrackSimBankSvcCfg(flags))
263  LRTRoadFinder.FPGATrackSimMappingSvc = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
264  LRTRoadFinder.combine_layers = flags.Trigger.FPGATrackSim.ActiveConfig.lrtStraighttrackCombineLayers
265  LRTRoadFinder.convolution = flags.Trigger.FPGATrackSim.ActiveConfig.lrtStraighttrackConvolution
266  LRTRoadFinder.hitExtend_x = flags.Trigger.FPGATrackSim.ActiveConfig.lrtStraighttrackHitExtendX
267  LRTRoadFinder.scale = flags.Trigger.FPGATrackSim.ActiveConfig.scale
268  LRTRoadFinder.threshold = flags.Trigger.FPGATrackSim.ActiveConfig.lrtStraighttrackThreshold
269  result.setPrivateTools(LRTRoadFinder)
270  return result
271 
272 def NNTrackToolCfg(flags):
273  result=ComponentAccumulator()
274  NNTrackTool = CompFactory.FPGATrackSimNNTrackTool()
275  NNTrackTool.THistSvc = CompFactory.THistSvc()
276  NNTrackTool.FPGATrackSimMappingSvc = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
277  result.setPrivateTools(NNTrackTool)
278  return result
279 
280 def FPGATrackSimWriteOutputCfg(flags):
281  result=ComponentAccumulator()
282  FPGATrackSimWriteOutput = CompFactory.FPGATrackSimOutputHeaderTool("FPGATrackSimWriteOutput")
283  FPGATrackSimWriteOutput.InFileName = ["test.root"]
284  FPGATrackSimWriteOutput.RWstatus = "RECREATE" # do not open file, use THistSvc
285  FPGATrackSimWriteOutput.RunSecondStage = flags.Trigger.FPGATrackSim.ActiveConfig.secondStage
286  result.addPublicTool(FPGATrackSimWriteOutput, primary=True)
287  return result
288 
289 def FPGATrackSimTrackFitterToolCfg(flags):
290  result=ComponentAccumulator()
291  TF_1st = CompFactory.FPGATrackSimTrackFitterTool("FPGATrackSimTrackFitterTool_1st")
292  TF_1st.GuessHits = flags.Trigger.FPGATrackSim.ActiveConfig.guessHits
293  TF_1st.IdealCoordFitType = flags.Trigger.FPGATrackSim.ActiveConfig.idealCoordFitType
294  TF_1st.FPGATrackSimBankSvc = result.getPrimaryAndMerge(FPGATrackSimBankSvcCfg(flags))
295  TF_1st.FPGATrackSimMappingSvc = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
296  TF_1st.chi2DofRecoveryMax = flags.Trigger.FPGATrackSim.ActiveConfig.chi2DoFRecoveryMax
297  TF_1st.chi2DofRecoveryMin = flags.Trigger.FPGATrackSim.ActiveConfig.chi2DoFRecoveryMin
298  TF_1st.doMajority = flags.Trigger.FPGATrackSim.ActiveConfig.doMajority
299  TF_1st.nHits_noRecovery = flags.Trigger.FPGATrackSim.ActiveConfig.nHitsNoRecovery
300  TF_1st.DoDeltaGPhis = flags.Trigger.FPGATrackSim.ActiveConfig.doDeltaGPhis
301  TF_1st.DoMissingHitsChecks = flags.Trigger.FPGATrackSim.ActiveConfig.doMissingHitsChecks
302  result.addPublicTool(TF_1st, primary=True)
303  return result
304 
305 def FPGATrackSimOverlapRemovalToolCfg(flags):
306  result=ComponentAccumulator()
307  OR_1st = CompFactory.FPGATrackSimOverlapRemovalTool("FPGATrackSimOverlapRemovalTool_1st")
308  OR_1st.ORAlgo = "Normal"
309  OR_1st.doFastOR =flags.Trigger.FPGATrackSim.ActiveConfig.doFastOR
310  OR_1st.NumOfHitPerGrouping = 5
311  OR_1st.FPGATrackSimMappingSvc = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
312  if flags.Trigger.FPGATrackSim.ActiveConfig.hough:
313  OR_1st.nBins_x = flags.Trigger.FPGATrackSim.ActiveConfig.xBins + 2 * flags.Trigger.FPGATrackSim.ActiveConfig.xBufferBins
314  OR_1st.nBins_y = flags.Trigger.FPGATrackSim.ActiveConfig.yBins + 2 * flags.Trigger.FPGATrackSim.ActiveConfig.yBufferBins
315  OR_1st.localMaxWindowSize = flags.Trigger.FPGATrackSim.ActiveConfig.localMaxWindowSize
316  OR_1st.roadSliceOR = flags.Trigger.FPGATrackSim.ActiveConfig.roadSliceOR
317 
318  result.addPublicTool(OR_1st, primary=True)
319  return result
320 
321 
322 def FPGATrackSimOverlapRemovalTool_2ndCfg(flags):
323  result=ComponentAccumulator()
324  OR_2nd = CompFactory.FPGATrackSimOverlapRemovalTool("FPGATrackSimOverlapRemovalTool_2nd")
325  OR_2nd.FPGATrackSimMappingSvc = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
326  if flags.Trigger.FPGATrackSim.ActiveConfig.secondStage:
327  OR_2nd.DoSecondStage = True
328  OR_2nd.ORAlgo = "Normal"
329  OR_2nd.doFastOR = flags.Trigger.FPGATrackSim.ActiveConfig.doFastOR
330  OR_2nd.NumOfHitPerGrouping = 5
331  result.setPrivateTools(OR_2nd)
332  return result
333 
334 
335 def FPGATrackSimTrackFitterTool_2ndCfg(flags):
336  result=ComponentAccumulator()
337  TF_2nd = CompFactory.FPGATrackSimTrackFitterTool(name="FPGATrackSimTrackFitterTool_2nd")
338  TF_2nd.FPGATrackSimBankSvc = result.getPrimaryAndMerge(FPGATrackSimBankSvcCfg(flags))
339  TF_2nd.FPGATrackSimMappingSvc = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
340  if flags.Trigger.FPGATrackSim.ActiveConfig.secondStage:
341  TF_2nd.Do2ndStageTrackFit = True
342  result.setPrivateTools(TF_2nd)
343  return result
344 
345 def FPGATrackSimReadInputCfg(flags):
346  result=ComponentAccumulator()
347  InputTool = CompFactory.FPGATrackSimInputHeaderTool(name="FPGATrackSimReadInput",
348  InFileName = flags.Trigger.FPGATrackSim.wrapperFileName)
349  result.addPublicTool(InputTool, primary=True)
350  return result
351 
352 def prepareFlagsForFPGATrackSimLogicalHistProcessAlg(flags):
353  newFlags = flags.cloneAndReplace("Trigger.FPGATrackSim.ActiveConfig", "Trigger.FPGATrackSim." + flags.Trigger.FPGATrackSim.algoTag)
354  return newFlags
355 
356 def FPGAClusterConverterCfg(flags):
357  result=ComponentAccumulator()
358  FPGAClusterConverter = CompFactory.FPGAClusterConverter()
359  result.setPrivateTools(FPGAClusterConverter)
360 
361  return result
362 
363 def FPGAActsTrkConverterCfg(flags):
364  result=ComponentAccumulator()
365  FPGAActsTrkConverter = CompFactory.FPGAActsTrkConverter()
366  result.setPrivateTools(FPGAActsTrkConverter)
367 
368  return result
369 
370 def FPGATrackSimLogicalHistProcessAlgCfg(inputFlags):
371 
372  flags = prepareFlagsForFPGATrackSimLogicalHistProcessAlg(inputFlags)
373 
374  result=ComponentAccumulator()
375 
376  theFPGATrackSimLogicalHistProcessAlg=CompFactory.FPGATrackSimLogicalHitsProcessAlg()
377  theFPGATrackSimLogicalHistProcessAlg.HitFiltering = flags.Trigger.FPGATrackSim.ActiveConfig.hitFiltering
378  theFPGATrackSimLogicalHistProcessAlg.writeOutputData = flags.Trigger.FPGATrackSim.ActiveConfig.writeOutputData
379  theFPGATrackSimLogicalHistProcessAlg.Clustering = flags.Trigger.FPGATrackSim.clustering
380  theFPGATrackSimLogicalHistProcessAlg.tracking = flags.Trigger.FPGATrackSim.tracking
381  theFPGATrackSimLogicalHistProcessAlg.outputHitTxt = flags.Trigger.FPGATrackSim.ActiveConfig.outputHitTxt
382  theFPGATrackSimLogicalHistProcessAlg.RunSecondStage = flags.Trigger.FPGATrackSim.ActiveConfig.secondStage
383  theFPGATrackSimLogicalHistProcessAlg.DoMissingHitsChecks = flags.Trigger.FPGATrackSim.ActiveConfig.doMissingHitsChecks
384  theFPGATrackSimLogicalHistProcessAlg.DoHoughRootOutput = False
385  theFPGATrackSimLogicalHistProcessAlg.DoNNTrack = False
386  theFPGATrackSimLogicalHistProcessAlg.eventSelector = result.getPrimaryAndMerge(FPGATrackSimEventSelectionCfg(flags))
387 
388  FPGATrackSimMaping = result.getPrimaryAndMerge(FPGATrackSimMappingCfg(flags))
389  theFPGATrackSimLogicalHistProcessAlg.FPGATrackSimMapping = FPGATrackSimMaping
390 
391  result.getPrimaryAndMerge(FPGATrackSimBankSvcCfg(flags))
392 
393 
394  if (flags.Trigger.FPGATrackSim.ActiveConfig.hough1D):
395  theFPGATrackSimLogicalHistProcessAlg.RoadFinder = result.getPrimaryAndMerge(FPGATrackSimRoadUnionTool1DCfg(flags))
396  else:
397  theFPGATrackSimLogicalHistProcessAlg.RoadFinder = result.getPrimaryAndMerge(FPGATrackSimRoadUnionToolCfg(flags))
398 
399  theFPGATrackSimLogicalHistProcessAlg.RawToLogicalHitsTool = result.getPrimaryAndMerge(FPGATrackSimRawLogicCfg(flags))
400 
401 
402  if flags.Trigger.FPGATrackSim.wrapperFileName != [] and flags.Trigger.FPGATrackSim.wrapperFileName is not None:
403  theFPGATrackSimLogicalHistProcessAlg.InputTool = result.getPrimaryAndMerge(FPGATrackSimReadInputCfg(flags))
404  theFPGATrackSimLogicalHistProcessAlg.InputTool2 = ""
405  theFPGATrackSimLogicalHistProcessAlg.SGInputTool = ""
406  else:
407  from ActsConfig.ActsGeometryConfig import ActsTrackingGeometryToolCfg
408  result.popToolsAndMerge(ActsTrackingGeometryToolCfg(flags))
409  theFPGATrackSimLogicalHistProcessAlg.InputTool = ""
410  theFPGATrackSimLogicalHistProcessAlg.InputTool2 = ""
411  from FPGATrackSimSGInput.FPGATrackSimSGInputConfig import FPGATrackSimSGInputToolCfg
412  theFPGATrackSimLogicalHistProcessAlg.SGInputTool = result.getPrimaryAndMerge(FPGATrackSimSGInputToolCfg(flags))
413 
414  theFPGATrackSimLogicalHistProcessAlg.DataFlowTool = result.getPrimaryAndMerge(FPGATrackSimDataFlowToolCfg(flags))
415  theFPGATrackSimLogicalHistProcessAlg.SpacePointTool = result.getPrimaryAndMerge(FPGATrackSimSpacePointsToolCfg(flags))
416 
417  if (flags.Trigger.FPGATrackSim.ActiveConfig.etaPatternFilter):
418  EtaPatternFilter = CompFactory.FPGATrackSimEtaPatternFilterTool()
419  EtaPatternFilter.FPGATrackSimMappingSvc = FPGATrackSimMaping
420  EtaPatternFilter.threshold = flags.Trigger.FPGATrackSim.Hough1D.threshold[0]
421  EtaPatternFilter.EtaPatterns = flags.Trigger.FPGATrackSim.mapsDir+"/"+getBaseName(flags)+".patt"
422  theFPGATrackSimLogicalHistProcessAlg.RoadFilter = EtaPatternFilter
423  theFPGATrackSimLogicalHistProcessAlg.FilterRoads = True
424 
425  if (flags.Trigger.FPGATrackSim.ActiveConfig.phiRoadFilter):
426  RoadFilter2 = CompFactory.FPGATrackSimPhiRoadFilterTool()
427  RoadFilter2.FPGATrackSimMappingSvc = FPGATrackSimMaping
428  RoadFilter2.threshold = flags.Trigger.FPGATrackSim.Hough1D.threshold[0]
429  RoadFilter2.fieldCorrection = flags.Trigger.FPGATrackSim.ActiveConfig.fieldCorrection
430 
431  windows = [flags.Trigger.FPGATrackSim.Hough1D.phifilterwindow for i in range(len(flags.Trigger.FPGATrackSim.ActiveConfig.hitExtendX))]
432  RoadFilter2.window = windows
433 
434  theFPGATrackSimLogicalHistProcessAlg.RoadFilter2 = RoadFilter2
435  theFPGATrackSimLogicalHistProcessAlg.FilterRoads2 = True
436 
437  theFPGATrackSimLogicalHistProcessAlg.HitFilteringTool = result.getPrimaryAndMerge(FPGATrackSimHitFilteringToolCfg(flags))
438  theFPGATrackSimLogicalHistProcessAlg.HoughRootOutputTool = result.getPrimaryAndMerge(FPGATrackSimHoughRootOutputToolCfg(flags))
439 
440  LRTRoadFilter = CompFactory.FPGATrackSimLLPRoadFilterTool()
441  result.addPublicTool(LRTRoadFilter)
442  theFPGATrackSimLogicalHistProcessAlg.LRTRoadFilter = LRTRoadFilter
443 
444  theFPGATrackSimLogicalHistProcessAlg.LRTRoadFinder = result.getPrimaryAndMerge(LRTRoadFinderCfg(flags))
445  theFPGATrackSimLogicalHistProcessAlg.NNTrackTool = result.getPrimaryAndMerge(NNTrackToolCfg(flags))
446 
447  theFPGATrackSimLogicalHistProcessAlg.ClusteringTool = CompFactory.FPGATrackSimClusteringTool()
448  theFPGATrackSimLogicalHistProcessAlg.OutputTool = result.getPrimaryAndMerge(FPGATrackSimWriteOutputCfg(flags))
449  theFPGATrackSimLogicalHistProcessAlg.TrackFitter_1st = result.getPrimaryAndMerge(FPGATrackSimTrackFitterToolCfg(flags))
450  theFPGATrackSimLogicalHistProcessAlg.OverlapRemoval_1st = result.getPrimaryAndMerge(FPGATrackSimOverlapRemovalToolCfg(flags))
451  theFPGATrackSimLogicalHistProcessAlg.OverlapRemoval_2nd = result.getPrimaryAndMerge(FPGATrackSimOverlapRemovalTool_2ndCfg(flags))
452  theFPGATrackSimLogicalHistProcessAlg.TrackFitter_2nd = result.getPrimaryAndMerge(FPGATrackSimTrackFitterTool_2ndCfg(flags))
453 
454  # Create SPRoadFilterTool if spacepoints are turned on. TODO: make things configurable?
455  if flags.Trigger.FPGATrackSim.spacePoints:
456  SPRoadFilter = CompFactory.FPGATrackSimSpacepointRoadFilterTool()
457  SPRoadFilter.filtering = flags.Trigger.FPGATrackSim.ActiveConfig.spacePointFiltering
458  SPRoadFilter.minSpacePlusPixel = flags.Trigger.FPGATrackSim.minSpacePlusPixel
459  # TODO guard here against threshold being more htan one value?
460  if (flags.Trigger.FPGATrackSim.ActiveConfig.hough1D):
461  SPRoadFilter.threshold = flags.Trigger.FPGATrackSim.Hough1D.threshold[0]
462  else:
463  SPRoadFilter.threshold = flags.Trigger.FPGATrackSim.ActiveConfig.threshold[0]
464  theFPGATrackSimLogicalHistProcessAlg.SPRoadFilterTool = SPRoadFilter
465  theFPGATrackSimLogicalHistProcessAlg.Spacepoints = True
466 
467  if flags.Trigger.FPGATrackSim.ActiveConfig.secondStage:
468  FPGATrackSimExtrapolatorTool = CompFactory.FPGATrackSimExtrapolator()
469  FPGATrackSimExtrapolatorTool.Ncombinations = 16
470  theFPGATrackSimLogicalHistProcessAlg.Extrapolator = FPGATrackSimExtrapolatorTool
471 
472 
473  if flags.Trigger.FPGATrackSim.ActiveConfig.lrt:
474  assert flags.Trigger.FPGATrackSim.ActiveConfig.lrtUseBasicHitFilter != flags.Trigger.FPGATrackSim.ActiveConfig.lrtUseMlHitFilter, 'Inconsistent LRT hit filtering setup, need either ML of Basic filtering enabled'
475  assert flags.Trigger.FPGATrackSim.ActiveConfig.lrtUseStraightTrackHT != flags.Trigger.FPGATrackSim.ActiveConfig.lrtUseDoubletHT, 'Inconsistent LRT HT setup, need either double or strightTrack enabled'
476  theFPGATrackSimLogicalHistProcessAlg.doLRT = True
477  theFPGATrackSimLogicalHistProcessAlg.LRTHitFiltering = (not flags.Trigger.FPGATrackSim.ActiveConfig.lrtSkipHitFiltering)
478 
479  from FPGATrackSimAlgorithms.FPGATrackSimAlgorithmConfig import FPGATrackSimLogicalHitsProcessAlgMonitoringCfg
480  theFPGATrackSimLogicalHistProcessAlg.MonTool = result.getPrimaryAndMerge(FPGATrackSimLogicalHitsProcessAlgMonitoringCfg(flags))
481 
482  result.addEventAlgo(theFPGATrackSimLogicalHistProcessAlg)
483 
484  return result
485 
486 
487 def FPGAConversionAlgCfg(inputFlags, name = 'FPGAConversionAlg', stage = '', **kwargs):
488 
489  flags = prepareFlagsForFPGATrackSimLogicalHistProcessAlg(inputFlags)
490 
491  result=ComponentAccumulator()
492 
493  kwargs.setdefault("FPGATrackSimClusterKey", "FPGAClusters%s" %(stage))
494  kwargs.setdefault("FPGATrackSimHitKey", "FPGAHits%s" %(stage))
495  kwargs.setdefault("FPGATrackSimHitInRoadsKey", "FPGAHitsInRoads%s" %(stage))
496  kwargs.setdefault("FPGATrackSimRoadKey", "FPGARoads%s" %(stage))
497  kwargs.setdefault("FPGATrackSimTrackKey", "FPGATracks%s" %(stage))
498  kwargs.setdefault("xAODPixelClusterFromFPGAClusterKey", "xAODPixelClusters%sFromFPGACluster" %(stage))
499  kwargs.setdefault("xAODStripClusterFromFPGAClusterKey", "xAODStripClusters%sFromFPGACluster" %(stage))
500  kwargs.setdefault("xAODPixelClusterFromFPGAHitKey", "xAODPixelClusters%sFromFPGAHit" %(stage))
501  kwargs.setdefault("xAODStripClusterFromFPGAHitKey", "xAODStripClusters%sFromFPGAHit" %(stage))
502  kwargs.setdefault("ActsProtoTrackFromFPGARoadKey", "ActsProtoTracks%sFromFPGARoad" %(stage))
503  kwargs.setdefault("ActsProtoTrackFromFPGATrackKey", "ActsProtoTracks%sFromFPGATrack" %(stage))
504  kwargs.setdefault("doHits", True)
505  kwargs.setdefault("doClusters", True)
506  kwargs.setdefault("doActsTrk", False)
507  kwargs.setdefault("ClusterConverter", result.popToolsAndMerge(FPGAClusterConverterCfg(flags)))
508  kwargs.setdefault("ActsTrkConverter", result.popToolsAndMerge(FPGAActsTrkConverterCfg(flags)))
509 
510  result.addEventAlgo(CompFactory.FPGAConversionAlgorithm(name, **kwargs))
511 
512  return result
513 
514 
515 def convertInDetToXAOD(flags):
516  acc = ComponentAccumulator()
517  from InDetConfig.InDetPrepRawDataFormationConfig import ITkInDetToXAODClusterConversionCfg
518  additional_kwargs = {
519  'InputPixelClustersName' : "FPGAInDetPixelClusterContainer",
520  'OutputPixelClustersName': "FPGAxAODPixelClusters",
521  'InputStripClustersName' : "FPGAInDetStripsClusterContainer",
522  'OutputStripClustersName': "FPGAxAODSctClusters"
523  }
524 
525  acc.merge(ITkInDetToXAODClusterConversionCfg(flags, name="FPGAITkInDetToXAODClusterConversion", **additional_kwargs))
526  return acc
527 
528 
529 
530 def WriteToAOD(flags, stage = ''): # store xAOD containers in AOD file
531  from OutputStreamAthenaPool.OutputStreamConfig import addToAOD
532  toAOD = []
533  toAOD += [f"xAOD::PixelClusterContainer#xAODPixelClusters{stage}FromFPGACluster",f"xAOD::PixelClusterAuxContainer#xAODPixelClusters{stage}FromFPGAClusterAux.",
534  f"xAOD::StripClusterContainer#xAODStripClusters{stage}FromFPGACluster",f"xAOD::StripClusterAuxContainer#xAODStripClusters{stage}FromFPGAClusterAux.",
535  ]
536 
537  result = ComponentAccumulator()
538  result.merge(addToAOD(flags, toAOD))
539 
540  return result
541 
542 
543 if __name__ == "__main__":
544  from AthenaConfiguration.AllConfigFlags import initConfigFlags
545  from AthenaConfiguration.MainServicesConfig import MainServicesCfg
546 
547  flags = initConfigFlags()
548  flags.fillFromArgs()
549 
550  from AthenaConfiguration.TestDefaults import defaultGeometryTags
551  flags.GeoModel.AtlasVersion = defaultGeometryTags.RUN4
552  if isinstance(flags.Trigger.FPGATrackSim.wrapperFileName, str):
553  log.info("wrapperFile is string, converting to list")
554  flags.Trigger.FPGATrackSim.wrapperFileName = [flags.Trigger.FPGATrackSim.wrapperFileName]
555  flags.Input.Files = lambda f: [f.Trigger.FPGATrackSim.wrapperFileName]
556 
557 
559  FinalProtoTrackChainxAODTracksKey="xAODFPGAProtoTracks"
560  flags.Detector.EnableCalo = False
561 
562  # ensure that the xAOD SP and cluster containers are available
563  flags.Tracking.ITkMainPass.doAthenaToActsSpacePoint=True
564  flags.Tracking.ITkMainPass.doAthenaToActsCluster=True
565 
566  flags.Acts.doRotCorrection = False
567 
568  # IDPVM flags
569  flags.PhysVal.IDPVM.doExpertOutput = True
570  flags.PhysVal.IDPVM.doPhysValOutput = True
571  flags.PhysVal.IDPVM.doHitLevelPlots = True
572  flags.PhysVal.IDPVM.runDecoration = True
573  flags.PhysVal.IDPVM.validateExtraTrackCollections = [f"{FinalProtoTrackChainxAODTracksKey}TrackParticles"]
574  flags.PhysVal.IDPVM.doTechnicalEfficiency = False # should figure out if 'True' is needed and what's missing to enable it
575  flags.PhysVal.OutputFileName = "IDPVM.root"
576 
577 
578  flags.lock()
579  flags = flags.cloneAndReplace("Tracking.ActiveConfig","Tracking.MainPass")
580  acc=MainServicesCfg(flags)
581 
582  acc.addService(CompFactory.THistSvc(Output = ["EXPERT DATAFILE='monitoring.root', OPT='RECREATE'"]))
583  acc.addService(CompFactory.THistSvc(Output = ["MONITOROUT DATAFILE='dataflow.root', OPT='RECREATE'"]))
584 
585 
586  if not flags.Trigger.FPGATrackSim.wrapperFileName:
587  from AthenaPoolCnvSvc.PoolReadConfig import PoolReadCfg
588  acc.merge(PoolReadCfg(flags))
589 
590  if flags.Input.isMC:
591  from xAODTruthCnv.xAODTruthCnvConfig import GEN_AOD2xAODCfg
592  acc.merge(GEN_AOD2xAODCfg(flags))
593 
594  if flags.Detector.EnableCalo:
595  from CaloRec.CaloRecoConfig import CaloRecoCfg
596  acc.merge(CaloRecoCfg(flags))
597 
598  if not flags.Reco.EnableTrackOverlay:
599  from InDetConfig.TrackRecoConfig import InDetTrackRecoCfg
600  acc.merge(InDetTrackRecoCfg(flags))
601 
602  acc.merge(FPGATrackSimLogicalHistProcessAlgCfg(flags))
603  if flags.Trigger.FPGATrackSim.doEDMConversion:
604  acc.merge(FPGAConversionAlgCfg(flags, name = 'FPGAConversionAlg_1st', stage = '_1st', doActsTrk=True))
605 
606  from FPGATrackSimPrototrackFitter.FPGATrackSimPrototrackFitterConfig import FPGAPrototrackFitAndMonitoringCfg
607  acc.merge(FPGAPrototrackFitAndMonitoringCfg(flags,FinalProtoTrackChainxAODTracksKey=FinalProtoTrackChainxAODTracksKey,stage='_1st')) # Run ACTS KF + IDPVM for 1st stage
608 
609  if flags.Trigger.FPGATrackSim.writeToAOD: acc.merge(WriteToAOD(flags, stage = '_1st'))
610  if flags.Trigger.FPGATrackSim.Hough.secondStage : acc.merge(FPGAConversionAlgCfg(flags, name = 'FPGAConversionAlg_2nd', stage = '_2nd')) # Default disabled, doesn't work if enabled
611  if flags.Trigger.FPGATrackSim.convertUnmappedHits: acc.merge(FPGAConversionAlgCfg(flags, name = 'FPGAConversionAlgUnmapped_1st', stage = 'Unmapped_1st', doClusters = False))
612  if flags.Trigger.FPGATrackSim.Hough.hitFiltering : acc.merge(FPGAConversionAlgCfg(flags, name = 'FPGAConversionAlgFiltered_1st', stage = 'Filtered_1st', doHits = False)) # Default disabled, works if enabled
613  #if flags.Trigger.FPGATrackSim.Hough.spacePoints : acc.merge(FPGAConversionAlgCfg(flags, name = 'FPGAConversionAlgSpacePoints_1st', stage = 'SpacePoints_1st')) # TODO
614 
615  # Add the truth decorators
616  from InDetPhysValMonitoring.InDetPhysValDecorationConfig import AddDecoratorCfg
617  acc.merge(AddDecoratorCfg(flags))
618 
619  # IDPVM running
620  from InDetPhysValMonitoring.InDetPhysValMonitoringConfig import InDetPhysValMonitoringCfg
621  acc.merge(InDetPhysValMonitoringCfg(flags))
622 
623  acc.store(open('AnalysisConfig.pkl','wb'))
624 
625  statusCode = acc.run(flags.Exec.MaxEvents)
626  assert statusCode.isSuccess() is True, "Application execution did not succeed"
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