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jFexBits.h File Reference
#include <cstdint>
Include dependency graph for jFexBits.h:
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Go to the source code of this file.

Namespaces

namespace  LVL1
 eFexTowerBuilder creates xAOD::eFexTowerContainer from supercells (LATOME) and triggerTowers (TREX) inputs.
namespace  LVL1::jFEXBits

Variables

static constexpr uint32_t LVL1::jFEXBits::ROD_WORDS = 2
 Number of jFEX to ROD trailer words.
static constexpr uint32_t LVL1::jFEXBits::jFEX2ROD_WORDS = 2
static constexpr uint32_t LVL1::jFEXBits::TOB_TRAILERS = 2
static constexpr uint32_t LVL1::jFEXBits::DATA_BLOCKS = 60
static constexpr uint32_t LVL1::jFEXBits::DATA_WORDS_PER_BLOCK = 8
static constexpr uint32_t LVL1::jFEXBits::EMB = 0
static constexpr uint32_t LVL1::jFEXBits::TILE = 1
static constexpr uint32_t LVL1::jFEXBits::EMEC = 2
static constexpr uint32_t LVL1::jFEXBits::HEC = 3
static constexpr uint32_t LVL1::jFEXBits::FCAL1 = 4
static constexpr uint32_t LVL1::jFEXBits::FCAL2 = 5
static constexpr uint32_t LVL1::jFEXBits::FCAL3 = 6
static constexpr uint32_t LVL1::jFEXBits::FPGA_U1 = 0
static constexpr uint32_t LVL1::jFEXBits::FPGA_U2 = 1
static constexpr uint32_t LVL1::jFEXBits::FPGA_U3 = 2
static constexpr uint32_t LVL1::jFEXBits::FPGA_U4 = 3
static constexpr uint32_t LVL1::jFEXBits::TOB_COUNTS_6b = 0x3f
 Masking for TOB/xTOB Counter Trailer of jEM, jTau, jJ and jLJ.
static constexpr uint32_t LVL1::jFEXBits::TOB_COUNTS_1b = 0x1
 Masking for TOB Counter Trailer of jXE and jTE.
static constexpr uint32_t LVL1::jFEXBits::jJ_TOB_COUNTS = 1
 Bit positions for TOB Counter Trailer.
static constexpr uint32_t LVL1::jFEXBits::jLJ_TOB_COUNTS = 7
static constexpr uint32_t LVL1::jFEXBits::jTau_TOB_COUNTS = 13
static constexpr uint32_t LVL1::jFEXBits::jEM_TOB_COUNTS = 19
static constexpr uint32_t LVL1::jFEXBits::jTE_TOB_COUNTS = 25
static constexpr uint32_t LVL1::jFEXBits::jXE_TOB_COUNTS = 26
static constexpr uint32_t LVL1::jFEXBits::ROD_HEADER_3b = 0x7
 Masking words.
static constexpr uint32_t LVL1::jFEXBits::ROD_HEADER_8b = 0xff
static constexpr uint32_t LVL1::jFEXBits::ROD_HEADER_9b = 0x1ff
static constexpr uint32_t LVL1::jFEXBits::ROD_HEADER_12b = 0xfff
static constexpr uint32_t LVL1::jFEXBits::ROD_HEADER_24b = 0xffffff
static constexpr uint32_t LVL1::jFEXBits::L1CALO_STREAM_ID_ROD_HEADER = 0
 Bit positions for jFEX to ROB Trailer.
static constexpr uint32_t LVL1::jFEXBits::L1CALO_STREAM_ID_SLOT_ROD_HEADER = 0
static constexpr uint32_t LVL1::jFEXBits::L1CALO_STREAM_ID_FPGA_ROD_HEADER = 4
static constexpr uint32_t LVL1::jFEXBits::L1CALO_STREAM_ID_INFO_ROD_HEADER = 6
static constexpr uint32_t LVL1::jFEXBits::BCN_ROD_HEADER = 8
static constexpr uint32_t LVL1::jFEXBits::CRC_ROD_HEADER = 20
static constexpr uint32_t LVL1::jFEXBits::VERS_ROD_HEADER = 29
static constexpr uint32_t LVL1::jFEXBits::L1ID_ROD_HEADER = 0
static constexpr uint32_t LVL1::jFEXBits::ECRID_ROD_HEADER = 24
static constexpr uint32_t LVL1::jFEXBits::ROD_TRAILER_1b = 0x1
 Masking words.
static constexpr uint32_t LVL1::jFEXBits::ROD_TRAILER_2b = 0x3
static constexpr uint32_t LVL1::jFEXBits::ROD_TRAILER_4b = 0xf
static constexpr uint32_t LVL1::jFEXBits::ROD_TRAILER_6b = 0x3f
static constexpr uint32_t LVL1::jFEXBits::ROD_TRAILER_16b = 0xffff
static constexpr uint32_t LVL1::jFEXBits::ROD_TRAILER_20b = 0xfffff
static constexpr uint32_t LVL1::jFEXBits::PAYLOAD_ROD_TRAILER = 0
 Bit positions for jFEX to ROB Trailer.
static constexpr uint32_t LVL1::jFEXBits::FPGA_ROD_TRAILER = 18
static constexpr uint32_t LVL1::jFEXBits::jFEX_ROD_TRAILER = 20
static constexpr uint32_t LVL1::jFEXBits::RO_ROD_TRAILER = 24
static constexpr uint32_t LVL1::jFEXBits::TSN_ROD_TRAILER = 28
static constexpr uint32_t LVL1::jFEXBits::ERROR_ROD_TRAILER = 0
static constexpr uint32_t LVL1::jFEXBits::CRC_ROD_TRAILER = 12
static constexpr uint32_t LVL1::jFEXBits::ERROR_CORR_TRAILER = 5
static constexpr uint32_t LVL1::jFEXBits::ERROR_SAFE_MODE = 4
static constexpr uint32_t LVL1::jFEXBits::ERROR_PROTOCOL_ERROR = 3
static constexpr uint32_t LVL1::jFEXBits::ERROR_LENGTH_MISMATCH = 2
static constexpr uint32_t LVL1::jFEXBits::ERROR_HEADER_MISMATCH = 1
static constexpr uint32_t LVL1::jFEXBits::ERROR_PROC_TIMEOUT = 0
static constexpr uint32_t LVL1::jFEXBits::ROD_TRAILER_7b = 0x7f
 Masking words.
static constexpr uint32_t LVL1::jFEXBits::ROD_ERROR_CORR_TRAILER = 6
static constexpr uint32_t LVL1::jFEXBits::ROD_ERROR_PAYLOAD_CRC = 5
static constexpr uint32_t LVL1::jFEXBits::ROD_ERROR_HEADER_CRC = 4
static constexpr uint32_t LVL1::jFEXBits::ROD_ERROR_RESERVED = 3
static constexpr uint32_t LVL1::jFEXBits::ROD_ERROR_LENGTH_MISMATCH = 2
static constexpr uint32_t LVL1::jFEXBits::ROD_ERROR_HEADER_MISMATCH = 1
static constexpr uint32_t LVL1::jFEXBits::ROD_ERROR_PROC_TIMEOUT = 0
static constexpr uint32_t LVL1::jFEXBits::BS_TRAILER_1b = 0x1
 Masking words.
static constexpr uint32_t LVL1::jFEXBits::BS_TRAILER_4b = 0xf
static constexpr uint32_t LVL1::jFEXBits::BS_TRAILER_7b = 0x7f
static constexpr uint32_t LVL1::jFEXBits::BS_TRAILER_8b = 0xff
static constexpr uint32_t LVL1::jFEXBits::BS_TRAILER_9b = 0x1ff
static constexpr uint32_t LVL1::jFEXBits::BS_TRAILER_12b = 0xfff
static constexpr uint32_t LVL1::jFEXBits::BS_CHANNEL_TRAILER = 0
 Bit positions Input bulk stream.
static constexpr uint32_t LVL1::jFEXBits::BS_SATUR_0_TRAILER = 0
static constexpr uint32_t LVL1::jFEXBits::BS_SATUR_1_TRAILER = 8
static constexpr uint32_t LVL1::jFEXBits::BS_BCID_TRAILER = 16
static constexpr uint32_t LVL1::jFEXBits::BS_CRC_TRAILER = 23
static constexpr uint32_t LVL1::jFEXBits::BS_ET_DATA_0 = 0
static constexpr uint32_t LVL1::jFEXBits::BS_ET_DATA_1 = 12
static constexpr uint32_t LVL1::jFEXBits::BS_ET_DATA_4 = 24
static constexpr uint32_t LVL1::jFEXBits::BS_ET_DATA_7 = 28
static constexpr uint32_t LVL1::jFEXBits::BS_MERGE_DATA = 8
const std::unordered_map< uint32_t, std::vector< uint16_t > > LVL1::jFEXBits::tile_channels