ATLAS Offline Software
jFexBits.h
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1 // Dear emacs, this is -*- c++ -*-
2 
3 /*
4  Copyright (C) 2002-2022 CERN for the benefit of the ATLAS collaboration
5 */
6 
7 
8 #ifndef L1CALOFEXBYTESTREAM_JFEXBITS_H
9 #define L1CALOFEXBYTESTREAM_JFEXBITS_H
10 
11 #include <cstdint>
12 
13 namespace LVL1::jFEXBits {
14 /************ Words in Trailers ************/
16  static constexpr uint32_t ROD_WORDS = 2;
17  static constexpr uint32_t jFEX2ROD_WORDS = 2;
18 
19  // For RoI data
20  static constexpr uint32_t TOB_TRAILERS = 2;
21 
22  // For input data
23  static constexpr uint32_t DATA_BLOCKS = 60;
24  static constexpr uint32_t DATA_WORDS_PER_BLOCK = 8;
25 
26 
27 /************ Calo source scheme ************/
28  static constexpr uint32_t EMB = 0;
29  static constexpr uint32_t TILE = 1;
30  static constexpr uint32_t EMEC = 2;
31  static constexpr uint32_t HEC = 3;
32  static constexpr uint32_t FCAL1 = 4;
33  static constexpr uint32_t FCAL2 = 5;
34  static constexpr uint32_t FCAL3 = 6;
35 
36 /************ FPGA scheme ************/
37  static constexpr uint32_t FPGA_U1 = 0;
38  static constexpr uint32_t FPGA_U2 = 1;
39  static constexpr uint32_t FPGA_U3 = 2;
40  static constexpr uint32_t FPGA_U4 = 3;
41 
42 /************ TOB,XTOB Counter Trailer ************/
43 
45  static constexpr uint32_t TOB_COUNTS_6b = 0x3f;
47  static constexpr uint32_t TOB_COUNTS_1b = 0x1;
49  static constexpr uint32_t jJ_TOB_COUNTS = 1;
50  static constexpr uint32_t jLJ_TOB_COUNTS = 7;
51  static constexpr uint32_t jTau_TOB_COUNTS = 13;
52  static constexpr uint32_t jEM_TOB_COUNTS = 19;
53  static constexpr uint32_t jTE_TOB_COUNTS = 25;
54  static constexpr uint32_t jXE_TOB_COUNTS = 26;
55 
56 /************ jFEX to ROD Header ************/
57 
59  static constexpr uint32_t ROD_HEADER_3b = 0x7;
60  static constexpr uint32_t ROD_HEADER_8b = 0xff;
61  static constexpr uint32_t ROD_HEADER_9b = 0x1ff;
62  static constexpr uint32_t ROD_HEADER_12b = 0xfff;
63  static constexpr uint32_t ROD_HEADER_24b = 0xffffff;
64 
66  static constexpr uint32_t L1CALO_STREAM_ID_ROD_HEADER = 0;
67  static constexpr uint32_t L1CALO_STREAM_ID_SLOT_ROD_HEADER = 0;
68  static constexpr uint32_t L1CALO_STREAM_ID_FPGA_ROD_HEADER = 4;
69  static constexpr uint32_t L1CALO_STREAM_ID_INFO_ROD_HEADER = 6;
70  static constexpr uint32_t BCN_ROD_HEADER = 8;
71  static constexpr uint32_t CRC_ROD_HEADER = 20;
72  static constexpr uint32_t VERS_ROD_HEADER = 29;
73 
74  static constexpr uint32_t L1ID_ROD_HEADER = 0;
75  static constexpr uint32_t ECRID_ROD_HEADER = 24;
76 
77 /************ jFEX to ROD Trailer ************/
78 
80  static constexpr uint32_t ROD_TRAILER_1b = 0x1;
81  static constexpr uint32_t ROD_TRAILER_2b = 0x3;
82  static constexpr uint32_t ROD_TRAILER_4b = 0xf;
83  static constexpr uint32_t ROD_TRAILER_6b = 0x3f;
84  static constexpr uint32_t ROD_TRAILER_16b = 0xffff;
85  static constexpr uint32_t ROD_TRAILER_20b = 0xfffff;
86 
88  static constexpr uint32_t PAYLOAD_ROD_TRAILER = 0;
89  static constexpr uint32_t FPGA_ROD_TRAILER = 18;
90  static constexpr uint32_t jFEX_ROD_TRAILER = 20;
91  static constexpr uint32_t RO_ROD_TRAILER = 24;
92  static constexpr uint32_t TSN_ROD_TRAILER = 28;
93 
94  static constexpr uint32_t ERROR_ROD_TRAILER = 0;
95  static constexpr uint32_t CRC_ROD_TRAILER = 12;
96 
97  static constexpr uint32_t ERROR_CORR_TRAILER = 5; // For corrective trailer bit in the jFEX to ROD Error bits
98  static constexpr uint32_t ERROR_SAFE_MODE = 4; // For safe mode in the jFEX to ROD Error bits
99  static constexpr uint32_t ERROR_PROTOCOL_ERROR = 3; // For protocol error in the jFEX to ROD Error bits
100  static constexpr uint32_t ERROR_LENGTH_MISMATCH = 2; // For length mismatch in the jFEX to ROD Error bits
101  static constexpr uint32_t ERROR_HEADER_MISMATCH = 1; // For header mismatch in the jFEX to ROD Error bits
102  static constexpr uint32_t ERROR_PROC_TIMEOUT = 0; // For processor timeout in the jFEX to ROD Error bits
103 
104 /************ ROD Trailer ************/
105 
107  static constexpr uint32_t ROD_TRAILER_7b = 0x7f;
108 
109  static constexpr uint32_t ROD_ERROR_CORR_TRAILER = 6; // For corrective trailer bit error
110  static constexpr uint32_t ROD_ERROR_PAYLOAD_CRC = 5; // For payload CRC error
111  static constexpr uint32_t ROD_ERROR_HEADER_CRC = 4; // For header CRC error
112  static constexpr uint32_t ROD_ERROR_RESERVED = 3; // Does nothing for now
113  static constexpr uint32_t ROD_ERROR_LENGTH_MISMATCH = 2; // For length mismatch in the jFEX to ROD Error bits
114  static constexpr uint32_t ROD_ERROR_HEADER_MISMATCH = 1; // For header mismatch in the jFEX to ROD Error bits
115  static constexpr uint32_t ROD_ERROR_PROC_TIMEOUT = 0; // For processor timeout in the jFEX to ROD Error bits
116 
117 
118 /************ Input Bulk Stream data ************/
119 
121  static constexpr uint32_t BS_TRAILER_1b = 0x1;
122  static constexpr uint32_t BS_TRAILER_4b = 0xf;
123  static constexpr uint32_t BS_TRAILER_7b = 0x7f;
124  static constexpr uint32_t BS_TRAILER_8b = 0xff;
125  static constexpr uint32_t BS_TRAILER_9b = 0x1ff;
126  static constexpr uint32_t BS_TRAILER_12b = 0xfff;
127 
129  static constexpr uint32_t BS_CHANNEL_TRAILER = 0;
130  static constexpr uint32_t BS_SATUR_0_TRAILER = 0;
131  static constexpr uint32_t BS_SATUR_1_TRAILER = 8;
132  static constexpr uint32_t BS_BCID_TRAILER = 16;
133  static constexpr uint32_t BS_CRC_TRAILER = 23;
134 
135  //Bit positions input data Et
136  static constexpr uint32_t BS_ET_DATA_0 = 0;
137  static constexpr uint32_t BS_ET_DATA_1 = 12;
138  static constexpr uint32_t BS_ET_DATA_4 = 24;
139  static constexpr uint32_t BS_ET_DATA_7 = 28;
140 
141  //Bit position to merge divided Et data bits
142  static constexpr uint32_t BS_MERGE_DATA = 8;
143 
144  const std::unordered_map<uint32_t, std::vector<uint16_t> > tile_channels = {
145  {0, { 20, 21, 22, 23, 56, 57, 58, 59} },
146  {1, {16, 17, 18, 19, 20, 21, 22, 23, 52, 53, 54, 55, 56, 57, 58, 59} },
147  {2, {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59} },
148  {3, {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59} },
149  {4, {16, 17, 18, 19, 20, 21, 22, 23, 52, 53, 54, 55, 56, 57, 58, 59} },
150  {5, { 20, 21, 22, 23, 56, 57, 58, 59} }
151  };
152 
153 
154 
155 } // namespace LVL1::jFEXBits
156 
157 #endif // L1CALOFEXBYTESTREAM_JFEXBITS_H
LVL1::jFEXBits
Definition: jFexBits.h:13
xAOD::uint32_t
setEventNumber uint32_t
Definition: EventInfo_v1.cxx:127
LVL1::jFEXBits::tile_channels
const std::unordered_map< uint32_t, std::vector< uint16_t > > tile_channels
Definition: jFexBits.h:144
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