29 return (((word >> (item % 32)) & 0x1) != 0);
36 return (((word >> (item % 32)) & 0x1) != 0);
43 return (((word >> (item % 32)) & 0x1) != 0);
std::vector< uint32_t > m_l1_itemsTAP
Trigger (level 1 items) After Prescale.
std::vector< uint32_t > m_l1_itemsTAV
Trigger (level 1 items) After Veto (==final L1 decision)
bool isConfigured() const
is LVL1 configured ?
bool isPrescaled(unsigned int item) const
item isPassedBeforePrescale and not isPassedAfterPrescale
std::vector< uint32_t > m_l1_itemsTBP
Trigger (level 1 items) Before Prescale.
bool isPassedAfterVeto(unsigned int item) const
final L1 decision for this item
bool isAccepted() const
final LVL1 decision && isConfigured
bool isPassedRaw(unsigned int item) const
same as isPassedBeforePrescale
bool isPassedBeforePrescale(unsigned int item) const
raw L1 item
bool isVeto(unsigned int item) const
item isPassedAfterPrescale and not isPassedAfterVeto
bool anyActiveL1ItemAfterVeto() const
any LVL1 item passed after prescale, veto ?
bool isPassedAfterPrescale(unsigned int item) const
after prescale