ATLAS Offline Software
Functions | Variables
FPGAOutputValidationConfig Namespace Reference

Functions

def FPGAOutputValidationCfg (flags, **kwargs)
 

Variables

 argumentParser
 
 default
 
 action
 
 required
 
 arguments
 
 flags
 
 NumThreads
 
 Files
 
 AODFileName
 
 acc
 

Function Documentation

◆ FPGAOutputValidationCfg()

def FPGAOutputValidationConfig.FPGAOutputValidationCfg (   flags,
**  kwargs 
)

Definition at line 3 of file FPGAOutputValidationConfig.py.

3 def FPGAOutputValidationCfg(flags, **kwargs):
4  from AthenaConfiguration.ComponentAccumulator import ComponentAccumulator
5  acc = ComponentAccumulator()
6 
7  kwargs.setdefault("pixelKeys", [])
8  kwargs.setdefault("stripKeys", [])
9  kwargs.setdefault("doDiffHistograms", False)
10  kwargs.setdefault("matchByID", False)
11  kwargs.setdefault("allowedRdoMisses", 500)
12  kwargs.setdefault("checkClusterRdos", False)
13 
14  from AthenaMonitoringKernel.GenericMonitoringTool import GenericMonitoringTool
15  monitoringTool = GenericMonitoringTool(flags, 'FPGAOutputValidationMonitoringTool')
16  monitoringTool.HistPath = "/"
17 
18  pixelLayers = {"barrel": 5, "endcap": 9}
19  stripLayers = {"barrel": 4, "endcap": 6}
20  for histName in ["all", "barrel", "endcap"]:
21 
22  if len(kwargs["pixelKeys"]) == 2 and kwargs["doDiffHistograms"]:
23  key0 = kwargs["pixelKeys"][0]
24  key1 = kwargs["pixelKeys"][1]
25  name = f"{key0} - {key1}"
26  monitoringTool.defineHistogram("nmatched_pixel_clusters_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1I", title = f"{name}: number of matched clusters", xbins = 51, xmin=-0.5, xmax = 50.5)
27  monitoringTool.defineHistogram("diff_pixel_locx_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:locx;Local position x;", xbins = 200, xmin = -0.2, xmax = 0.2)
28  monitoringTool.defineHistogram("diff_pixel_locy_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:locy;Local position y;", xbins = 200, xmin = -0.2, xmax = 0.2)
29  monitoringTool.defineHistogram("diff_pixel_covxx_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:covxx;Local covariance xx;", xbins = 1000, xmin = -0.001, xmax = 0.001)
30  monitoringTool.defineHistogram("diff_pixel_covyy_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:covyy;Local covariance yy;", xbins = 1000, xmin = -0.001, xmax = 0.001)
31  monitoringTool.defineHistogram("diff_pixel_globalx_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:globalx;Global position x;", xbins = 200, xmin = -0.05, xmax = 0.05)
32  monitoringTool.defineHistogram("diff_pixel_globaly_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:globaly;Global position y;", xbins = 200, xmin = -0.05, xmax = 0.05)
33  monitoringTool.defineHistogram("diff_pixel_globalz_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:globalz;Global position z;", xbins = 200, xmin = -0.05, xmax = 0.05)
34  monitoringTool.defineHistogram("diff_pixel_channelsphi_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1I", title = f"{name}:channels in phi;Channels in #phi;", xbins = 11, xmin = -5.5, xmax = 5.5)
35  monitoringTool.defineHistogram("diff_pixel_channelseta_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1I", title = f"{name}:channels in eta;Channels in #eta;", xbins = 11, xmin = -5.5, xmax = 5.5)
36  monitoringTool.defineHistogram("diff_pixel_widtheta_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:width in eta;Channels in #phi;", xbins = 100, xmin = -5, xmax = 5)
37  monitoringTool.defineHistogram("diff_pixel_tot_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1I", title = f"{name}:tot;Total TOT;", xbins = 101, xmin = -50.5, xmax = 50.5)
38  monitoringTool.defineHistogram("diff_pixel_rdos_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1I", title = f"{name}:rdos;number of rdos;", xbins = 101, xmin = -50.5, xmax = 50.5)
39  monitoringTool.defineHistogram(f"pixel_globalZ_ref_{histName},pixel_globalR_ref_{histName},diff_pixel_rdos_{histName};diff_pixel_RDOs_RZ", path= "FPGAOutputValidation/"+histName, type = "TProfile2D", title = f"{name}:RDOs;Z [mm];R [mm]", xbins = 300, xmin = -3000, xmax = 3000, ybins = 100, ymin = 0, ymax = 1000)
40  monitoringTool.defineHistogram(f"pixel_globalZ_ref_{histName},pixel_globalR_ref_{histName},diff_pixel_locx_{histName};diff_pixel_locx_RZ", path= "FPGAOutputValidation/"+histName, type = "TProfile2D", title = f"{name}:locx;Z [mm];R [mm]", xbins = 300, xmin = -3000, xmax = 3000, ybins = 100, ymin = 0, ymax = 1000, zmin = -0.02, zmax = 0.02)
41  monitoringTool.defineHistogram(f"pixel_globalZ_ref_{histName},pixel_globalR_ref_{histName},diff_pixel_locy_{histName};diff_pixel_locy_RZ", path= "FPGAOutputValidation/"+histName, type = "TProfile2D", title = f"{name}:locy;Z [mm];R [mm]", xbins = 300, xmin = -3000, xmax = 3000, ybins = 100, ymin = 0, ymax = 1000, zmin = -0.02, zmax = 0.02)
42  if "all" not in histName:
43  for layer in range(pixelLayers[histName]):
44  monitoringTool.defineHistogram(f"diff_pixel_locx_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
45  title=f"{name}: Layer {layer}: Local position x", xbins=200, xmin=-0.2, xmax=0.2)
46  monitoringTool.defineHistogram(f"diff_pixel_locy_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
47  title=f"{name}: Layer {layer}: Local position y", xbins=200, xmin=-0.2, xmax=0.2)
48  monitoringTool.defineHistogram(f"diff_pixel_covxx_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
49  title=f"{name}: Layer {layer}: Local covariance xx", xbins=1000, xmin=-0.001, xmax=0.001)
50  monitoringTool.defineHistogram(f"diff_pixel_covyy_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
51  title=f"{name}: Layer {layer}: Local covariance yy", xbins=1000, xmin=-0.001, xmax=0.001)
52  monitoringTool.defineHistogram(f"diff_pixel_globalX_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
53  title=f"{name}: Layer {layer}: Global position x", xbins=200, xmin=-0.05, xmax=0.05)
54  monitoringTool.defineHistogram(f"diff_pixel_globalY_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
55  title=f"{name}: Layer {layer}: Global position y", xbins=200, xmin=-0.05, xmax=0.05)
56  monitoringTool.defineHistogram(f"diff_pixel_globalZ_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
57  title=f"{name}: Layer {layer}: Global position z", xbins=200, xmin=-0.05, xmax=0.05)
58 
59 
60  if len(kwargs["stripKeys"]) == 2 and kwargs["doDiffHistograms"]:
61  key0 = kwargs["stripKeys"][0]
62  key1 = kwargs["stripKeys"][1]
63  name = f"{key0} - {key1}"
64  monitoringTool.defineHistogram("nmatched_strip_clusters_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1I", title = f"{name}: number of matched clusters", xbins = 100, xmin=0, xmax = 100)
65  monitoringTool.defineHistogram("diff_strip_locx_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:locx;Local position x;", xbins = 200, xmin = -0.2, xmax = 0.2)
66  monitoringTool.defineHistogram("diff_strip_locxZoom_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:locx;Local position x;", xbins = 200, xmin = -0.002, xmax = 0.002)
67  monitoringTool.defineHistogram("diff_strip_covxx_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:covxx;Local covariance xx;", xbins = 100, xmin = -0.1, xmax = 0.1)
68  monitoringTool.defineHistogram("diff_strip_globalx_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:globalx;Global position x;", xbins = 200, xmin = -0.1, xmax = 0.1)
69  monitoringTool.defineHistogram("diff_strip_globaly_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:globaly;Global position y;", xbins = 200, xmin = -0.1, xmax = 0.1)
70  monitoringTool.defineHistogram("diff_strip_globalz_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:globalz;Global position z;", xbins = 200, xmin = -0.1, xmax = 0.1)
71  monitoringTool.defineHistogram("diff_strip_channelsphi_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{name}:channels in phi;Channels in #phi;", xbins = 10, xmin = -5, xmax = 5)
72  monitoringTool.defineHistogram("diff_strip_rdos_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1I", title = f"{name}:rdos;number of rdos;", xbins = 101, xmin = -50.5, xmax = 50.5)
73  monitoringTool.defineHistogram(f"strip_globalZ_ref_{histName},strip_globalR_ref_{histName},diff_strip_rdos_{histName};diff_strip_RDOs_RZ", path= "FPGAOutputValidation/"+histName, type = "TProfile2D", title = f"{name}:RDOs;Z [mm];R [mm]", xbins = 300, xmin = -3000, xmax = 3000, ybins = 100, ymin = 0, ymax = 1200)
74  monitoringTool.defineHistogram(f"strip_globalZ_ref_{histName},strip_globalR_ref_{histName},diff_strip_locx_{histName};diff_strip_locx_RZ", path= "FPGAOutputValidation/"+histName, type = "TProfile2D", title = f"{name}:locx;Z [mm];R [mm]", xbins = 300, xmin = -3000, xmax = 3000, ybins = 100, ymin = 0, ymax = 1200, zmin = -0.2, zmax = 0.2)
75  if "all" not in histName:
76  for layer in range(stripLayers[histName]):
77  monitoringTool.defineHistogram(f"diff_strip_locx_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
78  title=f"{name}: Layer {layer}: Local position x", xbins=200, xmin=-0.2, xmax=0.2)
79  monitoringTool.defineHistogram(f"diff_strip_covxx_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
80  title=f"{name}: Layer {layer}: Local covariance xx", xbins=100, xmin=-0.1, xmax=0.1)
81  monitoringTool.defineHistogram(f"diff_strip_globalX_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
82  title=f"{name}: Layer {layer}: Global position x", xbins=200, xmin=-0.1, xmax=0.1)
83  monitoringTool.defineHistogram(f"diff_strip_globalY_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
84  title=f"{name}: Layer {layer}: Global position y", xbins=200, xmin=-0.1, xmax=0.1)
85  monitoringTool.defineHistogram(f"diff_strip_globalZ_{histName}Layer{layer}", path=f"FPGAOutputValidation/{histName}/layers/{layer}", type="TH1F",
86  title=f"{name}: Layer {layer}: Global position z", xbins=200, xmin=-0.1, xmax=0.1)
87 
88 
89  for key in kwargs["pixelKeys"]:
90  monitoringTool.defineHistogram(f"{key}_LOCALPOSITION_X_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_LOCALPOSITION_X;Local position x;", xbins = 800, xmin = -40, xmax = 40)
91  monitoringTool.defineHistogram(f"{key}_LOCALPOSITION_Y_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_LOCALPOSITION_Y;Local position y;", xbins = 800, xmin = -40, xmax = 40)
92 
93  monitoringTool.defineHistogram(f"{key}_LOCALCOVARIANCE_XX_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_LOCALCOVARIANCE_XX;Local covariance xx;", xbins = 1000, xmin = 0, xmax = 0.001)
94  monitoringTool.defineHistogram(f"{key}_LOCALCOVARIANCE_YY_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_LOCALCOVARIANCE_YY;Local covariance yy;", xbins = 1000, xmin = 0, xmax = 0.001)
95 
96  monitoringTool.defineHistogram(f"{key}_GLOBALPOSITION_X_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_GLOBALPOSITION_X;Global position x [mm];", xbins = 700, xmin = -350, xmax = 350)
97  monitoringTool.defineHistogram(f"{key}_GLOBALPOSITION_Y_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_GLOBALPOSITION_Y;Global position y [mm];", xbins = 700, xmin = -350, xmax = 350)
98  monitoringTool.defineHistogram(f"{key}_GLOBALPOSITION_Z_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_GLOBALPOSITION_Z;Global position z [mm];", xbins = 6000, xmin = -3000, xmax =3000)
99 
100  monitoringTool.defineHistogram(f"{key}_CHANNELS_IN_PHI_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1I", title = f"{key}_CHANNELS_IN_PHI;Channels in #phi;", xbins = 51, xmin = -0.5, xmax = 50.5)
101  monitoringTool.defineHistogram(f"{key}_CHANNELS_IN_ETA_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1I", title = f"{key}_CHANNELS_IN_ETA;Channels in #eta;", xbins = 51, xmin = -0.5, xmax = 50.5)
102 
103  monitoringTool.defineHistogram(f"{key}_WIDTH_IN_ETA_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_WIDTH_IN_ETA;Width in #eta;", xbins = 100, xmin = 0, xmax = 1)
104 
105  monitoringTool.defineHistogram(f"{key}_TOTAL_TOT_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1I", title = f"{key}_TOTAL_TOT;Total ToT;", xbins = 101, xmin = -0.5, xmax = 100.5)
106  monitoringTool.defineHistogram(f"{key}_UNMATCHED_GLOBALPOSITION_Z_{histName},{key}_UNMATCHED_GLOBALPOSITION_R_{histName};{key}_UNMATCHED_CLUSTERS_RZ", path= "FPGAOutputValidation/"+histName, type = "TH2F", title = f"{key}:Unmatched cluster position;Z [mm];R [mm]", xbins = 300, xmin = -3000, xmax = 3000, ybins = 100, ymin = 0, ymax = 1200)
107 
108  for key in kwargs["stripKeys"]:
109  monitoringTool.defineHistogram(f"{key}_LOCALPOSITIONZOOM_X_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_LOCALPOSITION_X;Local position x;", xbins = 200, xmin = -1, xmax = 1)
110  monitoringTool.defineHistogram(f"{key}_LOCALPOSITION_X_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_LOCALPOSITION_X;Local position x;", xbins = 200, xmin = -100, xmax = 100)
111  monitoringTool.defineHistogram(f"{key}_LOCALCOVARIANCE_XX_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_LOCALCOVARIANCE_XX;Local covariance xx;", xbins = 100, xmin = 0, xmax = 1)
112 
113  monitoringTool.defineHistogram(f"{key}_GLOBALPOSITION_X_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_GLOBALPOSITION_X;Global position x [mm];", xbins = 200, xmin = -1024, xmax = 1024)
114  monitoringTool.defineHistogram(f"{key}_GLOBALPOSITION_Y_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_GLOBALPOSITION_Y;Global position y [mm];", xbins = 200, xmin = -1024, xmax = 1024)
115  monitoringTool.defineHistogram(f"{key}_GLOBALPOSITION_Z_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_GLOBALPOSITION_Z;Global position z [mm];", xbins = 200, xmin = -3000, xmax = 3000)
116 
117  monitoringTool.defineHistogram(f"{key}_CHANNELS_IN_PHI_" + histName, path= "FPGAOutputValidation/"+histName, type = "TH1F", title = f"{key}_CHANNELS_IN_PHI;Channels in #phi;", xbins = 100, xmin = 0, xmax = 100)
118  monitoringTool.defineHistogram(f"{key}_UNMATCHED_GLOBALPOSITION_Z_{histName},{key}_UNMATCHED_GLOBALPOSITION_R_{histName};{key}_UNMATCHED_CLUSTERS_RZ", path= "FPGAOutputValidation/"+histName, type = "TH2F", title = f"{key}:Unmatched cluster position;Z [mm];R [mm]", xbins = 300, xmin = -3000, xmax = 3000, ybins = 100, ymin = 0, ymax = 1200)
119 
120  from AthenaConfiguration.ComponentFactory import CompFactory
121  FPGAOutputValidationAlg = CompFactory.FPGAOutputValidationAlg(
122  "FPGAOutputValidationAlg",
123  **kwargs
124  )
125 
126  FPGAOutputValidationAlg.monitoringTool = monitoringTool
127  acc.addEventAlgo(FPGAOutputValidationAlg)
128 
129  acc.addService(CompFactory.THistSvc(
130  Output=["FPGAOutputValidation DATAFILE='FPGAOutputValidation.root', OPT='RECREATE'"]
131  ))
132 
133  return acc
134 

Variable Documentation

◆ acc

FPGAOutputValidationConfig.acc

Definition at line 155 of file FPGAOutputValidationConfig.py.

◆ action

FPGAOutputValidationConfig.action

Definition at line 140 of file FPGAOutputValidationConfig.py.

◆ AODFileName

FPGAOutputValidationConfig.AODFileName

Definition at line 151 of file FPGAOutputValidationConfig.py.

◆ argumentParser

FPGAOutputValidationConfig.argumentParser

Definition at line 139 of file FPGAOutputValidationConfig.py.

◆ arguments

FPGAOutputValidationConfig.arguments

Definition at line 146 of file FPGAOutputValidationConfig.py.

◆ default

FPGAOutputValidationConfig.default

Definition at line 140 of file FPGAOutputValidationConfig.py.

◆ Files

FPGAOutputValidationConfig.Files

Definition at line 150 of file FPGAOutputValidationConfig.py.

◆ flags

FPGAOutputValidationConfig.flags

Definition at line 148 of file FPGAOutputValidationConfig.py.

◆ NumThreads

FPGAOutputValidationConfig.NumThreads

Definition at line 149 of file FPGAOutputValidationConfig.py.

◆ required

FPGAOutputValidationConfig.required

Definition at line 140 of file FPGAOutputValidationConfig.py.

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ComponentAccumulator
Definition: JetAnalysisCommon.py:302
GenericMonitoringTool
Definition: GenericMonitoringTool.h:53
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Definition: plotBeamSpotVxVal.py:194
FPGAOutputValidationConfig.FPGAOutputValidationCfg
def FPGAOutputValidationCfg(flags, **kwargs)
Definition: FPGAOutputValidationConfig.py:3
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