 |
ATLAS Offline Software
|
|
| def | F1X0IntegrationCfg (flags, name='F1X0IntegrationAlg', **kwarg) |
| |
| def | F1X0XRTIntegrationCfg (flags, name='F1X0IntegrationAlg', **kwarg) |
| |
| def | F100StreamIntegrationCfg (flags, name='F100StreamIntegrationAlg', **kwarg) |
| |
| def | F110IntegrationCfg (flags, name='F110IntegrationAlg', **kwarg) |
| |
| def | F110StreamIntegrationCfg (flags, name='F110StreamIntegrationAlg', **kwarg) |
| |
| def | F100DataEncodingCfg (flags, name='F100DataEncodingAlg', **kwarg) |
| |
| def | F100EDMConversionCfg (flags, name='F100EDMConversionAlg', **kwarg) |
| |
| def | FPGAClusterSortingCfg (flags, **kwargs) |
| |
| def | F100FlagsCfg (flags) |
| |
| def | FPGADataPreparation (flags, runStandalone=False) |
| |
◆ F100DataEncodingCfg()
| def F100IntegrationConfig.F100DataEncodingCfg |
( |
|
flags, |
|
|
|
name = 'F100DataEncodingAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 167 of file F100IntegrationConfig.py.
171 if(
"FPGADataFormatTool" not in kwarg):
172 from EFTrackingFPGAPipeline.DataPrepConfig
import FPGADataFormatToolCfg
174 kwarg.setdefault(
'FPGADataFormatTool', dataFormatTool)
176 kwarg.setdefault(
'isRoI_Seeded',
False)
178 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100DataEncodingAlg(name, **kwarg))
◆ F100EDMConversionCfg()
| def F100IntegrationConfig.F100EDMConversionCfg |
( |
|
flags, |
|
|
|
name = 'F100EDMConversionAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 182 of file F100IntegrationConfig.py.
186 if(
"xAODClusterMaker" not in kwarg):
187 from EFTrackingFPGAPipeline.DataPrepConfig
import xAODClusterMakerCfg
189 kwarg.setdefault(
'xAODClusterMaker', clusterMakerTool)
191 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100EDMConversionAlg(name, **kwarg))
◆ F100FlagsCfg()
| def F100IntegrationConfig.F100FlagsCfg |
( |
|
flags | ) |
|
Definition at line 204 of file F100IntegrationConfig.py.
205 flags.Scheduler.ShowDataDeps=
True
206 flags.Scheduler.CheckDependencies=
True
207 flags.Debug.DumpEvtStore=
False
◆ F100StreamIntegrationCfg()
| def F100IntegrationConfig.F100StreamIntegrationCfg |
( |
|
flags, |
|
|
|
name = 'F100StreamIntegrationAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 77 of file F100IntegrationConfig.py.
80 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
81 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
82 kwarg.setdefault(
'PixelStartClusterKernelName',
'loaderPixel')
83 kwarg.setdefault(
'PixelEndClusterKernelName',
'unloaderPixelCluster')
84 kwarg.setdefault(
'PixelEndClusterEdmKernelName',
'unloaderPixelEdm')
86 kwarg.setdefault(
'StripStartClusterKernelName',
'loaderStrip')
87 kwarg.setdefault(
'StripEndClusterKernelName',
'unloaderStrip')
88 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
89 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
90 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
91 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
93 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
94 if 'RegSelTool' not in kwarg:
95 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
99 acc.addService(CompFactory.ChronoStatSvc(
100 PrintUserTime =
True,
101 PrintSystemTime =
True,
102 PrintEllapsedTime =
True
105 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100StreamIntegrationAlg(name, **kwarg))
◆ F110IntegrationCfg()
| def F100IntegrationConfig.F110IntegrationCfg |
( |
|
flags, |
|
|
|
name = 'F110IntegrationAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 109 of file F100IntegrationConfig.py.
112 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
113 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
114 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
115 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
116 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
117 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
118 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
120 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
121 if 'RegSelTool' not in kwarg:
122 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
126 acc.addService(CompFactory.ChronoStatSvc(
127 PrintUserTime =
True,
128 PrintSystemTime =
True,
129 PrintEllapsedTime =
True
132 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110IntegrationAlg(name, **kwarg))
◆ F110StreamIntegrationCfg()
| def F100IntegrationConfig.F110StreamIntegrationCfg |
( |
|
flags, |
|
|
|
name = 'F110StreamIntegrationAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 136 of file F100IntegrationConfig.py.
139 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
140 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
141 kwarg.setdefault(
'PixelStartClusterKernelName',
'pixelLoader')
142 kwarg.setdefault(
'PixelEndClusterKernelName',
'pixelUnloader')
144 kwarg.setdefault(
'StripStartClusterKernelName',
'stripLoader')
145 kwarg.setdefault(
'StripEndClusterKernelName',
'stripUnloader')
146 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
147 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
148 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
150 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
151 if 'RegSelTool' not in kwarg:
152 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
156 acc.addService(CompFactory.ChronoStatSvc(
157 PrintUserTime =
True,
158 PrintSystemTime =
True,
159 PrintEllapsedTime =
True
162 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110StreamIntegrationAlg(name, **kwarg))
◆ F1X0IntegrationCfg()
| def F100IntegrationConfig.F1X0IntegrationCfg |
( |
|
flags, |
|
|
|
name = 'F1X0IntegrationAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 7 of file F100IntegrationConfig.py.
10 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
11 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
12 if(flags.FPGADataPrep.doF110):
13 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
15 kwarg.setdefault(
'PixelClusterKernelName',
'pixclustering_top_v1_0')
16 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
17 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
18 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
19 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
20 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
21 kwarg.setdefault(
'doF110', flags.FPGADataPrep.doF110)
23 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
24 if 'RegSelTool' not in kwarg:
25 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
29 acc.addService(CompFactory.ChronoStatSvc(
31 PrintSystemTime =
True,
32 PrintEllapsedTime =
True
35 from AthenaMonitoringKernel.GenericMonitoringTool
import GenericMonitoringTool
37 montool.defineHistogram(
'TIME_Total',path=
'EXPERT',type=
'TH1F',title=
"Total time (ms)", xbins = 400, xmin=0.0, xmax=2000.0)
39 kwarg.setdefault(
'MonTool', montool)
41 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0IntegrationAlg(name, **kwarg))
◆ F1X0XRTIntegrationCfg()
| def F100IntegrationConfig.F1X0XRTIntegrationCfg |
( |
|
flags, |
|
|
|
name = 'F1X0IntegrationAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 45 of file F100IntegrationConfig.py.
48 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
49 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
50 if(flags.FPGADataPrep.doF110):
51 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
53 kwarg.setdefault(
'PixelClusterKernelName',
'pixclustering_top_v1_0')
54 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
55 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
56 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
57 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
58 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
59 kwarg.setdefault(
'doF110', flags.FPGADataPrep.doF110)
61 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
62 if 'RegSelTool' not in kwarg:
63 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
67 acc.addService(CompFactory.ChronoStatSvc(
69 PrintSystemTime =
True,
70 PrintEllapsedTime =
True
73 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0XRTIntegrationAlg(name, **kwarg))
◆ FPGAClusterSortingCfg()
| def F100IntegrationConfig.FPGAClusterSortingCfg |
( |
|
flags, |
|
|
** |
kwargs |
|
) |
| |
Definition at line 196 of file F100IntegrationConfig.py.
198 from FPGAClusterSorting.FPGAClusterSortingConfig
import FPGAClusterSortingAlgCfg
201 acc.merge(ClusterSorting)
◆ FPGADataPreparation()
| def F100IntegrationConfig.FPGADataPreparation |
( |
|
flags, |
|
|
|
runStandalone = False |
|
) |
| |
Definition at line 212 of file F100IntegrationConfig.py.
214 kwargs.setdefault(
'FPGAThreads', flags.Concurrency.NumThreads)
218 if(flags.FPGADataPrep.doCodeType ==
"F1X0"):
220 elif(flags.FPGADataPrep.doCodeType ==
"F1X0XRT"):
222 elif(flags.FPGADataPrep.doCodeType ==
"F100Stream"):
224 elif(flags.FPGADataPrep.doCodeType ==
"F110"):
226 elif(flags.FPGADataPrep.doCodeType ==
"F110Stream"):
229 print(
"Code Type is not recognized")
233 acc.merge(
FPGAClusterSortingCfg(flags,**{
'sortedxAODPixelClusterContainer':
'SortedFPGAPixelClusters' if runStandalone
else 'ITkPixelClusters',
234 'sortedxAODStripClusterContainer':
'SortedFPGAStripClusters' if runStandalone
else 'ITkStripClusters'}))
236 if(
not runStandalone):
237 if(
not flags.FPGADataPrep.ForTiming):
238 from FPGATrackSimReporting.FPGATrackSimReportingConfig
import FPGATrackSimReportingCfg
240 perEventReports =
False,
241 **{
'xAODPixelClusterContainers' : [
'ITkPixelClusters'],
242 'xAODStripClusterContainers' : [
'ITkStripClusters'],
243 'FPGAActsTracks' : [f
'{flags.Tracking.ActiveConfig.extension}Tracks',f
'SiSPTracksSeedSegments{flags.Tracking.ActiveConfig.extension}PixelTracks'],
244 'isDataPrep':
True} ))
246 from PixelConditionsAlgorithms.ITkPixelConditionsConfig
import ITkPixelDetectorElementStatusAlgCfg
249 from SCT_ConditionsAlgorithms.ITkStripConditionsAlgorithmsConfig
import ITkStripDetectorElementStatusAlgCfg
252 if flags.Acts.EDM.PersistifyClusters
or flags.Acts.EDM.PersistifySpacePoints:
255 pixel_cluster_shortlist = [
'-pixelClusterLink']
256 strip_cluster_shortlist = [
'-sctClusterLink']
258 pixel_cluster_variables =
'.'.
join(pixel_cluster_shortlist)
259 strip_cluster_variables =
'.'.
join(strip_cluster_shortlist)
261 toAOD += [
'xAOD::PixelClusterContainer#ITkPixelClusters',
262 'xAOD::PixelClusterAuxContainer#ITkPixelClustersAux.' + pixel_cluster_variables,
263 'xAOD::StripClusterContainer#ITkStripClusters',
264 'xAOD::StripClusterAuxContainer#ITkStripClustersAux.' + strip_cluster_variables]
265 from OutputStreamAthenaPool.OutputStreamConfig
import addToAOD
◆ AODFileName
| F100IntegrationConfig.AODFileName |
◆ cfg
| F100IntegrationConfig.cfg |
◆ ClusterOnly
| F100IntegrationConfig.ClusterOnly |
◆ createMetadata
| F100IntegrationConfig.createMetadata |
◆ DoActs
| F100IntegrationConfig.DoActs |
◆ doActsSeed
| F100IntegrationConfig.doActsSeed |
◆ doAthenaSpacePoint
| F100IntegrationConfig.doAthenaSpacePoint |
◆ doAthenaToActsCluster
| F100IntegrationConfig.doAthenaToActsCluster |
◆ doAthenaToActsSpacePoint
| F100IntegrationConfig.doAthenaToActsSpacePoint |
◆ doRotCorrection
| F100IntegrationConfig.doRotCorrection |
◆ doTruth
| F100IntegrationConfig.doTruth |
◆ DumpEvtStore
| F100IntegrationConfig.DumpEvtStore |
◆ EnableCalo
| F100IntegrationConfig.EnableCalo |
◆ Files
| F100IntegrationConfig.Files |
◆ FinalTracks
| F100IntegrationConfig.FinalTracks |
◆ flags
| F100IntegrationConfig.flags |
◆ keepOriginal
| F100IntegrationConfig.keepOriginal |
◆ NumThreads
| F100IntegrationConfig.NumThreads |
◆ OutputItemList
| F100IntegrationConfig.OutputItemList |
◆ OutputLevel
| F100IntegrationConfig.OutputLevel |
◆ runStandalone
| F100IntegrationConfig.runStandalone |
◆ summariseProps
| F100IntegrationConfig.summariseProps |
◆ True
| F100IntegrationConfig.True |
◆ useCache
| F100IntegrationConfig.useCache |
◆ withDetails
| F100IntegrationConfig.withDetails |
def F1X0IntegrationCfg(flags, name='F1X0IntegrationAlg', **kwarg)
def F110StreamIntegrationCfg(flags, name='F110StreamIntegrationAlg', **kwarg)
def ITkPixelDetectorElementStatusAlgCfg(flags, name="ITkPixelDetectorElementStatusAlg", **kwargs)
def F100DataEncodingCfg(flags, name='F100DataEncodingAlg', **kwarg)
def FPGAClusterSortingAlgCfg(flags, name="FPGAClusterSortingAlg", **kwargs)
def FPGADataFormatToolCfg(flags, name='FPGADataFormatTool', **kwargs)
def ITkStripDetectorElementStatusAlgCfg(flags, name="ITkStripDetectorElementStatusAlg", **kwargs)
def FPGAClusterSortingCfg(flags, **kwargs)
def F100StreamIntegrationCfg(flags, name='F100StreamIntegrationAlg', **kwarg)
def FPGADataPreparation(flags, runStandalone=False)
void print(char *figname, TCanvas *c1)
std::string join(const std::vector< std::string > &v, const char c=',')
def xAODClusterMakerCfg(flags, name='xAODClusterMaker', **kwarg)
def F1X0XRTIntegrationCfg(flags, name='F1X0IntegrationAlg', **kwarg)
def addToAOD(flags, itemOrList, **kwargs)
def FPGATrackSimReportingCfg(flags, name='FPGATrackSimReportingAlg', **kwargs)
def F110IntegrationCfg(flags, name='F110IntegrationAlg', **kwarg)
def F100EDMConversionCfg(flags, name='F100EDMConversionAlg', **kwarg)