 |
ATLAS Offline Software
|
|
| def | F1X0IntegrationCfg (flags, name='F1X0IntegrationAlg', **kwarg) |
| |
| def | F1X0XRTIntegrationCfg (flags, name='F1X0IntegrationAlg', **kwarg) |
| |
| def | F100StreamIntegrationCfg (flags, name='F100StreamIntegrationAlg', **kwarg) |
| |
| def | F110IntegrationCfg (flags, name='F110IntegrationAlg', **kwarg) |
| |
| def | F110StreamIntegrationCfg (flags, name='F110StreamIntegrationAlg', **kwarg) |
| |
| def | F100DataEncodingCfg (flags, name='F100DataEncodingAlg', **kwarg) |
| |
| def | F100EDMConversionCfg (flags, name='F100EDMConversionAlg', **kwarg) |
| |
| def | FPGAClusterSortingCfg (flags, **kwargs) |
| |
| def | F100FlagsCfg (flags) |
| |
| def | FPGADataPreparation (flags, runStandalone=False) |
| |
◆ F100DataEncodingCfg()
| def F100IntegrationConfig.F100DataEncodingCfg |
( |
|
flags, |
|
|
|
name = 'F100DataEncodingAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 164 of file F100IntegrationConfig.py.
168 if(
"FPGADataFormatTool" not in kwarg):
169 from EFTrackingFPGAPipeline.DataPrepConfig
import FPGADataFormatToolCfg
171 kwarg.setdefault(
'FPGADataFormatTool', dataFormatTool)
173 kwarg.setdefault(
'isRoI_Seeded',
False)
175 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100DataEncodingAlg(name, **kwarg))
◆ F100EDMConversionCfg()
| def F100IntegrationConfig.F100EDMConversionCfg |
( |
|
flags, |
|
|
|
name = 'F100EDMConversionAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 179 of file F100IntegrationConfig.py.
182 from ActsConfig.ActsUtilities
import extractChildKwargs
185 if(
"xAODClusterMaker" not in kwarg):
186 from EFTrackingFPGAPipeline.DataPrepConfig
import xAODClusterMakerCfg
187 clusterMakerTool = acc.popToolsAndMerge(
xAODClusterMakerCfg(flags,name=
"xAODClusterMakerTool",
189 kwarg.setdefault(
'F100EDMConversionAlg.xAODClusterMaker', clusterMakerTool)
191 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100EDMConversionAlg(name,
◆ F100FlagsCfg()
| def F100IntegrationConfig.F100FlagsCfg |
( |
|
flags | ) |
|
Definition at line 205 of file F100IntegrationConfig.py.
206 flags.Scheduler.ShowDataDeps=
True
207 flags.Scheduler.CheckDependencies=
True
208 flags.Debug.DumpEvtStore=
False
◆ F100StreamIntegrationCfg()
| def F100IntegrationConfig.F100StreamIntegrationCfg |
( |
|
flags, |
|
|
|
name = 'F100StreamIntegrationAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 77 of file F100IntegrationConfig.py.
80 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
81 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
82 kwarg.setdefault(
'PixelStartClusterKernelName',
'loaderPixel')
83 kwarg.setdefault(
'PixelEndClusterKernelName',
'unloaderPixelCluster')
84 kwarg.setdefault(
'PixelEndClusterEdmKernelName',
'unloaderPixelEdm')
86 kwarg.setdefault(
'StripStartClusterKernelName',
'loaderStrip')
87 kwarg.setdefault(
'StripEndClusterKernelName',
'unloaderStrip')
88 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
89 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
90 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
91 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
93 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
94 if 'RegSelTool' not in kwarg:
95 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
99 acc.addService(CompFactory.ChronoStatSvc(
100 PrintUserTime =
True,
101 PrintSystemTime =
True,
102 PrintEllapsedTime =
True
105 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100StreamIntegrationAlg(name, **kwarg))
◆ F110IntegrationCfg()
| def F100IntegrationConfig.F110IntegrationCfg |
( |
|
flags, |
|
|
|
name = 'F110IntegrationAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 109 of file F100IntegrationConfig.py.
112 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
113 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
114 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
115 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
116 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
117 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
118 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
120 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
121 if 'RegSelTool' not in kwarg:
122 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
126 acc.addService(CompFactory.ChronoStatSvc(
127 PrintUserTime =
True,
128 PrintSystemTime =
True,
129 PrintEllapsedTime =
True
132 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110IntegrationAlg(name, **kwarg))
◆ F110StreamIntegrationCfg()
| def F100IntegrationConfig.F110StreamIntegrationCfg |
( |
|
flags, |
|
|
|
name = 'F110StreamIntegrationAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 136 of file F100IntegrationConfig.py.
139 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
140 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
141 kwarg.setdefault(
'PixelStartClusterKernelName',
'pixelLoader')
142 kwarg.setdefault(
'PixelEndClusterKernelName',
'PixelEDMWriter')
144 kwarg.setdefault(
'StripStartClusterKernelName',
'stripLoader')
145 kwarg.setdefault(
'StripEndClusterKernelName',
'StripEDMWriter')
147 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
148 if 'RegSelTool' not in kwarg:
149 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
153 acc.addService(CompFactory.ChronoStatSvc(
154 PrintUserTime =
True,
155 PrintSystemTime =
True,
156 PrintEllapsedTime =
True
159 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110StreamIntegrationAlg(name, **kwarg))
◆ F1X0IntegrationCfg()
| def F100IntegrationConfig.F1X0IntegrationCfg |
( |
|
flags, |
|
|
|
name = 'F1X0IntegrationAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 7 of file F100IntegrationConfig.py.
10 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
11 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
12 if(flags.FPGADataPrep.doF110):
13 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
15 kwarg.setdefault(
'PixelClusterKernelName',
'pixclustering_top_v1_0')
16 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
17 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
18 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
19 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
20 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
21 kwarg.setdefault(
'doF110', flags.FPGADataPrep.doF110)
23 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
24 if 'RegSelTool' not in kwarg:
25 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
29 acc.addService(CompFactory.ChronoStatSvc(
31 PrintSystemTime =
True,
32 PrintEllapsedTime =
True
35 from AthenaMonitoringKernel.GenericMonitoringTool
import GenericMonitoringTool
37 montool.defineHistogram(
'TIME_Total',path=
'EXPERT',type=
'TH1F',title=
"Total time (ms)", xbins = 400, xmin=0.0, xmax=2000.0)
39 kwarg.setdefault(
'MonTool', montool)
41 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0IntegrationAlg(name, **kwarg))
◆ F1X0XRTIntegrationCfg()
| def F100IntegrationConfig.F1X0XRTIntegrationCfg |
( |
|
flags, |
|
|
|
name = 'F1X0IntegrationAlg', |
|
|
** |
kwarg |
|
) |
| |
Definition at line 45 of file F100IntegrationConfig.py.
48 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
49 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
50 if(flags.FPGADataPrep.doF110):
51 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
53 kwarg.setdefault(
'PixelClusterKernelName',
'pixclustering_top_v1_0')
54 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
55 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
56 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
57 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
58 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
59 kwarg.setdefault(
'doF110', flags.FPGADataPrep.doF110)
61 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
62 if 'RegSelTool' not in kwarg:
63 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
67 acc.addService(CompFactory.ChronoStatSvc(
69 PrintSystemTime =
True,
70 PrintEllapsedTime =
True
73 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0XRTIntegrationAlg(name, **kwarg))
◆ FPGAClusterSortingCfg()
| def F100IntegrationConfig.FPGAClusterSortingCfg |
( |
|
flags, |
|
|
** |
kwargs |
|
) |
| |
Definition at line 197 of file F100IntegrationConfig.py.
199 from FPGAClusterSorting.FPGAClusterSortingConfig
import FPGAClusterSortingAlgCfg
202 acc.merge(ClusterSorting)
◆ FPGADataPreparation()
| def F100IntegrationConfig.FPGADataPreparation |
( |
|
flags, |
|
|
|
runStandalone = False |
|
) |
| |
Definition at line 213 of file F100IntegrationConfig.py.
215 kwargs.setdefault(
'FPGAThreads', flags.Concurrency.NumThreads)
219 if(flags.FPGADataPrep.doCodeType ==
"F1X0"):
221 elif(flags.FPGADataPrep.doCodeType ==
"F1X0XRT"):
223 elif(flags.FPGADataPrep.doCodeType ==
"F100Stream"):
225 elif(flags.FPGADataPrep.doCodeType ==
"F110"):
227 elif(flags.FPGADataPrep.doCodeType ==
"F110Stream"):
230 print(
"Code Type is not recognized")
234 **{
'xAODClusterMakerTool.PixelClusterContainerKey':
235 'FPGAPixelClusters' if flags.FPGADataPrep.DoClusterSorting
else'ITkPixelClusters',
236 'xAODClusterMakerTool.StripClusterContainerKey':
237 'FPGAStripClusters' if flags.FPGADataPrep.DoClusterSorting
else 'ITkStripClusters'}))
238 if(flags.FPGADataPrep.DoClusterSorting):
240 **{
'sortedxAODPixelClusterContainer':
241 'SortedFPGAPixelClusters' if runStandalone
else 'ITkPixelClusters',
242 'sortedxAODStripClusterContainer':
243 'SortedFPGAStripClusters' if runStandalone
else 'ITkStripClusters'}))
245 if(
not runStandalone):
246 if(
not flags.FPGADataPrep.ForTiming):
247 from FPGATrackSimReporting.FPGATrackSimReportingConfig
import FPGATrackSimReportingCfg
249 perEventReports =
False,
250 **{
'xAODPixelClusterContainers' : [
'ITkPixelClusters'],
251 'xAODStripClusterContainers' : [
'ITkStripClusters'],
252 'FPGAActsTracks' : [],
253 'isDataPrep':
True} ))
255 from PixelConditionsAlgorithms.ITkPixelConditionsConfig
import ITkPixelDetectorElementStatusAlgCfg
258 from SCT_ConditionsAlgorithms.ITkStripConditionsAlgorithmsConfig
import ITkStripDetectorElementStatusAlgCfg
261 if flags.Acts.EDM.PersistifyClusters
or flags.Acts.EDM.PersistifySpacePoints:
264 pixel_cluster_shortlist = [
'-pixelClusterLink']
265 strip_cluster_shortlist = [
'-sctClusterLink']
267 pixel_cluster_variables =
'.'.
join(pixel_cluster_shortlist)
268 strip_cluster_variables =
'.'.
join(strip_cluster_shortlist)
270 toAOD += [
'xAOD::PixelClusterContainer#ITkPixelClusters',
271 'xAOD::PixelClusterAuxContainer#ITkPixelClustersAux.' + pixel_cluster_variables,
272 'xAOD::StripClusterContainer#ITkStripClusters',
273 'xAOD::StripClusterAuxContainer#ITkStripClustersAux.' + strip_cluster_variables]
274 from OutputStreamAthenaPool.OutputStreamConfig
import addToAOD
◆ AODFileName
| F100IntegrationConfig.AODFileName |
◆ cfg
| F100IntegrationConfig.cfg |
◆ ClusterOnly
| F100IntegrationConfig.ClusterOnly |
◆ createMetadata
| F100IntegrationConfig.createMetadata |
◆ DoActs
| F100IntegrationConfig.DoActs |
◆ doActsSeed
| F100IntegrationConfig.doActsSeed |
◆ doAthenaSpacePoint
| F100IntegrationConfig.doAthenaSpacePoint |
◆ doAthenaToActsCluster
| F100IntegrationConfig.doAthenaToActsCluster |
◆ doAthenaToActsSpacePoint
| F100IntegrationConfig.doAthenaToActsSpacePoint |
◆ doRotCorrection
| F100IntegrationConfig.doRotCorrection |
◆ doTruth
| F100IntegrationConfig.doTruth |
◆ DumpEvtStore
| F100IntegrationConfig.DumpEvtStore |
◆ EnableCalo
| F100IntegrationConfig.EnableCalo |
◆ Files
| F100IntegrationConfig.Files |
◆ FinalTracks
| F100IntegrationConfig.FinalTracks |
◆ flags
| F100IntegrationConfig.flags |
◆ keepOriginal
| F100IntegrationConfig.keepOriginal |
◆ NumThreads
| F100IntegrationConfig.NumThreads |
◆ OutputItemList
| F100IntegrationConfig.OutputItemList |
◆ OutputLevel
| F100IntegrationConfig.OutputLevel |
◆ runStandalone
| F100IntegrationConfig.runStandalone |
◆ summariseProps
| F100IntegrationConfig.summariseProps |
◆ True
| F100IntegrationConfig.True |
◆ useCache
| F100IntegrationConfig.useCache |
◆ withDetails
| F100IntegrationConfig.withDetails |
def F1X0IntegrationCfg(flags, name='F1X0IntegrationAlg', **kwarg)
dict extractChildKwargs(*str prefix, **dict kwargs)
def F110StreamIntegrationCfg(flags, name='F110StreamIntegrationAlg', **kwarg)
def ITkPixelDetectorElementStatusAlgCfg(flags, name="ITkPixelDetectorElementStatusAlg", **kwargs)
def F100DataEncodingCfg(flags, name='F100DataEncodingAlg', **kwarg)
def FPGAClusterSortingAlgCfg(flags, name="FPGAClusterSortingAlg", **kwargs)
def FPGADataFormatToolCfg(flags, name='FPGADataFormatTool', **kwargs)
def ITkStripDetectorElementStatusAlgCfg(flags, name="ITkStripDetectorElementStatusAlg", **kwargs)
def FPGAClusterSortingCfg(flags, **kwargs)
def F100StreamIntegrationCfg(flags, name='F100StreamIntegrationAlg', **kwarg)
def FPGADataPreparation(flags, runStandalone=False)
void print(char *figname, TCanvas *c1)
std::string join(const std::vector< std::string > &v, const char c=',')
def xAODClusterMakerCfg(flags, name='xAODClusterMaker', **kwarg)
def F1X0XRTIntegrationCfg(flags, name='F1X0IntegrationAlg', **kwarg)
def addToAOD(flags, itemOrList, **kwargs)
def FPGATrackSimReportingCfg(flags, name='FPGATrackSimReportingAlg', **kwargs)
def F110IntegrationCfg(flags, name='F110IntegrationAlg', **kwarg)
def F100EDMConversionCfg(flags, name='F100EDMConversionAlg', **kwarg)