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ATLAS Offline Software
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def | F1X0IntegrationCfg (flags, name='F1X0IntegrationAlg', **kwarg) |
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def | F1X0XRTIntegrationCfg (flags, name='F1X0IntegrationAlg', **kwarg) |
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def | F100StreamIntegrationCfg (flags, name='F100StreamIntegrationAlg', **kwarg) |
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def | F110IntegrationCfg (flags, name='F110IntegrationAlg', **kwarg) |
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def | F110StreamIntegrationCfg (flags, name='F110StreamIntegrationAlg', **kwarg) |
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def | F100DataEncodingCfg (flags, name='F100DataEncodingAlg', **kwarg) |
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def | F100EDMConversionCfg (flags, name='F100EDMConversionAlg', **kwarg) |
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def | FPGAClusterSortingCfg (flags, **kwargs) |
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def | F100FlagsCfg (flags) |
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def | FPGADataPreparation (flags, runStandalone=False) |
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◆ F100DataEncodingCfg()
def F100IntegrationConfig.F100DataEncodingCfg |
( |
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flags, |
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name = 'F100DataEncodingAlg' , |
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** |
kwarg |
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) |
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Definition at line 161 of file F100IntegrationConfig.py.
165 if(
"FPGADataFormatTool" not in kwarg):
166 from EFTrackingFPGAPipeline.DataPrepConfig
import FPGADataFormatToolCfg
168 kwarg.setdefault(
'FPGADataFormatTool', dataFormatTool)
170 kwarg.setdefault(
'isRoI_Seeded',
False)
172 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100DataEncodingAlg(name, **kwarg))
◆ F100EDMConversionCfg()
def F100IntegrationConfig.F100EDMConversionCfg |
( |
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flags, |
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name = 'F100EDMConversionAlg' , |
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** |
kwarg |
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) |
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Definition at line 176 of file F100IntegrationConfig.py.
180 if(
"xAODClusterMaker" not in kwarg):
181 from EFTrackingFPGAPipeline.DataPrepConfig
import xAODClusterMakerCfg
183 kwarg.setdefault(
'xAODClusterMaker', clusterMakerTool)
185 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100EDMConversionAlg(name, **kwarg))
◆ F100FlagsCfg()
def F100IntegrationConfig.F100FlagsCfg |
( |
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flags | ) |
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Definition at line 198 of file F100IntegrationConfig.py.
199 flags.Scheduler.ShowDataDeps=
True
200 flags.Scheduler.CheckDependencies=
True
201 flags.Debug.DumpEvtStore=
False
◆ F100StreamIntegrationCfg()
def F100IntegrationConfig.F100StreamIntegrationCfg |
( |
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flags, |
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name = 'F100StreamIntegrationAlg' , |
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** |
kwarg |
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) |
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Definition at line 71 of file F100IntegrationConfig.py.
74 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
75 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
76 kwarg.setdefault(
'PixelStartClusterKernelName',
'loaderPixel')
77 kwarg.setdefault(
'PixelEndClusterKernelName',
'unloaderPixelCluster')
78 kwarg.setdefault(
'PixelEndClusterEdmKernelName',
'unloaderPixelEdm')
80 kwarg.setdefault(
'StripStartClusterKernelName',
'loaderStrip')
81 kwarg.setdefault(
'StripEndClusterKernelName',
'unloaderStrip')
82 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
83 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
84 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
85 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
87 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
88 if 'RegSelTool' not in kwarg:
89 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
93 acc.addService(CompFactory.ChronoStatSvc(
95 PrintSystemTime =
True,
96 PrintEllapsedTime =
True
99 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100StreamIntegrationAlg(name, **kwarg))
◆ F110IntegrationCfg()
def F100IntegrationConfig.F110IntegrationCfg |
( |
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flags, |
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name = 'F110IntegrationAlg' , |
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** |
kwarg |
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) |
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Definition at line 103 of file F100IntegrationConfig.py.
106 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
107 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
108 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
109 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
110 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
111 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
112 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
114 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
115 if 'RegSelTool' not in kwarg:
116 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
120 acc.addService(CompFactory.ChronoStatSvc(
121 PrintUserTime =
True,
122 PrintSystemTime =
True,
123 PrintEllapsedTime =
True
126 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110IntegrationAlg(name, **kwarg))
◆ F110StreamIntegrationCfg()
def F100IntegrationConfig.F110StreamIntegrationCfg |
( |
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flags, |
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name = 'F110StreamIntegrationAlg' , |
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** |
kwarg |
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) |
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Definition at line 130 of file F100IntegrationConfig.py.
133 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
134 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
135 kwarg.setdefault(
'PixelStartClusterKernelName',
'pixelLoader')
136 kwarg.setdefault(
'PixelEndClusterKernelName',
'pixelUnloader')
138 kwarg.setdefault(
'StripStartClusterKernelName',
'stripLoader')
139 kwarg.setdefault(
'StripEndClusterKernelName',
'stripUnloader')
140 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
141 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
142 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
144 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
145 if 'RegSelTool' not in kwarg:
146 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
150 acc.addService(CompFactory.ChronoStatSvc(
151 PrintUserTime =
True,
152 PrintSystemTime =
True,
153 PrintEllapsedTime =
True
156 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110StreamIntegrationAlg(name, **kwarg))
◆ F1X0IntegrationCfg()
def F100IntegrationConfig.F1X0IntegrationCfg |
( |
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flags, |
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name = 'F1X0IntegrationAlg' , |
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** |
kwarg |
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) |
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Definition at line 7 of file F100IntegrationConfig.py.
10 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
11 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
12 if(flags.FPGADataPrep.doF110):
13 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
15 kwarg.setdefault(
'PixelClusterKernelName',
'pixclustering_top_v1_0')
16 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
17 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
18 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
19 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
20 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
21 kwarg.setdefault(
'doF110', flags.FPGADataPrep.doF110)
23 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
24 if 'RegSelTool' not in kwarg:
25 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
29 acc.addService(CompFactory.ChronoStatSvc(
31 PrintSystemTime =
True,
32 PrintEllapsedTime =
True
35 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0IntegrationAlg(name, **kwarg))
◆ F1X0XRTIntegrationCfg()
def F100IntegrationConfig.F1X0XRTIntegrationCfg |
( |
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flags, |
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name = 'F1X0IntegrationAlg' , |
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** |
kwarg |
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) |
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Definition at line 39 of file F100IntegrationConfig.py.
42 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
43 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
44 if(flags.FPGADataPrep.doF110):
45 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
47 kwarg.setdefault(
'PixelClusterKernelName',
'pixclustering_top_v1_0')
48 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
49 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
50 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
51 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
52 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
53 kwarg.setdefault(
'doF110', flags.FPGADataPrep.doF110)
55 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
56 if 'RegSelTool' not in kwarg:
57 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
61 acc.addService(CompFactory.ChronoStatSvc(
63 PrintSystemTime =
True,
64 PrintEllapsedTime =
True
67 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0XRTIntegrationAlg(name, **kwarg))
◆ FPGAClusterSortingCfg()
def F100IntegrationConfig.FPGAClusterSortingCfg |
( |
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flags, |
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** |
kwargs |
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) |
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Definition at line 190 of file F100IntegrationConfig.py.
192 from FPGAClusterSorting.FPGAClusterSortingConfig
import FPGAClusterSortingAlgCfg
195 acc.merge(ClusterSorting)
◆ FPGADataPreparation()
def F100IntegrationConfig.FPGADataPreparation |
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flags, |
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runStandalone = False |
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) |
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Definition at line 206 of file F100IntegrationConfig.py.
208 kwargs.setdefault(
'FPGAThreads', flags.Concurrency.NumThreads)
212 if(flags.FPGADataPrep.doCodeType ==
"F1X0"):
214 elif(flags.FPGADataPrep.doCodeType ==
"F1X0XRT"):
216 elif(flags.FPGADataPrep.doCodeType ==
"F100Stream"):
218 elif(flags.FPGADataPrep.doCodeType ==
"F110"):
220 elif(flags.FPGADataPrep.doCodeType ==
"F110Stream"):
223 print(
"Code Type is not recognized")
227 acc.merge(
FPGAClusterSortingCfg(flags,**{
'sortedxAODPixelClusterContainer':
'SortedFPGAPixelClusters' if runStandalone
else 'ITkPixelClusters',
228 'sortedxAODStripClusterContainer':
'SortedFPGAStripClusters' if runStandalone
else 'ITkStripClusters'}))
230 if(
not runStandalone):
231 if(
not flags.FPGADataPrep.ForTiming):
232 from FPGATrackSimReporting.FPGATrackSimReportingConfig
import FPGATrackSimReportingCfg
234 perEventReports =
False,
235 **{
'xAODPixelClusterContainers' : [
'ITkPixelClusters'],
236 'xAODStripClusterContainers' : [
'ITkStripClusters'],
237 'FPGAActsTracks' : [f
'{flags.Tracking.ActiveConfig.extension}Tracks',f
'SiSPTracksSeedSegments{flags.Tracking.ActiveConfig.extension}PixelTracks'],
238 'isDataPrep':
True} ))
240 from PixelConditionsAlgorithms.ITkPixelConditionsConfig
import ITkPixelDetectorElementStatusAlgCfg
243 from SCT_ConditionsAlgorithms.ITkStripConditionsAlgorithmsConfig
import ITkStripDetectorElementStatusAlgCfg
246 if flags.Acts.EDM.PersistifyClusters
or flags.Acts.EDM.PersistifySpacePoints:
249 pixel_cluster_shortlist = [
'-pixelClusterLink']
250 strip_cluster_shortlist = [
'-sctClusterLink']
252 pixel_cluster_variables =
'.'.
join(pixel_cluster_shortlist)
253 strip_cluster_variables =
'.'.
join(strip_cluster_shortlist)
255 toAOD += [
'xAOD::PixelClusterContainer#ITkPixelClusters',
256 'xAOD::PixelClusterAuxContainer#ITkPixelClustersAux.' + pixel_cluster_variables,
257 'xAOD::StripClusterContainer#ITkStripClusters',
258 'xAOD::StripClusterAuxContainer#ITkStripClustersAux.' + strip_cluster_variables]
259 from OutputStreamAthenaPool.OutputStreamConfig
import addToAOD
◆ AODFileName
F100IntegrationConfig.AODFileName |
◆ cfg
F100IntegrationConfig.cfg |
◆ ClusterOnly
F100IntegrationConfig.ClusterOnly |
◆ createMetadata
F100IntegrationConfig.createMetadata |
◆ DoActs
F100IntegrationConfig.DoActs |
◆ doActsSeed
F100IntegrationConfig.doActsSeed |
◆ doAthenaSpacePoint
F100IntegrationConfig.doAthenaSpacePoint |
◆ doAthenaToActsCluster
F100IntegrationConfig.doAthenaToActsCluster |
◆ doAthenaToActsSpacePoint
F100IntegrationConfig.doAthenaToActsSpacePoint |
◆ doRotCorrection
F100IntegrationConfig.doRotCorrection |
◆ doTruth
F100IntegrationConfig.doTruth |
◆ DumpEvtStore
F100IntegrationConfig.DumpEvtStore |
◆ EnableCalo
F100IntegrationConfig.EnableCalo |
◆ Files
F100IntegrationConfig.Files |
◆ FinalTracks
F100IntegrationConfig.FinalTracks |
◆ flags
F100IntegrationConfig.flags |
◆ keepOriginal
F100IntegrationConfig.keepOriginal |
◆ NumThreads
F100IntegrationConfig.NumThreads |
◆ OutputItemList
F100IntegrationConfig.OutputItemList |
◆ OutputLevel
F100IntegrationConfig.OutputLevel |
◆ runStandalone
F100IntegrationConfig.runStandalone |
◆ summariseProps
F100IntegrationConfig.summariseProps |
◆ True
F100IntegrationConfig.True |
◆ useCache
F100IntegrationConfig.useCache |
◆ withDetails
F100IntegrationConfig.withDetails |
def F1X0IntegrationCfg(flags, name='F1X0IntegrationAlg', **kwarg)
def F110StreamIntegrationCfg(flags, name='F110StreamIntegrationAlg', **kwarg)
def ITkPixelDetectorElementStatusAlgCfg(flags, name="ITkPixelDetectorElementStatusAlg", **kwargs)
def F100DataEncodingCfg(flags, name='F100DataEncodingAlg', **kwarg)
def FPGAClusterSortingAlgCfg(flags, name="FPGAClusterSortingAlg", **kwargs)
def FPGADataFormatToolCfg(flags, name='FPGADataFormatTool', **kwargs)
def ITkStripDetectorElementStatusAlgCfg(flags, name="ITkStripDetectorElementStatusAlg", **kwargs)
def FPGAClusterSortingCfg(flags, **kwargs)
def F100StreamIntegrationCfg(flags, name='F100StreamIntegrationAlg', **kwarg)
def FPGADataPreparation(flags, runStandalone=False)
void print(char *figname, TCanvas *c1)
std::string join(const std::vector< std::string > &v, const char c=',')
def xAODClusterMakerCfg(flags, name='xAODClusterMaker', **kwarg)
def F1X0XRTIntegrationCfg(flags, name='F1X0IntegrationAlg', **kwarg)
def addToAOD(flags, itemOrList, **kwargs)
def FPGATrackSimReportingCfg(flags, name='FPGATrackSimReportingAlg', **kwargs)
def F110IntegrationCfg(flags, name='F110IntegrationAlg', **kwarg)
def F100EDMConversionCfg(flags, name='F100EDMConversionAlg', **kwarg)