3 from AthenaConfiguration.ComponentFactory
import CompFactory
4 from AthenaConfiguration.ComponentAccumulator
import ComponentAccumulator
10 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
11 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
12 if(flags.FPGADataPrep.doF110):
13 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
15 kwarg.setdefault(
'PixelClusterKernelName',
'pixclustering_top_v1_0')
16 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
17 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
18 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
19 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
20 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
21 kwarg.setdefault(
'doF110', flags.FPGADataPrep.doF110)
23 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
24 if 'RegSelTool' not in kwarg:
25 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
29 acc.addService(CompFactory.ChronoStatSvc(
31 PrintSystemTime =
True,
32 PrintEllapsedTime =
True
35 from AthenaMonitoringKernel.GenericMonitoringTool
import GenericMonitoringTool
37 montool.defineHistogram(
'TIME_Total',path=
'EXPERT',type=
'TH1F',title=
"Total time (ms)", xbins = 400, xmin=0.0, xmax=2000.0)
39 kwarg.setdefault(
'MonTool', montool)
41 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0IntegrationAlg(name, **kwarg))
48 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
49 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
50 if(flags.FPGADataPrep.doF110):
51 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
53 kwarg.setdefault(
'PixelClusterKernelName',
'pixclustering_top_v1_0')
54 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
55 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
56 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
57 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
58 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
59 kwarg.setdefault(
'doF110', flags.FPGADataPrep.doF110)
61 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
62 if 'RegSelTool' not in kwarg:
63 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
67 acc.addService(CompFactory.ChronoStatSvc(
69 PrintSystemTime =
True,
70 PrintEllapsedTime =
True
73 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0XRTIntegrationAlg(name, **kwarg))
80 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
81 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
82 kwarg.setdefault(
'PixelStartClusterKernelName',
'loaderPixel')
83 kwarg.setdefault(
'PixelEndClusterKernelName',
'unloaderPixelCluster')
84 kwarg.setdefault(
'PixelEndClusterEdmKernelName',
'unloaderPixelEdm')
86 kwarg.setdefault(
'StripStartClusterKernelName',
'loaderStrip')
87 kwarg.setdefault(
'StripEndClusterKernelName',
'unloaderStrip')
88 kwarg.setdefault(
'PixelL2GKernelName',
'l2g_pixel_tool')
89 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
90 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
91 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
93 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
94 if 'RegSelTool' not in kwarg:
95 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
99 acc.addService(CompFactory.ChronoStatSvc(
100 PrintUserTime =
True,
101 PrintSystemTime =
True,
102 PrintEllapsedTime =
True
105 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100StreamIntegrationAlg(name, **kwarg))
112 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
113 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
114 kwarg.setdefault(
'PixelClusterKernelName',
'pixel_clustering_tool')
115 kwarg.setdefault(
'StripClusterKernelName',
'processHits')
116 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
117 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
118 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
120 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
121 if 'RegSelTool' not in kwarg:
122 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
126 acc.addService(CompFactory.ChronoStatSvc(
127 PrintUserTime =
True,
128 PrintSystemTime =
True,
129 PrintEllapsedTime =
True
132 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110IntegrationAlg(name, **kwarg))
139 kwarg.setdefault(
'bdfID', flags.FPGADataPrep.bdfID)
140 kwarg.setdefault(
'xclbin', flags.FPGADataPrep.xclbin)
141 kwarg.setdefault(
'PixelStartClusterKernelName',
'pixelLoader')
142 kwarg.setdefault(
'PixelEndClusterKernelName',
'pixelUnloader')
144 kwarg.setdefault(
'StripStartClusterKernelName',
'stripLoader')
145 kwarg.setdefault(
'StripEndClusterKernelName',
'stripUnloader')
146 kwarg.setdefault(
'StripL2GKernelName',
'l2g_strip_tool')
147 kwarg.setdefault(
'PixelEDMPrepKernelName',
'PixelEDMPrep')
148 kwarg.setdefault(
'StripEDMPrepKernelName',
'StripEDMPrep')
150 if (
"isRoI_Seeded" in kwarg)
and kwarg[
"isRoI_Seeded"]:
151 if 'RegSelTool' not in kwarg:
152 from RegionSelector.RegSelToolConfig
import regSelTool_ITkPixel_Cfg
156 acc.addService(CompFactory.ChronoStatSvc(
157 PrintUserTime =
True,
158 PrintSystemTime =
True,
159 PrintEllapsedTime =
True
162 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110StreamIntegrationAlg(name, **kwarg))
171 if(
"FPGADataFormatTool" not in kwarg):
172 from EFTrackingFPGAPipeline.DataPrepConfig
import FPGADataFormatToolCfg
174 kwarg.setdefault(
'FPGADataFormatTool', dataFormatTool)
176 kwarg.setdefault(
'isRoI_Seeded',
False)
178 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100DataEncodingAlg(name, **kwarg))
186 if(
"xAODClusterMaker" not in kwarg):
187 from EFTrackingFPGAPipeline.DataPrepConfig
import xAODClusterMakerCfg
189 kwarg.setdefault(
'xAODClusterMaker', clusterMakerTool)
191 acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100EDMConversionAlg(name, **kwarg))
198 from FPGAClusterSorting.FPGAClusterSortingConfig
import FPGAClusterSortingAlgCfg
201 acc.merge(ClusterSorting)
205 flags.Scheduler.ShowDataDeps=
True
206 flags.Scheduler.CheckDependencies=
True
207 flags.Debug.DumpEvtStore=
False
214 kwargs.setdefault(
'FPGAThreads', flags.Concurrency.NumThreads)
218 if(flags.FPGADataPrep.doCodeType ==
"F1X0"):
220 elif(flags.FPGADataPrep.doCodeType ==
"F1X0XRT"):
222 elif(flags.FPGADataPrep.doCodeType ==
"F100Stream"):
224 elif(flags.FPGADataPrep.doCodeType ==
"F110"):
226 elif(flags.FPGADataPrep.doCodeType ==
"F110Stream"):
229 print(
"Code Type is not recognized")
233 acc.merge(
FPGAClusterSortingCfg(flags,**{
'sortedxAODPixelClusterContainer':
'SortedFPGAPixelClusters' if runStandalone
else 'ITkPixelClusters',
234 'sortedxAODStripClusterContainer':
'SortedFPGAStripClusters' if runStandalone
else 'ITkStripClusters'}))
236 if(
not runStandalone):
237 if(
not flags.FPGADataPrep.ForTiming):
238 from FPGATrackSimReporting.FPGATrackSimReportingConfig
import FPGATrackSimReportingCfg
240 perEventReports =
False,
241 **{
'xAODPixelClusterContainers' : [
'ITkPixelClusters'],
242 'xAODStripClusterContainers' : [
'ITkStripClusters'],
243 'FPGAActsTracks' : [f
'{flags.Tracking.ActiveConfig.extension}Tracks',f
'SiSPTracksSeedSegments{flags.Tracking.ActiveConfig.extension}PixelTracks'],
244 'isDataPrep':
True} ))
246 from PixelConditionsAlgorithms.ITkPixelConditionsConfig
import ITkPixelDetectorElementStatusAlgCfg
249 from SCT_ConditionsAlgorithms.ITkStripConditionsAlgorithmsConfig
import ITkStripDetectorElementStatusAlgCfg
252 if flags.Acts.EDM.PersistifyClusters
or flags.Acts.EDM.PersistifySpacePoints:
255 pixel_cluster_shortlist = [
'-pixelClusterLink']
256 strip_cluster_shortlist = [
'-sctClusterLink']
258 pixel_cluster_variables =
'.'.
join(pixel_cluster_shortlist)
259 strip_cluster_variables =
'.'.
join(strip_cluster_shortlist)
261 toAOD += [
'xAOD::PixelClusterContainer#ITkPixelClusters',
262 'xAOD::PixelClusterAuxContainer#ITkPixelClustersAux.' + pixel_cluster_variables,
263 'xAOD::StripClusterContainer#ITkStripClusters',
264 'xAOD::StripClusterAuxContainer#ITkStripClustersAux.' + strip_cluster_variables]
265 from OutputStreamAthenaPool.OutputStreamConfig
import addToAOD
273 if __name__ ==
"__main__":
274 from AthenaConfiguration.AllConfigFlags
import initConfigFlags
277 flags.Detector.EnableCalo =
False
278 flags.FPGADataPrep.DoActs =
True
279 flags.Acts.doRotCorrection =
False
281 flags.Concurrency.NumThreads = 1
282 flags.Input.Files = [
"/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/ATLAS-P2-RUN4-03-00-00/RDO/reg0_singlemu.root"]
284 flags.Output.AODFileName =
"FPGA.Benchmark.AOD.pool.root"
285 flags.Debug.DumpEvtStore=
False
288 if(
not flags.FPGADataPrep.ForTiming):
290 flags.FPGADataPrep.PassThrough.ClusterOnly =
True
292 if flags.FPGADataPrep.PassThrough.ClusterOnly:
293 flags.Acts.useCache =
False
294 flags.Tracking.ITkMainPass.doActsSeed =
True
296 flags.Tracking.ITkMainPass.doAthenaToActsCluster =
True
297 flags.Tracking.ITkMainPass.doAthenaToActsSpacePoint =
True
298 flags.Tracking.ITkMainPass.doAthenaSpacePoint =
True
300 flags.Tracking.doTruth=
False
301 flags.ITk.doTruth=
False
302 flags.InDet.doTruth=
False
305 flags = flags.cloneAndReplace(
"Tracking.ActiveConfig",
"Tracking.ITkMainPass", keepOriginal=
True)
307 from AthenaConfiguration.MainServicesConfig
import MainServicesCfg
310 from AthenaPoolCnvSvc.PoolReadConfig
import PoolReadCfg
313 if(
not flags.FPGADataPrep.ForTiming):
316 from xAODTruthCnv.xAODTruthCnvConfig
import GEN_AOD2xAODCfg
320 from InDetConfig.ITkTrackRecoConfig
import ITkTrackRecoCfg
323 from InDetConfig.InDetPrepRawDataToxAODConfig
import TruthParticleIndexDecoratorAlgCfg
327 from PixelConditionsAlgorithms.ITkPixelConditionsConfig
import ITkPixelDetectorElementStatusAlgCfg
334 if flags.FPGADataPrep.DoActs:
337 from EFTrackingFPGAUtility.DataPrepToActsConfig
import UseActsSpacePointFormationCfg
342 from FPGATrackSimConfTools.FPGATrackSimDataPrepConfig
import FPGATrackSimDataPrepConnectToFastTracking
344 **{
'PixelSeedingAlg.InputSpacePoints' : [
'FPGAPixelSpacePoints'],
345 'StripSeedingAlg.InputSpacePoints' : [
''],
346 'TrackFindingAlg.UncalibratedMeasurementContainerKeys' : [
"SortedFPGAPixelClusters",
"SortedFPGAStripClusters"],
347 'PixelClusterToTruthAssociationAlg.Measurements' :
'SortedFPGAPixelClusters',
348 'StripClusterToTruthAssociationAlg.Measurements' :
'SortedFPGAStripClusters'}))
349 if(
not flags.FPGADataPrep.ForTiming):
355 "xAOD::TrackParticleContainer#FPGATrackParticles",
356 "xAOD::TrackParticleAuxContainer#FPGATrackParticlesAux."
360 if(
not flags.FPGADataPrep.ForTiming):
362 "xAOD::StripClusterContainer#FPGAStripClusters",
363 "xAOD::StripClusterAuxContainer#FPGAStripClustersAux.",
364 "xAOD::PixelClusterContainer#FPGAPixelClusters",
365 "xAOD::PixelClusterAuxContainer#FPGAPixelClustersAux.",
368 from EFTrackingFPGAOutputValidation.FPGAOutputValidationConfig
import FPGAOutputValidationCfg
370 "pixelKeys": [
"FPGAPixelClusters",
"ITkPixelClusters"],
371 "stripKeys": [
"FPGAStripClusters",
"ITkStripClusters"],
372 'doDiffHistograms':
True,
374 'allowedRdoMisses': 1000}))
378 from xAODMetaDataCnv.InfileMetaDataConfig
import SetupMetaDataForStreamCfg
379 from AthenaConfiguration.Enums
import MetadataCategory
382 MetadataCategory.ByteStreamMetaData,
383 MetadataCategory.LumiBlockMetaData,
384 MetadataCategory.TruthMetaData,
385 MetadataCategory.IOVMetaData,],))
387 from OutputStreamAthenaPool.OutputStreamConfig
import addToAOD
388 cfg.merge(
addToAOD(flags, OutputItemList))
393 cfg.foreach_component(
"AthEventSeq/*").OutputLevel = DEBUG
394 cfg.printConfig(withDetails=
True, summariseProps=
True)
395 cfg.store(
open(
"F100IntegrationAlg.pkl",
"wb"))
396 cfg.run(flags.Exec.MaxEvents)