ATLAS Offline Software
F100IntegrationConfig.py
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1 # Copyright (C) 2002-2025 CERN for the benefit of the ATLAS collaboration
2 
3 from AthenaConfiguration.ComponentFactory import CompFactory
4 from AthenaConfiguration.ComponentAccumulator import ComponentAccumulator
5 
6 
7 def F1X0IntegrationCfg(flags, name = 'F1X0IntegrationAlg', **kwarg):
8  acc = ComponentAccumulator()
9 
10  kwarg.setdefault('bdfID', flags.FPGADataPrep.bdfID) # On the testbed
11  kwarg.setdefault('xclbin', flags.FPGADataPrep.xclbin)
12  if(flags.FPGADataPrep.doF110):
13  kwarg.setdefault('PixelClusterKernelName','pixel_clustering_tool')
14  else:
15  kwarg.setdefault('PixelClusterKernelName', 'pixclustering_top_v1_0')
16  kwarg.setdefault('StripClusterKernelName','processHits')
17  kwarg.setdefault('PixelL2GKernelName','l2g_pixel_tool')
18  kwarg.setdefault('StripL2GKernelName','l2g_strip_tool')
19  kwarg.setdefault('PixelEDMPrepKernelName', 'PixelEDMPrep')
20  kwarg.setdefault('StripEDMPrepKernelName', 'StripEDMPrep')
21  kwarg.setdefault('doF110', flags.FPGADataPrep.doF110)
22 
23  if ("isRoI_Seeded" in kwarg) and kwarg["isRoI_Seeded"]:
24  if 'RegSelTool' not in kwarg:
25  from RegionSelector.RegSelToolConfig import regSelTool_ITkPixel_Cfg
26  kwarg.setdefault('RegSelTool', acc.popToolsAndMerge(regSelTool_ITkPixel_Cfg(flags)))
27 
28  # Set up Chrono service
29  acc.addService(CompFactory.ChronoStatSvc(
30  PrintUserTime = True,
31  PrintSystemTime = True,
32  PrintEllapsedTime = True
33  ))
34 
35  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0IntegrationAlg(name, **kwarg))
36 
37  return acc
38 
39 def F1X0XRTIntegrationCfg(flags, name = 'F1X0IntegrationAlg', **kwarg):
40  acc = ComponentAccumulator()
41 
42  kwarg.setdefault('bdfID', flags.FPGADataPrep.bdfID) # On the testbed
43  kwarg.setdefault('xclbin', flags.FPGADataPrep.xclbin)
44  if(flags.FPGADataPrep.doF110):
45  kwarg.setdefault('PixelClusterKernelName','pixel_clustering_tool')
46  else:
47  kwarg.setdefault('PixelClusterKernelName', 'pixclustering_top_v1_0')
48  kwarg.setdefault('StripClusterKernelName','processHits')
49  kwarg.setdefault('PixelL2GKernelName','l2g_pixel_tool')
50  kwarg.setdefault('StripL2GKernelName','l2g_strip_tool')
51  kwarg.setdefault('PixelEDMPrepKernelName', 'PixelEDMPrep')
52  kwarg.setdefault('StripEDMPrepKernelName', 'StripEDMPrep')
53  kwarg.setdefault('doF110', flags.FPGADataPrep.doF110)
54 
55  if ("isRoI_Seeded" in kwarg) and kwarg["isRoI_Seeded"]:
56  if 'RegSelTool' not in kwarg:
57  from RegionSelector.RegSelToolConfig import regSelTool_ITkPixel_Cfg
58  kwarg.setdefault('RegSelTool', acc.popToolsAndMerge(regSelTool_ITkPixel_Cfg(flags)))
59 
60  # Set up Chrono service
61  acc.addService(CompFactory.ChronoStatSvc(
62  PrintUserTime = True,
63  PrintSystemTime = True,
64  PrintEllapsedTime = True
65  ))
66 
67  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0XRTIntegrationAlg(name, **kwarg))
68 
69  return acc
70 
71 def F100StreamIntegrationCfg(flags, name = 'F100StreamIntegrationAlg', **kwarg):
72  acc = ComponentAccumulator()
73 
74  kwarg.setdefault('bdfID', flags.FPGADataPrep.bdfID) # On the testbed
75  kwarg.setdefault('xclbin', flags.FPGADataPrep.xclbin)
76  kwarg.setdefault('PixelStartClusterKernelName','loaderPixel')
77  kwarg.setdefault('PixelEndClusterKernelName','unloaderPixelCluster')
78  kwarg.setdefault('PixelEndClusterEdmKernelName','unloaderPixelEdm')
79 
80  kwarg.setdefault('StripStartClusterKernelName','loaderStrip')
81  kwarg.setdefault('StripEndClusterKernelName','unloaderStrip')
82  kwarg.setdefault('PixelL2GKernelName','l2g_pixel_tool')
83  kwarg.setdefault('StripL2GKernelName','l2g_strip_tool')
84  kwarg.setdefault('PixelEDMPrepKernelName', 'PixelEDMPrep')
85  kwarg.setdefault('StripEDMPrepKernelName', 'StripEDMPrep')
86 
87  if ("isRoI_Seeded" in kwarg) and kwarg["isRoI_Seeded"]:
88  if 'RegSelTool' not in kwarg:
89  from RegionSelector.RegSelToolConfig import regSelTool_ITkPixel_Cfg
90  kwarg.setdefault('RegSelTool', acc.popToolsAndMerge(regSelTool_ITkPixel_Cfg(flags)))
91 
92  # Set up Chrono service
93  acc.addService(CompFactory.ChronoStatSvc(
94  PrintUserTime = True,
95  PrintSystemTime = True,
96  PrintEllapsedTime = True
97  ))
98 
99  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100StreamIntegrationAlg(name, **kwarg))
100 
101  return acc
102 
103 def F110IntegrationCfg(flags, name = 'F110IntegrationAlg', **kwarg):
104  acc = ComponentAccumulator()
105 
106  kwarg.setdefault('bdfID', flags.FPGADataPrep.bdfID) # On the testbed
107  kwarg.setdefault('xclbin', flags.FPGADataPrep.xclbin)
108  kwarg.setdefault('PixelClusterKernelName','pixel_clustering_tool')
109  kwarg.setdefault('StripClusterKernelName','processHits')
110  kwarg.setdefault('StripL2GKernelName','l2g_strip_tool')
111  kwarg.setdefault('PixelEDMPrepKernelName', 'PixelEDMPrep')
112  kwarg.setdefault('StripEDMPrepKernelName', 'StripEDMPrep')
113 
114  if ("isRoI_Seeded" in kwarg) and kwarg["isRoI_Seeded"]:
115  if 'RegSelTool' not in kwarg:
116  from RegionSelector.RegSelToolConfig import regSelTool_ITkPixel_Cfg
117  kwarg.setdefault('RegSelTool', acc.popToolsAndMerge(regSelTool_ITkPixel_Cfg(flags)))
118 
119  # Set up Chrono service
120  acc.addService(CompFactory.ChronoStatSvc(
121  PrintUserTime = True,
122  PrintSystemTime = True,
123  PrintEllapsedTime = True
124  ))
125 
126  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110IntegrationAlg(name, **kwarg))
127 
128  return acc
129 
130 def F110StreamIntegrationCfg(flags, name = 'F110StreamIntegrationAlg', **kwarg):
131  acc = ComponentAccumulator()
132 
133  kwarg.setdefault('bdfID', flags.FPGADataPrep.bdfID) # On the testbed
134  kwarg.setdefault('xclbin', flags.FPGADataPrep.xclbin)
135  kwarg.setdefault('PixelStartClusterKernelName','pixelLoader')
136  kwarg.setdefault('PixelEndClusterKernelName','pixelUnloader')
137 
138  kwarg.setdefault('StripStartClusterKernelName','stripLoader')
139  kwarg.setdefault('StripEndClusterKernelName','stripUnloader')
140  kwarg.setdefault('StripL2GKernelName','l2g_strip_tool')
141  kwarg.setdefault('PixelEDMPrepKernelName', 'PixelEDMPrep')
142  kwarg.setdefault('StripEDMPrepKernelName', 'StripEDMPrep')
143 
144  if ("isRoI_Seeded" in kwarg) and kwarg["isRoI_Seeded"]:
145  if 'RegSelTool' not in kwarg:
146  from RegionSelector.RegSelToolConfig import regSelTool_ITkPixel_Cfg
147  kwarg.setdefault('RegSelTool', acc.popToolsAndMerge(regSelTool_ITkPixel_Cfg(flags)))
148 
149  # Set up Chrono service
150  acc.addService(CompFactory.ChronoStatSvc(
151  PrintUserTime = True,
152  PrintSystemTime = True,
153  PrintEllapsedTime = True
154  ))
155 
156  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110StreamIntegrationAlg(name, **kwarg))
157 
158  return acc
159 
160 
161 def F100DataEncodingCfg(flags, name = 'F100DataEncodingAlg', **kwarg):
162  acc = ComponentAccumulator()
163 
164  # Set up Cluster maker tool
165  if("FPGADataFormatTool" not in kwarg):
166  from EFTrackingFPGAPipeline.DataPrepConfig import FPGADataFormatToolCfg
167  dataFormatTool = acc.popToolsAndMerge(FPGADataFormatToolCfg(flags))
168  kwarg.setdefault('FPGADataFormatTool', dataFormatTool)
169 
170  kwarg.setdefault('isRoI_Seeded', False)
171 
172  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100DataEncodingAlg(name, **kwarg))
173 
174  return acc
175 
176 def F100EDMConversionCfg(flags, name = 'F100EDMConversionAlg', **kwarg):
177  acc = ComponentAccumulator()
178 
179  # Set up Cluster maker tool
180  if("xAODClusterMaker" not in kwarg):
181  from EFTrackingFPGAPipeline.DataPrepConfig import xAODClusterMakerCfg
182  clusterMakerTool = acc.popToolsAndMerge(xAODClusterMakerCfg(flags))
183  kwarg.setdefault('xAODClusterMaker', clusterMakerTool)
184 
185  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100EDMConversionAlg(name, **kwarg))
186 
187  return acc
188 
189 
190 def FPGAClusterSortingCfg(flags,**kwargs):
191  acc = ComponentAccumulator()
192  from FPGAClusterSorting.FPGAClusterSortingConfig import FPGAClusterSortingAlgCfg
193  ClusterSorting = FPGAClusterSortingAlgCfg(flags,**kwargs)
194 
195  acc.merge(ClusterSorting)
196  return acc
197 
198 def F100FlagsCfg(flags):
199  flags.Scheduler.ShowDataDeps=True
200  flags.Scheduler.CheckDependencies=True
201  flags.Debug.DumpEvtStore=False
202 
203  return flags
204 
205 
206 def FPGADataPreparation(flags,runStandalone=False): # thsi is used to run the F100 through Reco_tf
207  kwargs = {}
208  kwargs.setdefault('FPGAThreads', flags.Concurrency.NumThreads)
209  acc = ComponentAccumulator()
210  acc.merge(F100DataEncodingCfg(flags))
211 
212  if(flags.FPGADataPrep.doCodeType == "F1X0"):
213  acc.merge(F1X0IntegrationCfg(flags, "F1X0IntegrationAlg", **kwargs))
214  elif(flags.FPGADataPrep.doCodeType == "F1X0XRT"):
215  acc.merge(F1X0XRTIntegrationCfg(flags, "F1X0XRTIntegrationAlg", **kwargs))
216  elif(flags.FPGADataPrep.doCodeType == "F100Stream"):
217  acc.merge(F100StreamIntegrationCfg(flags, "F100StreamIntegrationAlg", **kwargs))
218  elif(flags.FPGADataPrep.doCodeType == "F110"):
219  acc.merge(F110IntegrationCfg(flags, "F110IntegrationAlg", **kwargs))
220  elif(flags.FPGADataPrep.doCodeType == "F110Stream"):
221  acc.merge(F110StreamIntegrationCfg(flags, "F110StreamIntegrationAlg", **kwargs))
222  else:
223  print("Code Type is not recognized")
224  exit(1)
225 
226  acc.merge(F100EDMConversionCfg(flags))
227  acc.merge(FPGAClusterSortingCfg(flags,**{'sortedxAODPixelClusterContainer': 'SortedFPGAPixelClusters' if runStandalone else 'ITkPixelClusters',
228  'sortedxAODStripClusterContainer': 'SortedFPGAStripClusters' if runStandalone else 'ITkStripClusters'}))
229 
230  if(not runStandalone):
231  if(not flags.FPGADataPrep.ForTiming):
232  from FPGATrackSimReporting.FPGATrackSimReportingConfig import FPGATrackSimReportingCfg
233  acc.merge(FPGATrackSimReportingCfg(flags,
234  perEventReports = False, # set to True if per-event information is needed for debugging (e.g. cluster, tracks). Otherwise it produces a lot of output
235  **{'xAODPixelClusterContainers' : ['ITkPixelClusters'],
236  'xAODStripClusterContainers' : ['ITkStripClusters'],
237  'FPGAActsTracks' : [f'{flags.Tracking.ActiveConfig.extension}Tracks',f'SiSPTracksSeedSegments{flags.Tracking.ActiveConfig.extension}PixelTracks'],
238  'isDataPrep': True} ))
239 
240  from PixelConditionsAlgorithms.ITkPixelConditionsConfig import ITkPixelDetectorElementStatusAlgCfg
241  acc.merge(ITkPixelDetectorElementStatusAlgCfg(flags))
242 
243  from SCT_ConditionsAlgorithms.ITkStripConditionsAlgorithmsConfig import ITkStripDetectorElementStatusAlgCfg
244  acc.merge(ITkStripDetectorElementStatusAlgCfg(flags))
245 
246  if flags.Acts.EDM.PersistifyClusters or flags.Acts.EDM.PersistifySpacePoints:
247  toAOD = []
248 
249  pixel_cluster_shortlist = ['-pixelClusterLink']
250  strip_cluster_shortlist = ['-sctClusterLink']
251 
252  pixel_cluster_variables = '.'.join(pixel_cluster_shortlist)
253  strip_cluster_variables = '.'.join(strip_cluster_shortlist)
254 
255  toAOD += ['xAOD::PixelClusterContainer#ITkPixelClusters',
256  'xAOD::PixelClusterAuxContainer#ITkPixelClustersAux.' + pixel_cluster_variables,
257  'xAOD::StripClusterContainer#ITkStripClusters',
258  'xAOD::StripClusterAuxContainer#ITkStripClustersAux.' + strip_cluster_variables]
259  from OutputStreamAthenaPool.OutputStreamConfig import addToAOD
260  acc.merge(addToAOD(flags, toAOD))
261  return acc
262 
263 
264 
265 
266 
267 if __name__ == "__main__":
268  from AthenaConfiguration.AllConfigFlags import initConfigFlags
269  flags = initConfigFlags()
270 
271  flags.Detector.EnableCalo = False
272  flags.FPGADataPrep.DoActs = True
273  flags.Acts.doRotCorrection = False
274 
275  flags.Concurrency.NumThreads = 1
276  flags.Input.Files = ["/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/ATLAS-P2-RUN4-03-00-00/RDO/reg0_singlemu.root"]
277  # flags.Input.Files = ["/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/RDO/ATLAS-P2-RUN4-03-00-00/mc21_14TeV.601229.PhPy8EG_A14_ttbar_hdamp258p75_SingleLep.recon.RDO.e8481_s4149_r14700/RDO.33629020._000047.pool.root.1"]
278  flags.Output.AODFileName = "FPGA.Benchmark.AOD.pool.root"
279  flags.Debug.DumpEvtStore=False
280  flags.fillFromArgs()
281 
282  if(not flags.FPGADataPrep.ForTiming):
283  # DataPreparation Pipeline doesn't do spacepoint fomration, we need ACTS to do it
284  flags.FPGADataPrep.PassThrough.ClusterOnly = True
285  # For Spacepoint formation
286  if flags.FPGADataPrep.PassThrough.ClusterOnly:
287  flags.Acts.useCache = False
288  flags.Tracking.ITkMainPass.doActsSeed = True
289 
290  flags.Tracking.ITkMainPass.doAthenaToActsCluster = True
291  flags.Tracking.ITkMainPass.doAthenaToActsSpacePoint = True
292  flags.Tracking.ITkMainPass.doAthenaSpacePoint = True
293  else:
294  flags.Tracking.doTruth=False
295  flags.ITk.doTruth=False
296  flags.InDet.doTruth=False
297 
298  flags.lock()
299  flags = flags.cloneAndReplace("Tracking.ActiveConfig", "Tracking.ITkMainPass", keepOriginal=True)
300 
301  from AthenaConfiguration.MainServicesConfig import MainServicesCfg
302  cfg = MainServicesCfg(flags)
303 
304  from AthenaPoolCnvSvc.PoolReadConfig import PoolReadCfg
305  cfg.merge(PoolReadCfg(flags))
306 
307  if(not flags.FPGADataPrep.ForTiming):
308  #Truth
309  if flags.Input.isMC:
310  from xAODTruthCnv.xAODTruthCnvConfig import GEN_AOD2xAODCfg
311  cfg.merge(GEN_AOD2xAODCfg(flags))
312 
313  # Standard reco
314  from InDetConfig.ITkTrackRecoConfig import ITkTrackRecoCfg
315  cfg.merge(ITkTrackRecoCfg(flags))
316 
317  from InDetConfig.InDetPrepRawDataToxAODConfig import TruthParticleIndexDecoratorAlgCfg
318  cfg.merge( TruthParticleIndexDecoratorAlgCfg(flags) )
319 
320  else:
321  from PixelConditionsAlgorithms.ITkPixelConditionsConfig import ITkPixelDetectorElementStatusAlgCfg
322  cfg.merge(ITkPixelDetectorElementStatusAlgCfg(flags))
323 
324  cfg.merge(FPGADataPreparation(flags,runStandalone=True))
325 
326  OutputItemList = []
327  # # Connection to ACTS
328  if flags.FPGADataPrep.DoActs:
329 
330  # convert xAOD Clusters to SPs
331  from EFTrackingFPGAUtility.DataPrepToActsConfig import UseActsSpacePointFormationCfg
332  cfg.merge(UseActsSpacePointFormationCfg(flags))
333 
334 
335  # Run the ACTS Fast Tracking on FPGA clusters
336  from FPGATrackSimConfTools.FPGATrackSimDataPrepConfig import FPGATrackSimDataPrepConnectToFastTracking
337  cfg.merge(FPGATrackSimDataPrepConnectToFastTracking(flags, FinalTracks="FPGA",
338  **{'PixelSeedingAlg.InputSpacePoints' : ['FPGAPixelSpacePoints'],
339  'StripSeedingAlg.InputSpacePoints' : [''],
340  'TrackFindingAlg.UncalibratedMeasurementContainerKeys' : ["SortedFPGAPixelClusters","SortedFPGAStripClusters"],
341  'PixelClusterToTruthAssociationAlg.Measurements' : 'SortedFPGAPixelClusters',
342  'StripClusterToTruthAssociationAlg.Measurements' : 'SortedFPGAStripClusters'}))
343  if(not flags.FPGADataPrep.ForTiming):
344 
345  # Run the ACTS Fast Tracking (C-100) as an additional reference
346  cfg.merge(FPGATrackSimDataPrepConnectToFastTracking(flags, FinalTracks="ActsFast"))
347 
348  OutputItemList += [
349  "xAOD::TrackParticleContainer#FPGATrackParticles",
350  "xAOD::TrackParticleAuxContainer#FPGATrackParticlesAux."
351  ]
352 
353 
354  if(not flags.FPGADataPrep.ForTiming):
355  OutputItemList += [
356  "xAOD::StripClusterContainer#FPGAStripClusters",
357  "xAOD::StripClusterAuxContainer#FPGAStripClustersAux.",
358  "xAOD::PixelClusterContainer#FPGAPixelClusters",
359  "xAOD::PixelClusterAuxContainer#FPGAPixelClustersAux.",
360  ]
361 
362  from EFTrackingFPGAOutputValidation.FPGAOutputValidationConfig import FPGAOutputValidationCfg
363  cfg.merge(FPGAOutputValidationCfg(flags, **{
364  "pixelKeys": ["FPGAPixelClusters", "ITkPixelClusters"],
365  "stripKeys": ["FPGAStripClusters", "ITkStripClusters"],
366  'doDiffHistograms':True,
367  'matchByID' : False,
368  'allowedRdoMisses': 1000}))
369 
370 
371  # Prepare output
372  from xAODMetaDataCnv.InfileMetaDataConfig import SetupMetaDataForStreamCfg
373  from AthenaConfiguration.Enums import MetadataCategory
374  cfg.merge(SetupMetaDataForStreamCfg(flags,"AOD",
375  createMetadata=[
376  MetadataCategory.ByteStreamMetaData,
377  MetadataCategory.LumiBlockMetaData,
378  MetadataCategory.TruthMetaData,
379  MetadataCategory.IOVMetaData,],))
380 
381  from OutputStreamAthenaPool.OutputStreamConfig import addToAOD
382  cfg.merge(addToAOD(flags, OutputItemList))
383 
384  flags.dump()
385 
386  from AthenaCommon.Constants import DEBUG
387  cfg.foreach_component("AthEventSeq/*").OutputLevel = DEBUG
388  cfg.printConfig(withDetails=True, summariseProps=True)
389  cfg.store(open("F100IntegrationAlg.pkl", "wb"))
390  cfg.run(flags.Exec.MaxEvents)
391 
392 
393 
F100IntegrationConfig.F1X0IntegrationCfg
def F1X0IntegrationCfg(flags, name='F1X0IntegrationAlg', **kwarg)
Definition: F100IntegrationConfig.py:7
python.ITkTrackRecoConfig.ITkTrackRecoCfg
ComponentAccumulator ITkTrackRecoCfg(flags)
Main ITk tracking config #####################.
Definition: ITkTrackRecoConfig.py:514
python.JetAnalysisCommon.ComponentAccumulator
ComponentAccumulator
Definition: JetAnalysisCommon.py:302
F100IntegrationConfig.F110StreamIntegrationCfg
def F110StreamIntegrationCfg(flags, name='F110StreamIntegrationAlg', **kwarg)
Definition: F100IntegrationConfig.py:130
ITkPixelConditionsConfig.ITkPixelDetectorElementStatusAlgCfg
def ITkPixelDetectorElementStatusAlgCfg(flags, name="ITkPixelDetectorElementStatusAlg", **kwargs)
Definition: ITkPixelConditionsConfig.py:178
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def GEN_AOD2xAODCfg(flags, name="GEN_AOD2xAOD", **kwargs)
Definition: xAODTruthCnvConfig.py:22
F100IntegrationConfig.F100DataEncodingCfg
def F100DataEncodingCfg(flags, name='F100DataEncodingAlg', **kwarg)
Definition: F100IntegrationConfig.py:161
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def FPGAClusterSortingAlgCfg(flags, name="FPGAClusterSortingAlg", **kwargs)
Definition: FPGAClusterSortingConfig.py:6
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def FPGADataFormatToolCfg(flags, name='FPGADataFormatTool', **kwargs)
Definition: DataPrepConfig.py:25
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def TruthParticleIndexDecoratorAlgCfg(flags, name='TruthParticleIndexDecoratorAlg', **kwargs)
Definition: InDetPrepRawDataToxAODConfig.py:6
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def regSelTool_ITkPixel_Cfg(flags)
Definition: RegSelToolConfig.py:120
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Definition: ITkStripConditionsAlgorithmsConfig.py:91
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def FPGAClusterSortingCfg(flags, **kwargs)
Definition: F100IntegrationConfig.py:190
F100IntegrationConfig.F100StreamIntegrationCfg
def F100StreamIntegrationCfg(flags, name='F100StreamIntegrationAlg', **kwarg)
Definition: F100IntegrationConfig.py:71
F100IntegrationConfig.FPGADataPreparation
def FPGADataPreparation(flags, runStandalone=False)
Definition: F100IntegrationConfig.py:206
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def MainServicesCfg(flags, LoopMgr='AthenaEventLoopMgr')
Definition: MainServicesConfig.py:312
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some useful constants -------------------------------------------------—
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Definition: FPGATrackSimDataPrepConfig.py:433
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def xAODClusterMakerCfg(flags, name='xAODClusterMaker', **kwarg)
Definition: DataPrepConfig.py:31
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Definition: DataPrepToActsConfig.py:12
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def F1X0XRTIntegrationCfg(flags, name='F1X0IntegrationAlg', **kwarg)
Definition: F100IntegrationConfig.py:39
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def addToAOD(flags, itemOrList, **kwargs)
Definition: OutputStreamConfig.py:150
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def F110IntegrationCfg(flags, name='F110IntegrationAlg', **kwarg)
Definition: F100IntegrationConfig.py:103
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Definition: PoolReadConfig.py:71
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def F100FlagsCfg(flags)
Definition: F100IntegrationConfig.py:198
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def FPGAOutputValidationCfg(flags, **kwargs)
Definition: FPGAOutputValidationConfig.py:3
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Definition: F100IntegrationConfig.py:176
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