ATLAS Offline Software
F100IntegrationConfig.py
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1 # Copyright (C) 2002-2025 CERN for the benefit of the ATLAS collaboration
2 
3 from AthenaConfiguration.ComponentFactory import CompFactory
4 from AthenaConfiguration.ComponentAccumulator import ComponentAccumulator
5 
6 
7 def F1X0IntegrationCfg(flags, name = 'F1X0IntegrationAlg', **kwarg):
8  acc = ComponentAccumulator()
9 
10  kwarg.setdefault('bdfID', flags.FPGADataPrep.bdfID) # On the testbed
11  kwarg.setdefault('xclbin', flags.FPGADataPrep.xclbin)
12  if(flags.FPGADataPrep.doF110):
13  kwarg.setdefault('PixelClusterKernelName','pixel_clustering_tool')
14  else:
15  kwarg.setdefault('PixelClusterKernelName', 'pixclustering_top_v1_0')
16  kwarg.setdefault('StripClusterKernelName','processHits')
17  kwarg.setdefault('PixelL2GKernelName','l2g_pixel_tool')
18  kwarg.setdefault('StripL2GKernelName','l2g_strip_tool')
19  kwarg.setdefault('PixelEDMPrepKernelName', 'PixelEDMPrep')
20  kwarg.setdefault('StripEDMPrepKernelName', 'StripEDMPrep')
21  kwarg.setdefault('doF110', flags.FPGADataPrep.doF110)
22 
23  if ("isRoI_Seeded" in kwarg) and kwarg["isRoI_Seeded"]:
24  if 'RegSelTool' not in kwarg:
25  from RegionSelector.RegSelToolConfig import regSelTool_ITkPixel_Cfg
26  kwarg.setdefault('RegSelTool', acc.popToolsAndMerge(regSelTool_ITkPixel_Cfg(flags)))
27 
28  # Set up Chrono service
29  acc.addService(CompFactory.ChronoStatSvc(
30  PrintUserTime = True,
31  PrintSystemTime = True,
32  PrintEllapsedTime = True
33  ))
34 
35  from AthenaMonitoringKernel.GenericMonitoringTool import GenericMonitoringTool
36  montool = GenericMonitoringTool(flags, HistPath = f"F100Integration_{name}")
37  montool.defineHistogram('TIME_Total',path='EXPERT',type='TH1F',title="Total time (ms)", xbins = 400, xmin=0.0, xmax=2000.0)
38 
39  kwarg.setdefault('MonTool', montool)
40 
41  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0IntegrationAlg(name, **kwarg))
42 
43  return acc
44 
45 def F1X0XRTIntegrationCfg(flags, name = 'F1X0IntegrationAlg', **kwarg):
46  acc = ComponentAccumulator()
47 
48  kwarg.setdefault('bdfID', flags.FPGADataPrep.bdfID) # On the testbed
49  kwarg.setdefault('xclbin', flags.FPGADataPrep.xclbin)
50  if(flags.FPGADataPrep.doF110):
51  kwarg.setdefault('PixelClusterKernelName','pixel_clustering_tool')
52  else:
53  kwarg.setdefault('PixelClusterKernelName', 'pixclustering_top_v1_0')
54  kwarg.setdefault('StripClusterKernelName','processHits')
55  kwarg.setdefault('PixelL2GKernelName','l2g_pixel_tool')
56  kwarg.setdefault('StripL2GKernelName','l2g_strip_tool')
57  kwarg.setdefault('PixelEDMPrepKernelName', 'PixelEDMPrep')
58  kwarg.setdefault('StripEDMPrepKernelName', 'StripEDMPrep')
59  kwarg.setdefault('doF110', flags.FPGADataPrep.doF110)
60 
61  if ("isRoI_Seeded" in kwarg) and kwarg["isRoI_Seeded"]:
62  if 'RegSelTool' not in kwarg:
63  from RegionSelector.RegSelToolConfig import regSelTool_ITkPixel_Cfg
64  kwarg.setdefault('RegSelTool', acc.popToolsAndMerge(regSelTool_ITkPixel_Cfg(flags)))
65 
66  # Set up Chrono service
67  acc.addService(CompFactory.ChronoStatSvc(
68  PrintUserTime = True,
69  PrintSystemTime = True,
70  PrintEllapsedTime = True
71  ))
72 
73  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F1X0XRTIntegrationAlg(name, **kwarg))
74 
75  return acc
76 
77 def F100StreamIntegrationCfg(flags, name = 'F100StreamIntegrationAlg', **kwarg):
78  acc = ComponentAccumulator()
79 
80  kwarg.setdefault('bdfID', flags.FPGADataPrep.bdfID) # On the testbed
81  kwarg.setdefault('xclbin', flags.FPGADataPrep.xclbin)
82  kwarg.setdefault('PixelStartClusterKernelName','loaderPixel')
83  kwarg.setdefault('PixelEndClusterKernelName','unloaderPixelCluster')
84  kwarg.setdefault('PixelEndClusterEdmKernelName','unloaderPixelEdm')
85 
86  kwarg.setdefault('StripStartClusterKernelName','loaderStrip')
87  kwarg.setdefault('StripEndClusterKernelName','unloaderStrip')
88  kwarg.setdefault('PixelL2GKernelName','l2g_pixel_tool')
89  kwarg.setdefault('StripL2GKernelName','l2g_strip_tool')
90  kwarg.setdefault('PixelEDMPrepKernelName', 'PixelEDMPrep')
91  kwarg.setdefault('StripEDMPrepKernelName', 'StripEDMPrep')
92 
93  if ("isRoI_Seeded" in kwarg) and kwarg["isRoI_Seeded"]:
94  if 'RegSelTool' not in kwarg:
95  from RegionSelector.RegSelToolConfig import regSelTool_ITkPixel_Cfg
96  kwarg.setdefault('RegSelTool', acc.popToolsAndMerge(regSelTool_ITkPixel_Cfg(flags)))
97 
98  # Set up Chrono service
99  acc.addService(CompFactory.ChronoStatSvc(
100  PrintUserTime = True,
101  PrintSystemTime = True,
102  PrintEllapsedTime = True
103  ))
104 
105  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100StreamIntegrationAlg(name, **kwarg))
106 
107  return acc
108 
109 def F110IntegrationCfg(flags, name = 'F110IntegrationAlg', **kwarg):
110  acc = ComponentAccumulator()
111 
112  kwarg.setdefault('bdfID', flags.FPGADataPrep.bdfID) # On the testbed
113  kwarg.setdefault('xclbin', flags.FPGADataPrep.xclbin)
114  kwarg.setdefault('PixelClusterKernelName','pixel_clustering_tool')
115  kwarg.setdefault('StripClusterKernelName','processHits')
116  kwarg.setdefault('StripL2GKernelName','l2g_strip_tool')
117  kwarg.setdefault('PixelEDMPrepKernelName', 'PixelEDMPrep')
118  kwarg.setdefault('StripEDMPrepKernelName', 'StripEDMPrep')
119 
120  if ("isRoI_Seeded" in kwarg) and kwarg["isRoI_Seeded"]:
121  if 'RegSelTool' not in kwarg:
122  from RegionSelector.RegSelToolConfig import regSelTool_ITkPixel_Cfg
123  kwarg.setdefault('RegSelTool', acc.popToolsAndMerge(regSelTool_ITkPixel_Cfg(flags)))
124 
125  # Set up Chrono service
126  acc.addService(CompFactory.ChronoStatSvc(
127  PrintUserTime = True,
128  PrintSystemTime = True,
129  PrintEllapsedTime = True
130  ))
131 
132  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110IntegrationAlg(name, **kwarg))
133 
134  return acc
135 
136 def F110StreamIntegrationCfg(flags, name = 'F110StreamIntegrationAlg', **kwarg):
137  acc = ComponentAccumulator()
138 
139  kwarg.setdefault('bdfID', flags.FPGADataPrep.bdfID) # On the testbed
140  kwarg.setdefault('xclbin', flags.FPGADataPrep.xclbin)
141  kwarg.setdefault('PixelStartClusterKernelName','pixelLoader')
142  kwarg.setdefault('PixelEndClusterKernelName','pixelUnloader')
143 
144  kwarg.setdefault('StripStartClusterKernelName','stripLoader')
145  kwarg.setdefault('StripEndClusterKernelName','stripUnloader')
146  kwarg.setdefault('PixelEDMPrepKernelName', 'PixelEDMPrep')
147  kwarg.setdefault('StripEDMPrepKernelName', 'StripEDMPrep')
148 
149  if ("isRoI_Seeded" in kwarg) and kwarg["isRoI_Seeded"]:
150  if 'RegSelTool' not in kwarg:
151  from RegionSelector.RegSelToolConfig import regSelTool_ITkPixel_Cfg
152  kwarg.setdefault('RegSelTool', acc.popToolsAndMerge(regSelTool_ITkPixel_Cfg(flags)))
153 
154  # Set up Chrono service
155  acc.addService(CompFactory.ChronoStatSvc(
156  PrintUserTime = True,
157  PrintSystemTime = True,
158  PrintEllapsedTime = True
159  ))
160 
161  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F110StreamIntegrationAlg(name, **kwarg))
162 
163  return acc
164 
165 
166 def F100DataEncodingCfg(flags, name = 'F100DataEncodingAlg', **kwarg):
167  acc = ComponentAccumulator()
168 
169  # Set up Cluster maker tool
170  if("FPGADataFormatTool" not in kwarg):
171  from EFTrackingFPGAPipeline.DataPrepConfig import FPGADataFormatToolCfg
172  dataFormatTool = acc.popToolsAndMerge(FPGADataFormatToolCfg(flags))
173  kwarg.setdefault('FPGADataFormatTool', dataFormatTool)
174 
175  kwarg.setdefault('isRoI_Seeded', False)
176 
177  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100DataEncodingAlg(name, **kwarg))
178 
179  return acc
180 
181 def F100EDMConversionCfg(flags, name = 'F100EDMConversionAlg', **kwarg):
182  acc = ComponentAccumulator()
183 
184  # Set up Cluster maker tool
185  if("xAODClusterMaker" not in kwarg):
186  from EFTrackingFPGAPipeline.DataPrepConfig import xAODClusterMakerCfg
187  clusterMakerTool = acc.popToolsAndMerge(xAODClusterMakerCfg(flags))
188  kwarg.setdefault('xAODClusterMaker', clusterMakerTool)
189 
190  acc.addEventAlgo(CompFactory.EFTrackingFPGAIntegration.F100EDMConversionAlg(name, **kwarg))
191 
192  return acc
193 
194 
195 def FPGAClusterSortingCfg(flags,**kwargs):
196  acc = ComponentAccumulator()
197  from FPGAClusterSorting.FPGAClusterSortingConfig import FPGAClusterSortingAlgCfg
198  ClusterSorting = FPGAClusterSortingAlgCfg(flags,**kwargs)
199 
200  acc.merge(ClusterSorting)
201  return acc
202 
203 def F100FlagsCfg(flags):
204  flags.Scheduler.ShowDataDeps=True
205  flags.Scheduler.CheckDependencies=True
206  flags.Debug.DumpEvtStore=False
207 
208  return flags
209 
210 
211 def FPGADataPreparation(flags,runStandalone=False): # thsi is used to run the F100 through Reco_tf
212  kwargs = {}
213  kwargs.setdefault('FPGAThreads', flags.Concurrency.NumThreads)
214  acc = ComponentAccumulator()
215  acc.merge(F100DataEncodingCfg(flags))
216 
217  if(flags.FPGADataPrep.doCodeType == "F1X0"):
218  acc.merge(F1X0IntegrationCfg(flags, "F1X0IntegrationAlg", **kwargs))
219  elif(flags.FPGADataPrep.doCodeType == "F1X0XRT"):
220  acc.merge(F1X0XRTIntegrationCfg(flags, "F1X0XRTIntegrationAlg", **kwargs))
221  elif(flags.FPGADataPrep.doCodeType == "F100Stream"):
222  acc.merge(F100StreamIntegrationCfg(flags, "F100StreamIntegrationAlg", **kwargs))
223  elif(flags.FPGADataPrep.doCodeType == "F110"):
224  acc.merge(F110IntegrationCfg(flags, "F110IntegrationAlg", **kwargs))
225  elif(flags.FPGADataPrep.doCodeType == "F110Stream"):
226  acc.merge(F110StreamIntegrationCfg(flags, "F110StreamIntegrationAlg", **kwargs))
227  else:
228  print("Code Type is not recognized")
229  exit(1)
230 
231  acc.merge(F100EDMConversionCfg(flags))
232  acc.merge(FPGAClusterSortingCfg(flags,**{'sortedxAODPixelClusterContainer': 'SortedFPGAPixelClusters' if runStandalone else 'ITkPixelClusters',
233  'sortedxAODStripClusterContainer': 'SortedFPGAStripClusters' if runStandalone else 'ITkStripClusters'}))
234 
235  if(not runStandalone):
236  if(not flags.FPGADataPrep.ForTiming):
237  from FPGATrackSimReporting.FPGATrackSimReportingConfig import FPGATrackSimReportingCfg
238  acc.merge(FPGATrackSimReportingCfg(flags,
239  perEventReports = False, # set to True if per-event information is needed for debugging (e.g. cluster, tracks). Otherwise it produces a lot of output
240  **{'xAODPixelClusterContainers' : ['ITkPixelClusters'],
241  'xAODStripClusterContainers' : ['ITkStripClusters'],
242  'FPGAActsTracks' : [],
243  'isDataPrep': True} ))
244 
245  from PixelConditionsAlgorithms.ITkPixelConditionsConfig import ITkPixelDetectorElementStatusAlgCfg
246  acc.merge(ITkPixelDetectorElementStatusAlgCfg(flags))
247 
248  from SCT_ConditionsAlgorithms.ITkStripConditionsAlgorithmsConfig import ITkStripDetectorElementStatusAlgCfg
249  acc.merge(ITkStripDetectorElementStatusAlgCfg(flags))
250 
251  if flags.Acts.EDM.PersistifyClusters or flags.Acts.EDM.PersistifySpacePoints:
252  toAOD = []
253 
254  pixel_cluster_shortlist = ['-pixelClusterLink']
255  strip_cluster_shortlist = ['-sctClusterLink']
256 
257  pixel_cluster_variables = '.'.join(pixel_cluster_shortlist)
258  strip_cluster_variables = '.'.join(strip_cluster_shortlist)
259 
260  toAOD += ['xAOD::PixelClusterContainer#ITkPixelClusters',
261  'xAOD::PixelClusterAuxContainer#ITkPixelClustersAux.' + pixel_cluster_variables,
262  'xAOD::StripClusterContainer#ITkStripClusters',
263  'xAOD::StripClusterAuxContainer#ITkStripClustersAux.' + strip_cluster_variables]
264  from OutputStreamAthenaPool.OutputStreamConfig import addToAOD
265  acc.merge(addToAOD(flags, toAOD))
266  return acc
267 
268 
269 
270 
271 
272 if __name__ == "__main__":
273  from AthenaConfiguration.AllConfigFlags import initConfigFlags
274  flags = initConfigFlags()
275 
276  flags.Detector.EnableCalo = False
277  flags.FPGADataPrep.DoActs = True
278  flags.Acts.doRotCorrection = False
279 
280  flags.Concurrency.NumThreads = 1
281  flags.Input.Files = ["/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/ATLAS-P2-RUN4-03-00-00/RDO/reg0_singlemu.root"]
282  # flags.Input.Files = ["/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/RDO/ATLAS-P2-RUN4-03-00-00/mc21_14TeV.601229.PhPy8EG_A14_ttbar_hdamp258p75_SingleLep.recon.RDO.e8481_s4149_r14700/RDO.33629020._000047.pool.root.1"]
283  flags.Output.AODFileName = "FPGA.Benchmark.AOD.pool.root"
284  flags.Debug.DumpEvtStore=False
285  flags.fillFromArgs()
286 
287  if(not flags.FPGADataPrep.ForTiming):
288  # DataPreparation Pipeline doesn't do spacepoint fomration, we need ACTS to do it
289  flags.FPGADataPrep.PassThrough.ClusterOnly = True
290  # For Spacepoint formation
291  if flags.FPGADataPrep.PassThrough.ClusterOnly:
292  flags.Acts.useCache = False
293  flags.Tracking.ITkMainPass.doActsSeed = True
294 
295  flags.Tracking.ITkMainPass.doAthenaToActsCluster = True
296  flags.Tracking.ITkMainPass.doAthenaToActsSpacePoint = True
297  flags.Tracking.ITkMainPass.doAthenaSpacePoint = True
298  else:
299  flags.Tracking.doTruth=False
300  flags.ITk.doTruth=False
301  flags.InDet.doTruth=False
302 
303  flags.lock()
304  flags = flags.cloneAndReplace("Tracking.ActiveConfig", "Tracking.ITkMainPass", keepOriginal=True)
305 
306  from AthenaConfiguration.MainServicesConfig import MainServicesCfg
307  cfg = MainServicesCfg(flags)
308 
309  from AthenaPoolCnvSvc.PoolReadConfig import PoolReadCfg
310  cfg.merge(PoolReadCfg(flags))
311 
312  if(not flags.FPGADataPrep.ForTiming):
313  #Truth
314  if flags.Input.isMC:
315  from xAODTruthCnv.xAODTruthCnvConfig import GEN_AOD2xAODCfg
316  cfg.merge(GEN_AOD2xAODCfg(flags))
317 
318  # Standard reco
319  from InDetConfig.ITkTrackRecoConfig import ITkTrackRecoCfg
320  cfg.merge(ITkTrackRecoCfg(flags))
321 
322  from InDetConfig.InDetPrepRawDataToxAODConfig import TruthParticleIndexDecoratorAlgCfg
323  cfg.merge( TruthParticleIndexDecoratorAlgCfg(flags) )
324 
325  else:
326  from PixelConditionsAlgorithms.ITkPixelConditionsConfig import ITkPixelDetectorElementStatusAlgCfg
327  cfg.merge(ITkPixelDetectorElementStatusAlgCfg(flags))
328 
329  cfg.merge(FPGADataPreparation(flags,runStandalone=True))
330 
331  OutputItemList = []
332  # # Connection to ACTS
333  if flags.FPGADataPrep.DoActs:
334 
335  # convert xAOD Clusters to SPs
336  from EFTrackingFPGAUtility.DataPrepToActsConfig import UseActsSpacePointFormationCfg
337  cfg.merge(UseActsSpacePointFormationCfg(flags))
338 
339 
340  # Run the ACTS Fast Tracking on FPGA clusters
341  from FPGATrackSimConfTools.FPGATrackSimDataPrepConfig import FPGATrackSimDataPrepConnectToFastTracking
342  cfg.merge(FPGATrackSimDataPrepConnectToFastTracking(flags, FinalTracks="FPGA",
343  **{'PixelSeedingAlg.InputSpacePoints' : ['FPGAPixelSpacePoints'],
344  'StripSeedingAlg.InputSpacePoints' : [''],
345  'TrackFindingAlg.UncalibratedMeasurementContainerKeys' : ["SortedFPGAPixelClusters","SortedFPGAStripClusters"],
346  'PixelClusterToTruthAssociationAlg.Measurements' : 'SortedFPGAPixelClusters',
347  'StripClusterToTruthAssociationAlg.Measurements' : 'SortedFPGAStripClusters'}))
348  if(not flags.FPGADataPrep.ForTiming):
349 
350  # Run the ACTS Fast Tracking (C-100) as an additional reference
351  cfg.merge(FPGATrackSimDataPrepConnectToFastTracking(flags, FinalTracks="ActsFast"))
352 
353  OutputItemList += [
354  "xAOD::TrackParticleContainer#FPGATrackParticles",
355  "xAOD::TrackParticleAuxContainer#FPGATrackParticlesAux."
356  ]
357 
358 
359  if(not flags.FPGADataPrep.ForTiming):
360  OutputItemList += [
361  "xAOD::StripClusterContainer#FPGAStripClusters",
362  "xAOD::StripClusterAuxContainer#FPGAStripClustersAux.",
363  "xAOD::PixelClusterContainer#FPGAPixelClusters",
364  "xAOD::PixelClusterAuxContainer#FPGAPixelClustersAux.",
365  ]
366 
367  from EFTrackingFPGAOutputValidation.FPGAOutputValidationConfig import FPGAOutputValidationCfg
368  cfg.merge(FPGAOutputValidationCfg(flags, **{
369  "pixelKeys": ["FPGAPixelClusters", "ITkPixelClusters"],
370  "stripKeys": ["FPGAStripClusters", "ITkStripClusters"],
371  'doDiffHistograms':True,
372  'matchByID' : False,
373  'allowedRdoMisses': 1000}))
374 
375 
376  # Prepare output
377  from xAODMetaDataCnv.InfileMetaDataConfig import SetupMetaDataForStreamCfg
378  from AthenaConfiguration.Enums import MetadataCategory
379  cfg.merge(SetupMetaDataForStreamCfg(flags,"AOD",
380  createMetadata=[
381  MetadataCategory.ByteStreamMetaData,
382  MetadataCategory.LumiBlockMetaData,
383  MetadataCategory.TruthMetaData,
384  MetadataCategory.IOVMetaData,],))
385 
386  from OutputStreamAthenaPool.OutputStreamConfig import addToAOD
387  cfg.merge(addToAOD(flags, OutputItemList))
388 
389  flags.dump()
390 
391  from AthenaCommon.Constants import DEBUG
392  cfg.foreach_component("AthEventSeq/*").OutputLevel = DEBUG
393  cfg.printConfig(withDetails=True, summariseProps=True)
394  cfg.store(open("F100IntegrationAlg.pkl", "wb"))
395  cfg.run(flags.Exec.MaxEvents)
396 
397 
398 
F100IntegrationConfig.F1X0IntegrationCfg
def F1X0IntegrationCfg(flags, name='F1X0IntegrationAlg', **kwarg)
Definition: F100IntegrationConfig.py:7
python.ITkTrackRecoConfig.ITkTrackRecoCfg
ComponentAccumulator ITkTrackRecoCfg(flags)
Main ITk tracking config #####################.
Definition: ITkTrackRecoConfig.py:514
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ComponentAccumulator
Definition: JetAnalysisCommon.py:342
F100IntegrationConfig.F110StreamIntegrationCfg
def F110StreamIntegrationCfg(flags, name='F110StreamIntegrationAlg', **kwarg)
Definition: F100IntegrationConfig.py:136
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def ITkPixelDetectorElementStatusAlgCfg(flags, name="ITkPixelDetectorElementStatusAlg", **kwargs)
Definition: ITkPixelConditionsConfig.py:178
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def GEN_AOD2xAODCfg(flags, name="GEN_AOD2xAOD", **kwargs)
Definition: xAODTruthCnvConfig.py:22
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def F100DataEncodingCfg(flags, name='F100DataEncodingAlg', **kwarg)
Definition: F100IntegrationConfig.py:166
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def FPGAClusterSortingAlgCfg(flags, name="FPGAClusterSortingAlg", **kwargs)
Definition: FPGAClusterSortingConfig.py:6
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Definition: DataPrepConfig.py:25
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def TruthParticleIndexDecoratorAlgCfg(flags, name='TruthParticleIndexDecoratorAlg', **kwargs)
Definition: InDetPrepRawDataToxAODConfig.py:6
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def regSelTool_ITkPixel_Cfg(flags)
Definition: RegSelToolConfig.py:120
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Definition: GenericMonitoringTool.h:51
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Definition: ITkStripConditionsAlgorithmsConfig.py:91
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def FPGAClusterSortingCfg(flags, **kwargs)
Definition: F100IntegrationConfig.py:195
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def F100StreamIntegrationCfg(flags, name='F100StreamIntegrationAlg', **kwarg)
Definition: F100IntegrationConfig.py:77
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Definition: F100IntegrationConfig.py:211
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def MainServicesCfg(flags, LoopMgr='AthenaEventLoopMgr')
Definition: MainServicesConfig.py:310
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some useful constants -------------------------------------------------—
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Definition: calibdata.py:235
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Definition: DataPrepConfig.py:31
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def F1X0XRTIntegrationCfg(flags, name='F1X0IntegrationAlg', **kwarg)
Definition: F100IntegrationConfig.py:45
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def F110IntegrationCfg(flags, name='F110IntegrationAlg', **kwarg)
Definition: F100IntegrationConfig.py:109
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Definition: PoolReadConfig.py:71
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Definition: F100IntegrationConfig.py:203
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def FPGAOutputValidationCfg(flags, **kwargs)
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Definition: F100IntegrationConfig.py:181
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