ATLAS Offline Software
F150KernelTesterAlg.cxx
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1 /*
2 Copyright (C) 2002-2025 CERN for the benefit of the ATLAS collaboration
3 */
4 
5 #include "EFTrackingFPGAPipeline/F150KernelTesterAlg.h"
6 #include "EFTrackingFPGAUtility/EFTrackingTransient.h"
7 #include "AthenaKernel/Chrono.h"
8 #include "EFTrackingFPGAPipeline/DataPreparationPipeline.h"
9 
10 #include <iostream>
11 #include <fstream> // Required for std::ofstream
12 
13 namespace EFTrackingFPGAIntegration
14 {
15  std::string F150KernelTesterAlg::get_cu_name(const std::string& kernel_name, int cu) {
16  std::string full_cu_name = kernel_name + ":{" + kernel_name + "_" + std::to_string(cu) + "}";
17  ATH_MSG_DEBUG("LOADING " + full_cu_name);
18  return full_cu_name;
19  }
20 
21  void F150KernelTesterAlg::dumpHexData(std::span<const uint64_t> data, const std::string& dataDescriptor, const EventContext &ctx) const {
22 
23  if(!m_outputTextFile) return;
24  auto withEvt = [&](const std::string& fname) {
25  const auto evt = ctx.eventID().event_number(); // get current event number
26  const auto dot = fname.rfind('.');
27  if (dot == std::string::npos) {
28  return fname + "_" + std::to_string(evt);
29  }
30  return fname.substr(0, dot) + "_" + std::to_string(evt) + fname.substr(dot);
31  };
32 
33 
34  ATH_MSG_DEBUG("STARTING " << dataDescriptor << " words:");
35  std::ofstream outputFile(withEvt(dataDescriptor));
36 
37  for (uint64_t d : data) {
38  outputFile << std::hex << std::setw(16) << std::setfill('0') << d << '\n';
39  }
40 
41  // Write different data types
42  outputFile.close();
43  }
44 
45  StatusCode F150KernelTesterAlg::initialize()
46  {
47  ATH_MSG_INFO("Running on the FPGA accelerator");
48  ATH_MSG_INFO("Testing Slicing Engine: " + m_runSE);
49  ATH_MSG_INFO("Testing Inside Out: " + m_runIO);
50  ATH_MSG_INFO("Testing Inside Out on Slicing Engine Output: " + m_runIOOnSE);
51 
52  ATH_CHECK(m_chronoSvc.retrieve());
53 
54  {
55  Athena::Chrono chrono("Platform and device initialize", m_chronoSvc.get());
56  ATH_CHECK(IntegrationBase::initialize());
57  }
58 
59  {
60  Athena::Chrono chrono("CL::loadProgram", m_chronoSvc.get());
61  ATH_MSG_INFO("Loading Program: " + m_xclbin);
62  ATH_CHECK(IntegrationBase::loadProgram(m_xclbin));
63  }
64 
65  cl_int err = CL_SUCCESS;
66 
67  int cu = 1;
68 
69 
70  // Pixel clustering
71  m_pixelClusteringKernel = cl::Kernel(m_program, get_cu_name(m_pixelClusterKernelName, cu).c_str(), &err);
72 
73  // Strip clustering
74  m_stripClusteringKernel = cl::Kernel(m_program, get_cu_name(m_stripClusterKernelName, cu).c_str(), &err);
75 
76  // Strip L2G
77  m_stripL2GKernel = cl::Kernel(m_program, get_cu_name(m_stripL2GKernelName, cu).c_str(), &err);
78 
79  // EDM prep
80  m_pixelEdmPrepKernel = cl::Kernel(m_program, get_cu_name(m_pixelEdmKernelName, cu).c_str(), &err);
81  m_stripEdmPrepKernel = cl::Kernel(m_program, get_cu_name(m_stripEdmKernelName, cu).c_str(), &err);
82 
83  // Slicing
84  m_slicingEngineInput = cl::Kernel(m_program, get_cu_name(m_slicingEngineInputName, cu).c_str(), &err);
85  m_slicingEngineOutput = cl::Kernel(m_program, get_cu_name(m_slicingEngineOutputName, cu).c_str(), &err);
86 
87  // inside out
88  m_insideOutInput = cl::Kernel(m_program, get_cu_name(m_insideOutInputName, cu).c_str(), &err);
89  m_insideOutOutput = cl::Kernel(m_program, get_cu_name(m_insideOutOutputName, cu).c_str(), &err);
90 
91 
92  m_queue = cl::CommandQueue(m_context, m_accelerator, CL_QUEUE_PROFILING_ENABLE | CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE, &err);
93 
94  if (err != CL_SUCCESS) {
95  return StatusCode::FAILURE;
96  }
97 
98  ATH_CHECK(m_xaodClusterMaker.retrieve());
99  ATH_CHECK(m_testVectorTool.retrieve());
100  ATH_CHECK(m_FPGADataFormatTool.retrieve());
101  ATH_CHECK(m_outputConversionTool.retrieve());
102 
103  // Initialize track sim keys
104  ATH_CHECK(m_FPGAHitKey.initialize());
105  ATH_CHECK(m_FPGASlicedHitKey.initialize());
106  ATH_CHECK(m_FPGATrackKey.initialize());
107 
108  ATH_CHECK(m_FPGATrackOutput.initialize());
109 
110  // Only needed if we are running the full F150
111  ATH_CHECK(m_FPGAStripRDO.initialize(m_runFull150));
112  ATH_CHECK(m_FPGAPixelRDO.initialize(m_runFull150));
113  ATH_CHECK(m_FPGAStripOutput.initialize(m_runFull150));
114  ATH_CHECK(m_FPGAPixelOutput.initialize(m_runFull150));
115 
116 
117  return StatusCode::SUCCESS;
118  }
119 
120  StatusCode F150KernelTesterAlg::execute(const EventContext &ctx) const
121  {
122  ATH_MSG_DEBUG("Executing F150KernelTesterAlg");
123 
124 
125  SG::ReadHandle<FPGATrackSimTrackCollection> outTrackCollection(m_FPGATrackKey, ctx);
126  // if not running the full IO, use the simulation to write the output to storegate
127  if(!m_runIOOnSE && !m_runIO)
128  {
129  SG::WriteHandle<std::vector<uint64_t>> FPGATrackOutput(m_FPGATrackOutput, ctx);
130  auto outputVec = std::make_unique<std::vector<uint64_t>>();
131 
132  ATH_CHECK(m_FPGADataFormatTool->convertFPGATracksToFPGADataFormat(outTrackCollection.cptr(), *outputVec, ctx));
133  // Now record the filled vector
134  ATH_CHECK(FPGATrackOutput.record(std::move(outputVec)));
135  }
136 
137  // Prepare the inputs for testing
138  ATH_MSG_DEBUG("Accessing SE In data.");
139  std::vector<uint64_t> pixelDataIN;
140  std::vector<uint64_t> stripDataIN;
141  SG::ReadHandle<FPGATrackSimHitCollection> hitCollectionHandle(m_FPGAHitKey, ctx);
142  ATH_CHECK(m_FPGADataFormatTool->convertFPGAHitsToFPGADataFormat(hitCollectionHandle.cptr(), true, false, pixelDataIN, ctx));
143  ATH_CHECK(m_FPGADataFormatTool->convertFPGAHitsToFPGADataFormat(hitCollectionHandle.cptr(), false, true, stripDataIN, ctx));
144  dumpHexData(pixelDataIN, "FPGATrackSim_slicingIn_pixel.txt", ctx);
145  dumpHexData(stripDataIN, "FPGATrackSim_slicingIn_strip.txt", ctx);
146 
147  ATH_MSG_DEBUG("Accessing SE Out data.");
148  std::vector<uint64_t> dataPixelOut;
149  std::vector<uint64_t> dataStripOut;
150  SG::ReadHandle<FPGATrackSimHitCollection> outhitCollectionHandle(m_FPGASlicedHitKey, ctx);
151  ATH_CHECK(m_FPGADataFormatTool->convertFPGASliceToFPGADataFormat(outhitCollectionHandle.cptr(), true, false, dataPixelOut, ctx));
152  ATH_CHECK(m_FPGADataFormatTool->convertFPGASliceToFPGADataFormat(outhitCollectionHandle.cptr(), false, true, dataStripOut, ctx));
153  dumpHexData(dataPixelOut, "FPGATrackSim_slicingOut_pixel.txt", ctx);
154  dumpHexData(dataStripOut, "FPGATrackSim_slicingOut_strip.txt", ctx);
155 
156  ATH_MSG_DEBUG("Accessing SE Out data.");
157  std::vector<uint64_t> dataInsideOut;
158  ATH_CHECK(m_FPGADataFormatTool->convertFPGATracksToFPGADataFormat(outTrackCollection.cptr(), dataInsideOut, ctx));
159  dumpHexData(dataInsideOut, "FPGATrackSim_insideOut.txt", ctx);
160 
161 
162  cl_int err = CL_SUCCESS;
163 
164  // increment the event if there is data in this event
165  if(pixelDataIN.size() > 6) m_numEvents++;
166 
167  // initialize buffers
168  m_pixelClusterInputBuffer = cl::Buffer(m_context, CL_MEM_READ_ONLY, EFTrackingTransient::PIXEL_CONTAINER_INPUT_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
169  m_stripClusterInputBuffer = cl::Buffer(m_context, CL_MEM_READ_ONLY, EFTrackingTransient::STRIP_CONTAINER_INPUT_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
170 
171  // Clustering
172  m_pixelClusterOutputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE,EFTrackingTransient::PIXEL_BLOCK_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
173  m_stripClusterOutputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE, EFTrackingTransient::STRIP_BLOCK_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
174  m_pixelClusterEDMOutputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE,EFTrackingTransient::PIXEL_BLOCK_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
175  m_stripClusterEDMOutputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE, EFTrackingTransient::STRIP_BLOCK_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
176 
177  // L2G
178  m_stripL2GOutputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE, EFTrackingTransient::STRIP_BLOCK_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
179  m_stripL2GEDMOutputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE, EFTrackingTransient::STRIP_BLOCK_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
180 
181  // EDMPrep
182  m_edmPixelOutputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE, EFTrackingTransient::PIXEL_CONTAINER_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
183  m_edmStripOutputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE, EFTrackingTransient::STRIP_CONTAINER_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
184 
185  m_slicingEngineInputBuffer = cl::Buffer(m_context, CL_MEM_READ_ONLY, pixelDataIN.size() * sizeof(uint64_t), nullptr, &err);
186  m_slicingEngineOutputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE, EFTrackingTransient::TRACK_CONTAINER_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
187  m_insideOutInputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE, dataPixelOut.size() * sizeof(uint64_t), nullptr, &err);
188  m_insideOutOutputBuffer = cl::Buffer(m_context, CL_MEM_READ_WRITE, EFTrackingTransient::TRACK_CONTAINER_BUF_SIZE * sizeof(uint64_t), nullptr, &err);
189 
190 
191  if (m_runSE) {
192  // Events (write → kSEInput → kSEOutput → read)
193  cl::Event evtSEWriteIn;
194  cl::Event evtSEKInputDone;
195  cl::Event evtSEKOutputDone;
196  cl::Event evtSEReadOut;
197 
198  m_slicingEngineInput.setArg(0, m_slicingEngineInputBuffer);
199  m_slicingEngineInput.setArg(2, static_cast<unsigned long long>(pixelDataIN.size()));
200 
201  m_slicingEngineOutput.setArg(1, m_slicingEngineOutputBuffer);
202 
203  ATH_MSG_DEBUG("Transferring SE data");
204  m_queue.enqueueWriteBuffer(m_slicingEngineInputBuffer, CL_FALSE, 0, pixelDataIN.size() * sizeof(uint64_t), pixelDataIN.data(), nullptr, &evtSEWriteIn);
205 
206  // Execute
207  ATH_MSG_DEBUG("Executing SE Kernel");
208  std::vector<cl::Event> waitAfterSEWrite{evtSEWriteIn};
209  m_queue.enqueueTask(m_slicingEngineInput, &waitAfterSEWrite, &evtSEKInputDone);
210  m_queue.enqueueTask(m_slicingEngineOutput, nullptr, &evtSEKOutputDone);
211 
212  // Read
213  ATH_MSG_DEBUG("Reading output data from kernel");
214  std::vector<uint64_t> out_data(EFTrackingTransient::TRACK_CONTAINER_BUF_SIZE * sizeof(uint64_t), 0);
215  std::vector<cl::Event> waitForSERead{evtSEKOutputDone};
216  m_queue.enqueueReadBuffer(m_slicingEngineOutputBuffer, /*blocking*/ CL_FALSE, 0, EFTrackingTransient::TRACK_CONTAINER_BUF_SIZE * sizeof(uint64_t) ,out_data.data(),&waitForSERead, &evtSEReadOut);
217 
218  // Optional explicit sync (blocking read already waits)
219  cl::Event::waitForEvents({evtSEReadOut});
220 
221  dumpHexData(out_data, "HW_slicingOut_pixel.txt", ctx);
222 
223  m_SE_kernelTime += evtSEKOutputDone.getProfilingInfo<CL_PROFILING_COMMAND_END>() - evtSEKInputDone.getProfilingInfo<CL_PROFILING_COMMAND_START>();
224 
225  }
226  if (m_runIO)
227  {
228  cl::Event evtWriteIn;
229  cl::Event evtKInputDone;
230  cl::Event evtKOutputDone;
231  cl::Event evtReadOut;
232 
233  ATH_MSG_DEBUG("Setting IO args");
234  m_insideOutInput.setArg(0, m_insideOutInputBuffer);
235  m_insideOutOutput.setArg(0, m_insideOutOutputBuffer);
236 
237  ATH_MSG_DEBUG("Loading input data to IO input kernel");
238  m_queue.enqueueWriteBuffer(m_insideOutInputBuffer, CL_TRUE, 0, dataPixelOut.size() * sizeof(uint64_t), dataPixelOut.data(), nullptr, &evtWriteIn);
239 
240  // Execute
241  ATH_MSG_DEBUG("Executing IO Kernel");
242  std::vector<cl::Event> waitAfterWrite{evtWriteIn};
243  m_queue.enqueueTask(m_insideOutInput, &waitAfterWrite, &evtKInputDone);
244  m_queue.enqueueTask(m_insideOutOutput, nullptr, &evtKOutputDone);
245 
246  // Read
247  ATH_MSG_DEBUG("Reading output data from kernel");
248 
249  // output handles
250  SG::WriteHandle<std::vector<uint64_t>> FPGATrackOutput(m_FPGATrackOutput, ctx);
251  ATH_CHECK(FPGATrackOutput.record(std::make_unique<std::vector<uint64_t> >(EFTrackingTransient::TRACK_CONTAINER_BUF_SIZE, 0)));
252 
253  std::vector<cl::Event> waitForRead{evtKOutputDone};
254  m_queue.enqueueReadBuffer( m_insideOutOutputBuffer, CL_FALSE, 0, sizeof(uint64_t) * (*FPGATrackOutput).size(), (*FPGATrackOutput).data(), &waitForRead, &evtReadOut);
255 
256  // Ensure completion (optional since read is blocking, but explicit is fine)
257  cl::Event::waitForEvents({evtReadOut});
258  dumpHexData((*FPGATrackOutput), "HW_insideOut.txt", ctx);
259 
260  m_IO_kernelTime += evtKOutputDone.getProfilingInfo<CL_PROFILING_COMMAND_END>() - evtKInputDone.getProfilingInfo<CL_PROFILING_COMMAND_START>();
261  }
262 
263  if (m_runIOOnSE)
264  {
265  cl::Event evtSEWriteIn;
266  cl::Event evtSEKInputDone;
267  cl::Event evtSEKOutputDone;
268 
269  cl::Event evtKInputDone;
270  cl::Event evtKOutputDone;
271  cl::Event evtReadOut;
272 
273  ATH_MSG_DEBUG("Allocating SE buffers");
274  const size_t pixel_size_bytesIN = pixelDataIN.size() * sizeof(uint64_t);
275 
276  m_slicingEngineInput.setArg(0, m_slicingEngineInputBuffer);
277  m_slicingEngineInput.setArg(2, static_cast<unsigned long long>(pixelDataIN.size()));
278 
279  m_slicingEngineOutput.setArg(1, m_slicingEngineOutputBuffer);
280 
281  ATH_MSG_DEBUG("Setting IO args");
282  m_insideOutInput.setArg(0, m_slicingEngineOutputBuffer);
283  m_insideOutOutput.setArg(0, m_insideOutOutputBuffer);
284 
285 
286  ATH_MSG_DEBUG("Transferring SE data");
287  m_queue.enqueueWriteBuffer(m_slicingEngineInputBuffer, CL_FALSE, 0, pixel_size_bytesIN, pixelDataIN.data(), nullptr, &evtSEWriteIn);
288 
289  // Execute
290  ATH_MSG_DEBUG("Executing SE Kernel");
291  std::vector<cl::Event> waitAfterSEWrite{evtSEWriteIn};
292  m_queue.enqueueTask(m_slicingEngineInput, &waitAfterSEWrite, &evtSEKInputDone);
293  m_queue.enqueueTask(m_slicingEngineOutput, nullptr, &evtSEKOutputDone);
294 
295  // Execute
296  ATH_MSG_DEBUG("Executing IO Kernel");
297  std::vector<cl::Event> waitAfterSE{evtSEKOutputDone};
298  m_queue.enqueueTask(m_insideOutInput, &waitAfterSE, &evtKInputDone);
299  m_queue.enqueueTask(m_insideOutOutput, nullptr, &evtKOutputDone);
300 
301  // Read
302  ATH_MSG_DEBUG("Reading output data from kernel");
303  std::vector<cl::Event> waitForRead{evtKOutputDone};
304 
305  // output handles
306  SG::WriteHandle<std::vector<uint64_t>> FPGATrackOutput(m_FPGATrackOutput, ctx);
307  ATH_CHECK(FPGATrackOutput.record(std::make_unique<std::vector<uint64_t> >(EFTrackingTransient::TRACK_CONTAINER_BUF_SIZE, 0)));
308 
309  m_queue.enqueueReadBuffer( m_insideOutOutputBuffer, CL_FALSE, 0, sizeof(uint64_t) * (*FPGATrackOutput).size(), (*FPGATrackOutput).data(), &waitForRead, &evtReadOut);
310 
311  // Ensure completion (optional since read is blocking, but explicit is fine)
312  cl::Event::waitForEvents({evtReadOut});
313  dumpHexData((*FPGATrackOutput), "HW_insideOut.txt", ctx);
314 
315  m_SE_kernelTime += evtSEKOutputDone.getProfilingInfo<CL_PROFILING_COMMAND_END>() - evtSEKInputDone.getProfilingInfo<CL_PROFILING_COMMAND_START>();
316  m_IO_kernelTime += evtKOutputDone.getProfilingInfo<CL_PROFILING_COMMAND_END>() - evtKInputDone.getProfilingInfo<CL_PROFILING_COMMAND_START>();
317  }
318 
319  if(m_runFull150)
320  {
321  // Get the input data
322  auto pixelInput = SG::get(m_FPGAPixelRDO, ctx);
323  auto stripInput = SG::get(m_FPGAStripRDO, ctx);
324 
325  // Set kernel arguments
326  m_pixelClusteringKernel.setArg(0, m_pixelClusterInputBuffer);
327  m_pixelClusteringKernel.setArg(1, m_pixelClusterEDMOutputBuffer);
328 
329  m_stripClusteringKernel.setArg(0, m_stripClusterInputBuffer);
330  m_stripClusteringKernel.setArg(1, m_stripClusterOutputBuffer);
331  m_stripClusteringKernel.setArg(2, m_stripClusterEDMOutputBuffer);
332  m_stripClusteringKernel.setArg(3, static_cast<unsigned int>((*stripInput).size()));
333 
334  m_stripL2GKernel.setArg(0, m_stripClusterOutputBuffer);
335  m_stripL2GKernel.setArg(1, m_stripClusterEDMOutputBuffer);
336  m_stripL2GKernel.setArg(2, m_stripL2GOutputBuffer);
337  m_stripL2GKernel.setArg(3, m_stripL2GEDMOutputBuffer);
338 
339  m_pixelEdmPrepKernel.setArg(0, m_pixelClusterEDMOutputBuffer);
340  m_pixelEdmPrepKernel.setArg(1, m_edmPixelOutputBuffer);
341  m_stripEdmPrepKernel.setArg(0, m_stripL2GEDMOutputBuffer);
342  m_stripEdmPrepKernel.setArg(1, m_edmStripOutputBuffer);
343 
344  m_slicingEngineInput.setArg(0, m_pixelClusterInputBuffer); // TO change
345  m_slicingEngineInput.setArg(3, static_cast<unsigned int>((*pixelInput).size()));
346 
347  m_slicingEngineOutput.setArg(1, m_slicingEngineOutputBuffer);
348 
349  m_insideOutInput.setArg(0, m_slicingEngineOutputBuffer);
350  m_insideOutOutput.setArg(0, m_insideOutOutputBuffer);
351 
352  // Start the transfers
353  cl::Event evt_write_pixel_input;
354  cl::Event evt_write_strip_input;
355 
356  m_queue.enqueueWriteBuffer(m_pixelClusterInputBuffer, CL_FALSE, 0, sizeof(uint64_t) * (*pixelInput).size(), (*pixelInput).data(), nullptr, &evt_write_pixel_input);
357  m_queue.enqueueWriteBuffer(m_stripClusterInputBuffer, CL_FALSE, 0, sizeof(uint64_t) * (*stripInput).size(), (*stripInput).data(), nullptr, &evt_write_strip_input);
358  std::vector<cl::Event> evt_vec_pixel_input{evt_write_pixel_input};
359  std::vector<cl::Event> evt_vec_strip_input{evt_write_strip_input};
360 
361  cl::Event evt_pixel_clustering;
362  cl::Event evt_strip_clustering;
363  cl::Event evt_strip_l2g;
364  cl::Event evt_edm_prep;
365  cl::Event evt_pixel_edm_prep;
366  cl::Event evt_strip_edm_prep;
367  cl::Event evt_Slicing_InputDone;
368  cl::Event evt_Slicing_OutputDone;
369  cl::Event evt_Insideout_InputDone;
370  cl::Event evt_Insideout_OutputDone;
371  cl::Event evt_pixel_cluster_output;
372  cl::Event evt_strip_cluster_output;
373  cl::Event evt_track_output;
374 
375  m_queue.enqueueTask(m_pixelClusteringKernel, &evt_vec_pixel_input, &evt_pixel_clustering);
376  m_queue.enqueueTask(m_stripClusteringKernel, &evt_vec_strip_input, &evt_strip_clustering);
377 
378  std::vector<cl::Event> evt_vec_strip_clustering{evt_strip_clustering};
379  m_queue.enqueueTask(m_stripL2GKernel, &evt_vec_strip_clustering, &evt_strip_l2g);
380 
381  std::vector<cl::Event> evt_vec_pixelEDM {evt_pixel_clustering};
382  std::vector<cl::Event> evt_vec_strip_l2g{evt_strip_l2g};
383  m_queue.enqueueTask(m_pixelEdmPrepKernel, &evt_vec_pixelEDM, &evt_pixel_edm_prep);
384  m_queue.enqueueTask(m_stripEdmPrepKernel, &evt_vec_strip_l2g, &evt_strip_edm_prep);
385 
386  // Execute
387  std::vector<cl::Event> evt_vec_pixelClustering{evt_pixel_clustering};
388  m_queue.enqueueTask(m_slicingEngineInput, &evt_vec_pixelClustering, &evt_Slicing_InputDone);
389  m_queue.enqueueTask(m_slicingEngineOutput, nullptr, &evt_Slicing_OutputDone);
390 
391  // Execute
392  std::vector<cl::Event> evt_vec_slicing{evt_Slicing_OutputDone};
393  m_queue.enqueueTask(m_insideOutInput, &evt_vec_slicing, &evt_Insideout_InputDone);
394  m_queue.enqueueTask(m_insideOutOutput, nullptr, &evt_Insideout_OutputDone);
395 
396  // output handles
397  SG::WriteHandle<std::vector<uint64_t>> FPGAPixelOutput(m_FPGAPixelOutput, ctx);
398  ATH_CHECK(FPGAPixelOutput.record(std::make_unique<std::vector<uint64_t> >(EFTrackingTransient::PIXEL_CONTAINER_BUF_SIZE, 0)));
399 
400  SG::WriteHandle<std::vector<uint64_t>> FPGAStripOutput(m_FPGAStripOutput, ctx);
401  ATH_CHECK(FPGAStripOutput.record(std::make_unique<std::vector<uint64_t> >(EFTrackingTransient::STRIP_CONTAINER_BUF_SIZE, 0)));
402 
403  SG::WriteHandle<std::vector<uint64_t>> FPGATrackOutput(m_FPGATrackOutput, ctx);
404  ATH_CHECK(FPGATrackOutput.record(std::make_unique<std::vector<uint64_t> >(EFTrackingTransient::TRACK_CONTAINER_BUF_SIZE, 0)));
405 
406  std::vector<cl::Event> evt_vec_pixel_edm_prep{evt_pixel_edm_prep};
407  std::vector<cl::Event> evt_vec_strip_edm_prep{evt_strip_edm_prep};
408  std::vector<cl::Event> waitForInsideout{evt_Insideout_OutputDone};
409  m_queue.enqueueReadBuffer(m_edmPixelOutputBuffer, CL_FALSE, 0, sizeof(uint64_t) * (*FPGAPixelOutput).size(), (*FPGAPixelOutput).data(), &evt_vec_pixel_edm_prep, &evt_pixel_cluster_output);
410  m_queue.enqueueReadBuffer(m_edmStripOutputBuffer, CL_FALSE, 0, sizeof(uint64_t) * (*FPGAStripOutput).size(), (*FPGAStripOutput).data(), &evt_vec_strip_edm_prep, &evt_strip_cluster_output);
411  m_queue.enqueueReadBuffer( m_insideOutOutputBuffer, CL_FALSE, 0, sizeof(uint64_t) * (*FPGATrackOutput).size(), (*FPGATrackOutput).data(), &waitForInsideout, &evt_track_output);
412 
413  std::vector<cl::Event> wait_for_reads = { evt_pixel_cluster_output, evt_strip_cluster_output, evt_track_output };
414  cl::Event::waitForEvents(wait_for_reads);
415 
416 
417  }
418  return StatusCode::SUCCESS;
419  }
420 
421  StatusCode F150KernelTesterAlg::finalize()
422  {
423  ATH_MSG_INFO("Finalizing F150KernelTesterAlg");
424  ATH_MSG_INFO("Number of events: " << m_numEvents);
425 
426  if(m_numEvents > 0){
427  ATH_MSG_INFO("Inside out ave time: " << m_IO_kernelTime / m_numEvents / 1e6 << " ms");
428  ATH_MSG_INFO("Slicing Engine ave time: " << m_SE_kernelTime / m_numEvents / 1e6 << " ms");
429  }
430 
431  return StatusCode::SUCCESS;
432  }
433  }
434 
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