FPGATrackSimMergeOutputsAlg Node1 FPGATrackSimMergeOutputsAlg - m_inpaths - m_overlapRemovalTool - m_evtloop - N + FPGATrackSimMergeOutputsAlg() + ~FPGATrackSimMergeOutputsAlg() + initialize() + execute() + finalize() Node2 AthAlgorithm - m_extendedExtraObjects + AthAlgorithm() + ~AthAlgorithm() + sysInitialize() + extraOutputDeps() - AthAlgorithm() - AthAlgorithm() - operator=() Node2->Node1 Node9 SG::WriteHandleKey < FPGATrackSimTrackCollection > + WriteHandleKey() + WriteHandleKey() + operator=() Node9->Node1 -m_FPGATrackKey Node46 std::vector< std::vector < TTree * > > Node46->Node1 -m_trees Node48 TTree Node48->Node1 -m_dataprep_tree Node49 FPGATrackSimLogicalEvent InputHeader + FPGATrackSimLogicalEvent InputHeader() + ~FPGATrackSimLogicalEvent InputHeader() + reset() + newEvent() + event() + optional() + setOptional() + towers() + nTowers() + addTower() + getTower() + reserveTowers() + addTowers() Node49->Node1 -m_dataprep Node70 SG::WriteHandleKey < FPGATrackSimHitCollection > + WriteHandleKey() + WriteHandleKey() + operator=() Node70->Node1 -m_FPGAHitKey Node71 std::vector< std::vector < FPGATrackSimLogicalEventOutput Header * > > + elements Node71->Node1 -m_eventOutputHeaders Node72 std::vector< TFile * > Node72->Node1 -m_files Node59 long Node59->Node1 -m_tracksPassOR -m_alltracks