ATLAS Offline Software
TGCNSW.cxx
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1 /*
2  Copyright (C) 2002-2023 CERN for the benefit of the ATLAS collaboration
3 */
4 
5 
6 #include "TrigT1TGC/TGCNSW.h"
7 #include "TrigT1TGC/NSWTrigOut.h"
8 
9 namespace LVL1TGC {
10 
12 : AthMessaging("LVL1TGC::TGCNSW") {
13  for (int side=0; side < 2; side++) {
14  for (int TP=0; TP < NumberOfNSWTriggerProcesser; TP++) {
15  std::vector<int> vecTP;
16  vecTP.push_back(TP);
17  m_buffer[side][TP].reset(new NSWTrigOut(side, vecTP));
18  }
19  }
20 }
21 
23  ATH_MSG_DEBUG("retrieve");
24  this->eraseOutput();
25 
26  //The following part will be available when NSW Trigger Output is available.
27 
28  SG::ReadHandle<Muon::NSW_TrigRawDataContainer> readNSW_TrigRawDataContainer(key);
29  if(!readNSW_TrigRawDataContainer.isValid()){
30  ATH_MSG_ERROR("Cannot retrieve NSW TrigRawData Container.");
31  return StatusCode::FAILURE;
32  }
33  const Muon::NSW_TrigRawDataContainer* nsw_TrigRawDataContainer = readNSW_TrigRawDataContainer.cptr();
34  for(const Muon::NSW_TrigRawData* nsw_sector : *nsw_TrigRawDataContainer){
35  for(const Muon::NSW_TrigRawDataSegment* nsw_trk : *nsw_sector){
36  int nsw_sideId = (nsw_sector->sectorSide()=='A')?0:1;
37  this->setOutput(nsw_sideId, // side
38  nsw_sector->sectorId(), // Sector number in NSW
39  nsw_trk->rIndex(), // R-index
40  nsw_trk->phiIndex(), // Phi-index
41  nsw_trk->deltaTheta(), // Delta theta index
42  nsw_trk->lowRes(),
43  nsw_trk->phiRes(),
44  nsw_trk->monitor()); // monitoring flag
45  }
46  }
47 
48  return StatusCode::SUCCESS;
49 }
50 
51 
52 std::shared_ptr<const NSWTrigOut>
53 TGCNSW::getOutput(LVL1TGCTrigger::TGCRegionType region ,int side,int TGC_TriggerSector) const
54 {
55  auto indexIsOk = [this](int idx)->bool{
56  if (not ((idx >=0 ) and (idx < NumberOfNSWTriggerProcesser))){
57  ATH_MSG_ERROR("index out of range in TGCNSW::getOutput");
58  return false;
59  }
60  return true;
61  };
62 
63  std::shared_ptr<NSWTrigOut> trigNSW_output;
64  trigNSW_output.reset(new NSWTrigOut());
65  trigNSW_output->clear();
66  if ( (side<0)||(side>1) ) return 0;
68  if ( TGC_TriggerSector<0 || TGC_TriggerSector>47 ) return 0;
69 
70  int temp=int((TGC_TriggerSector-2)/6);
71  int NSW_TriggerSector=temp*2+int((TGC_TriggerSector-1-6*temp)/5);
72  if(TGC_TriggerSector==0 || TGC_TriggerSector==1) {
73  NSW_TriggerSector=15;
74  }
75 
76  //
77  // SL input 0-1
78  if (not indexIsOk(NSW_TriggerSector)) return nullptr;
79  *trigNSW_output+=*m_buffer[side][NSW_TriggerSector];
80  // SL input 2-3
81  if ( NSW_TriggerSector == 15 ) {
82  *trigNSW_output+=*m_buffer[side][0];
83  } else {
84  if (not indexIsOk(NSW_TriggerSector + 1)) return nullptr;
85  *trigNSW_output+=*m_buffer[side][NSW_TriggerSector+1];
86  }
87 
88  if( !(TGC_TriggerSector%6==4 || TGC_TriggerSector%6==5) ){
89  return trigNSW_output;
90  }
91 
93  if ( NSW_TriggerSector==14 ) {
95  *trigNSW_output+=*m_buffer[side][0];
96  } else {
98  if (not indexIsOk(NSW_TriggerSector + 2)) return nullptr;
99  *trigNSW_output+=*m_buffer[side][NSW_TriggerSector+2];
100  }
101 
102  return trigNSW_output;
103  }
104 
106  if ( TGC_TriggerSector<0 || TGC_TriggerSector>23 ) return 0;
107 
109  int temp=int((TGC_TriggerSector-4)/6);
110  int NSW_TriggerSector=temp*4+int((TGC_TriggerSector-6*temp-4)/2)+2;
111  if(TGC_TriggerSector==0 || TGC_TriggerSector==1)
112  NSW_TriggerSector=15;
113  else if(TGC_TriggerSector==2 || TGC_TriggerSector==3)
114  NSW_TriggerSector=0;
115 
117  if (not indexIsOk(NSW_TriggerSector)) return nullptr;
118  *trigNSW_output+=*m_buffer[side][NSW_TriggerSector];
120  if(TGC_TriggerSector==0 || TGC_TriggerSector==1){
121  *trigNSW_output+=*m_buffer[side][0];
122  *trigNSW_output+=*m_buffer[side][1];
123  }else if(TGC_TriggerSector==22 || TGC_TriggerSector==23){
124  if (not indexIsOk(NSW_TriggerSector + 1)) return nullptr;
125  *trigNSW_output+=*m_buffer[side][NSW_TriggerSector+1];
126  *trigNSW_output+=*m_buffer[side][0];
127  }else{
128  if (not indexIsOk(NSW_TriggerSector + 2)) return nullptr;
129  *trigNSW_output+=*m_buffer[side][NSW_TriggerSector+1];
130  *trigNSW_output+=*m_buffer[side][NSW_TriggerSector+2];
131  }
132 
133  return trigNSW_output;
134  }
135 
136 
137  return 0;
138 }
139 
140 
141 void TGCNSW::setOutput(int side, int NSWTriggerProcesser, uint8_t NSWeta_8bit, uint8_t NSWphi_6bit, uint8_t NSWDtheta_5bit, bool lowRes, bool phiRes, bool NSWmonitor)
142 {
143  if ( (side<0)||(side>1) ) return; //side 0::Aside 1::Cside
144  if ( (NSWTriggerProcesser<0) || (NSWTriggerProcesser>=NumberOfNSWTriggerProcesser) ) return;
145  m_buffer[side][NSWTriggerProcesser]->setSide(side);
146  m_buffer[side][NSWTriggerProcesser]->setNSWTriggerProcessor(NSWTriggerProcesser);
147  m_buffer[side][NSWTriggerProcesser]->setEta(NSWeta_8bit);
148  m_buffer[side][NSWTriggerProcesser]->setPhi(NSWphi_6bit);
149  m_buffer[side][NSWTriggerProcesser]->setDtheta(NSWDtheta_5bit);
150  m_buffer[side][NSWTriggerProcesser]->setLowRes(lowRes);
151  m_buffer[side][NSWTriggerProcesser]->setPhiRes(phiRes);
152  m_buffer[side][NSWTriggerProcesser]->setMonitor(NSWmonitor);
153 }
154 
156 {
157  for(int idx1=0; idx1<2; idx1++){
158  for (int idx2=0; idx2<NumberOfNSWTriggerProcesser; idx2++){
159  m_buffer[idx1][idx2]->clear();
160  }
161  }
162 }
163 
164 void TGCNSW::print() const
165 {
166  for(int idx1=0; idx1<2; idx1++){
167  for (int idx2=0; idx2<NumberOfNSWTriggerProcesser; idx2++){
168  m_buffer[idx1][idx2]->print();
169  }
170  }
171 }
172 
173 
174 } // end of namespace
LVL1TGCTrigger::TGCRegionType::ENDCAP
@ ENDCAP
LVL1TGC::TGCNSW::eraseOutput
void eraseOutput()
Definition: TGCNSW.cxx:155
xAOD::uint8_t
uint8_t
Definition: Muon_v1.cxx:557
SG::ReadHandle::cptr
const_pointer_type cptr()
Dereference the pointer.
CaloCellPos2Ntuple.int
int
Definition: CaloCellPos2Ntuple.py:24
SG::ReadHandle
Definition: StoreGate/StoreGate/ReadHandle.h:70
Muon::NSW_TrigRawData
Definition: NSW_TrigRawData.h:15
TGCNSW.h
NSWTrigOut.h
LVL1TGCTrigger::TGCRegionType::FORWARD
@ FORWARD
SG::ReadHandleKey< Muon::NSW_TrigRawDataContainer >
LVL1TGC::TGCNSW::NumberOfNSWTriggerProcesser
@ NumberOfNSWTriggerProcesser
Definition: TGCNSW.h:34
TRT::Hit::side
@ side
Definition: HitInfo.h:83
LVL1TGC::TGCNSW::print
void print() const
Definition: TGCNSW.cxx:164
ATH_MSG_ERROR
#define ATH_MSG_ERROR(x)
Definition: AthMsgStreamMacros.h:33
EL::StatusCode
::StatusCode StatusCode
StatusCode definition for legacy code.
Definition: PhysicsAnalysis/D3PDTools/EventLoop/EventLoop/StatusCode.h:22
ATH_MSG_DEBUG
#define ATH_MSG_DEBUG(x)
Definition: AthMsgStreamMacros.h:29
LVL1TGC
Definition: BigWheelCoincidenceLUT.cxx:20
AthMessaging
Class to provide easy MsgStream access and capabilities.
Definition: AthMessaging.h:55
LVL1TGC::TGCNSW::retrieve
StatusCode retrieve(SG::ReadHandleKey< Muon::NSW_TrigRawDataContainer > key)
Definition: TGCNSW.cxx:22
Muon::NSW_TrigRawDataSegment
Definition: NSW_TrigRawDataSegment.h:15
SG::ReadHandle::isValid
virtual bool isValid() override final
Can the handle be successfully dereferenced?
LVL1TGC::TGCNSW::setOutput
void setOutput(int side, int NSWTriggerProcesser, uint8_t NSWeta_8bit, uint8_t NSWphi_6bit, uint8_t NSWDtheta_5bit, bool lowRes, bool phiRes, bool NSWmonitor)
Definition: TGCNSW.cxx:141
LVL1TGCTrigger::TGCRegionType
TGCRegionType
Definition: TGCNumbering.h:49
LVL1TGC::TGCNSW::m_buffer
std::shared_ptr< NSWTrigOut > m_buffer[LVL1TGC::TGCSide::kNSide][NumberOfNSWTriggerProcesser]
Definition: TGCNSW.h:41
LArNewCalib_DelayDump_OFC_Cali.idx
idx
Definition: LArNewCalib_DelayDump_OFC_Cali.py:69
Muon::NSW_TrigRawDataContainer
Definition: NSW_TrigRawDataContainer.h:14
LVL1TGC::NSWTrigOut
Definition: NSWTrigOut.h:16
LVL1TGC::TGCNSW::getOutput
std::shared_ptr< const NSWTrigOut > getOutput(LVL1TGCTrigger::TGCRegionType region, int side, int TGC_TriggerSector) const
Definition: TGCNSW.cxx:53
LVL1TGC::TGCNSW::TGCNSW
TGCNSW()
Definition: TGCNSW.cxx:11
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key
Definition: TElectronEfficiencyCorrectionTool.cxx:37