368 ):
369 menu = json.load(open(json_name))
370 log.setLevel(INFO)
371
372 gsim_alg_prefix = "GlobalSim_"
373
374 cfg = ComponentAccumulator()
375
376
377 cfg.addSequence(CompFactory.AthSequencer('GlobalSimPrereqs'))
378
379 cfg.addSequence(CompFactory.AthSequencer('LArPreprocessing'), parentName='GlobalSimPrereqs')
380 from GlobalSimulation.LArCellPreparationAlgConfig import LArCellPreparationAlgCfg
381 cfg.merge( LArCellPreparationAlgCfg(
382 flags,
383 name = gsim_alg_prefix+'LArCellPreparationAlg',
384 GlobalLArCellsKey='GlobalLArCells',
385 ),
386 sequenceName='LArPreprocessing'
387 )
388
389 cfg.addSequence(CompFactory.AthSequencer('GlobalSimulation'))
390
391 all_vector_outputs =
set()
392
393
394
395
396
397 tobs_to_providers = {}
398 for pname, provider in menu['algorithms'].items():
399 log.debug(f"{pname} --> {provider}")
400 output = expand_io(provider['output'])
401 log.debug('Outputs:')
402 log.debug(pformat(output))
403 _provider = dict(provider)
404 if '/' in pname:
405 _provider['type'], _provider['name'] = pname.split('/',1)
406 else:
407 _provider['type'] = _provider['name'] = pname
408 if gsim_alg_prefix:
409 _provider['name'] = gsim_alg_prefix + _provider['name']
410 _provider['input'] = expand_io(provider['input'])
411 _provider['output'] = output
412 _provider['parameters'] = {}
413 _provider['parameters'].update(provider.get('parameters',{}))
414 for otuple in output:
415 assert otuple[1] not in tobs_to_providers, f"Duplicate provider for {otuple}"
416 tobs_to_providers[otuple[1]] = _provider
417
418 log.debug(pformat(tobs_to_providers))
419
420
421
422 active_thresholds =
set()
423 TIP_bits = 0
424 for item, item_dict in menu['items'].items():
425 for threshold in item_dict['thresholds']:
426 active_thresholds.add(threshold)
427
428 for threshold in active_thresholds:
429 hypo_ca, vector_outputs, hypo_dict = L0HypoCfg(
430 flags,
431 threshold,
432 hypo_specs = menu['hypotheses'],
433 tobs_to_providers = tobs_to_providers,
434 triggerlines = menu['connectors']['L0Global']['triggerlines']
435 )
436 cfg.merge(hypo_ca,'GlobalSimulation')
437 all_vector_outputs |= vector_outputs
438
439
440 hypo_bits = sum([1<<i for i in range(hypo_dict['startbit'],hypo_dict['startbit']+hypo_dict['nbits'])])
441 assert TIP_bits & hypo_bits == 0, f"TIP bits for {threshold} overlap other thresholds"
442 TIP_bits = TIP_bits + hypo_bits
443
444
445 for tob in force_config_TOBs:
446 recurse = tob not in ignore_prereqs
447 log.info(f"Explicitly configuring {tob} from menu {'with' if recurse else 'without'} prereqs")
448 tob_cfgs, vector_outputs = config_TOB_providers(flags,tobs_to_providers,{tob},recurse)
449
450 for ca in reversed(tob_cfgs):
451 cfg.merge(ca,'GlobalSimulation')
452 all_vector_outputs |= vector_outputs
453
454
455 from OutputStreamAthenaPool.OutputStreamConfig import addToAOD
456 cfg.merge(addToAOD(flags,all_vector_outputs))
457
458 if print_detailed_config:
459 cfg.printConfig(summariseProps=True)
460
461 return cfg
462
463