13 strm << entry->getType() <<
": ";
22 if (ptr->getNumData() != 2 || ptr->getNumBits() != 4)
23 throw std::logic_error(
"Invalid input data in ZDCTriggerSimCombLUT");
25 unsigned int bitsSideA = ptr->getValueTrunc(0);
26 unsigned int bitsSideC = ptr->getValueTrunc(1);
28 unsigned int address = (bitsSideC << 4) + bitsSideA;
29 unsigned int comLUTvalue =
m_combLUT.at(address);
36 ->setDatum(comLUTvalue);
44 if (ptr->getNumData() != 2 || ptr->getNumBits() != 12)
45 throw std::logic_error(
"Invalid input data in ZDCTriggerSimAllLUTs");
48 unsigned int inputSideA = ptr->getValueTrunc(0);
49 unsigned int inputSideC = ptr->getValueTrunc(1);
51 unsigned int valueA =
m_LUTA.at(inputSideA);
52 unsigned int valueC =
m_LUTC.at(inputSideC);
59 ->setData({valueA, valueC});
69 if (ptr->getNumData() != 8 || ptr->getNumBits() != 12)
70 throw std::logic_error(
"Invalid input data in ZDCTriggerSimModuleAmpls");
72 unsigned int sumA = 0;
73 for (
size_t i = 0; i < 4; i++) {
74 sumA += ptr->getValueTrunc(i);
77 unsigned int sumC = 0;
78 for (
size_t i = 4; i < 8; i++) {
79 sumC += ptr->getValueTrunc(i);
89 ->setData({sumA, sumC});
102 if (ptr->getNumData() != 24*8 || ptr->getNumBits() != 12)
103 throw std::logic_error(
"Invalid input data in ZDCTriggerSimModuleAmpls");
105 unsigned int sampleIdx = 0;
107 std::vector<unsigned int> moduleAmplitudes;
111 for (
size_t side : {0, 1}) {
112 for (
size_t module : {0, 1, 2, 3}) {
113 std::vector<unsigned int> FADCsamples;
115 bool adcOverflow =
false;
122 for (
size_t i = 0; i < 24; i++) {
123 unsigned int ADC = ptr->getValueTrunc(sampleIdx++);
129 FADCsamples.push_back(
ADC);
140 moduleAmplitudes.push_back(4095);
149 bool havePulse =
false;
150 unsigned int maxAmp = 0;
152 unsigned int maxNeg2ndDeriv = 0;
155 if (negDeriv2nd.at(sampleTest) > maxNeg2ndDeriv) maxNeg2ndDeriv = negDeriv2nd.at(sampleTest);
165 if (FADCsamples.at(sampleTest) > maxAmp) maxAmp = FADCsamples.at(sampleTest);
170 moduleAmplitudes.push_back(std::max<int>(
int(maxAmp -
baseline), 0));
175 moduleAmplitudes.push_back(0);
192std::vector<unsigned int>
195 std::vector<unsigned int> der2ndVec(step, 0);
197 for (
size_t sample = step; sample < samples.size() - step; sample++) {
198 int diff2nd = samples[sample + step] + samples[sample - step] - 2*samples[sample];
199 if (diff2nd > 0) der2ndVec.push_back(0);
200 else der2ndVec.push_back(-diff2nd);
203 der2ndVec.insert(der2ndVec.end(), step, 0);
A tool to make L1 decision using LUTs.
virtual void doSimStage() override
std::array< unsigned int, 4096 > m_LUTA
std::array< unsigned int, 4096 > m_LUTC
void dump(std::ostream &strm) const
const ZDCTriggerSim::SimDataCPtr & stackTopData() const
void stackPush(const ZDCTriggerSim::SimDataCPtr &ptr)
std::array< unsigned int, 256 > m_combLUT
virtual void doSimStage() override
std::vector< unsigned int > CalculateNeg2ndDerivatives(const std::vector< unsigned int > &samples, unsigned int step)
std::array< std::array< int, 4 >, 2 > m_maxNegDeriv2nd
std::array< std::array< unsigned int, 4 >, 2 > m_deriv2ndThresholds
unsigned int m_maxSampleAna
std::array< std::array< unsigned int, 4 >, 2 > m_maxADC
virtual void doSimStage() override
std::array< std::array< unsigned int, 4 >, 2 > m_baseline
unsigned int m_minSampleAna
unsigned int m_baselineDelta
virtual void doSimStage() override
ZDCTriggerSimData< unsigned int, 8, 12, TModAmplsInput > ModuleAmplInputsInt
ZDCTriggerSimData< unsigned int, 2, 12, TSideLUTsInput > SideLUTInputsInt
ZDCTriggerSimData< unsigned int, 2, 4, TCombLUTInput > CombLUTInputsInt
ZDCTriggerSimData< unsigned int, 1, 3, TCombLUTOutput > CombLUTOutput
std::shared_ptr< const ZDCTriggerSimDataBase > SimDataCPtr
std::shared_ptr< ZDCTriggerSimDataBase > SimDataPtr